Add "techmap -wb", use in formal flows

Signed-off-by: Clifford Wolf <clifford@clifford.at>

diff --git a/passes/equiv/equiv_opt.cc b/passes/equiv/equiv_opt.cc
index 86550a69b1040ac42b8144a8c3ea1bc3feaf5803..e5dda9c246c4cf5c5266529c3976aeaa291a77a3 100644 (file)
--- a/passes/equiv/equiv_opt.cc
+++ b/passes/equiv/equiv_opt.cc
@@ -134,7 +134,7 @@ struct EquivOptPass:public ScriptPass
                                opts = " -map <filename> ...";
                        else
                                opts = techmap_opts;
-                       run("techmap -D EQUIV -autoproc" + opts);
+                       run("techmap -wb -D EQUIV -autoproc" + opts);
                }
 
                if (check_label("prove")) {

diff --git a/passes/sat/miter.cc b/passes/sat/miter.cc
index d37f1b126eb2c6c2d175adf38d884c26a69f44d1..1a886af707cd3f3c45f676017b7c7dc0ff9f31fc 100644 (file)
--- a/passes/sat/miter.cc
+++ b/passes/sat/miter.cc
@@ -254,7 +254,7 @@ void create_miter_equiv(struct Pass *that, std::vector<std::string> args, RTLIL:
 
        if (flag_flatten) {
                log_push();
-               Pass::call_on_module(design, miter_module, "flatten; opt_expr -keepdc -undriven;;");
+               Pass::call_on_module(design, miter_module, "flatten -wb; opt_expr -keepdc -undriven;;");
                log_pop();
        }
 }
@@ -308,7 +308,7 @@ void create_miter_assert(struct Pass *that, std::vector<std::string> args, RTLIL
 
        if (flag_flatten) {
                log_push();
-               Pass::call_on_module(design, module, "flatten;;");
+               Pass::call_on_module(design, module, "flatten -wb;;");
                log_pop();
        }
 
@@ -385,7 +385,7 @@ struct MiterPass : public Pass {
                log("        also create an 'assert' cell that checks if trigger is always low.\n");
                log("\n");
                log("    -flatten\n");
-               log("        call 'flatten; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
+               log("        call 'flatten -wb; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
                log("\n");
                log("\n");
                log("    miter -assert [options] module [miter_name]\n");
@@ -399,7 +399,7 @@ struct MiterPass : public Pass {
                log("        keep module output ports.\n");
                log("\n");
                log("    -flatten\n");
-               log("        call 'flatten; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
+               log("        call 'flatten -wb; opt_expr -keepdc -undriven;;' on the miter circuit.\n");
                log("\n");
        }
        void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE

diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 416bf4f1c015f67f53c60623900c1933ee3c74ad..ee319b6e6b2b4f15f138fb145d335950d445b689 100644 (file)
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -385,7 +385,7 @@ struct TechmapWorker
        {
                std::string mapmsg_prefix = in_recursion ? "Recursively mapping" : "Mapping";
 
-               if (!design->selected(module) || module->get_blackbox_attribute())
+               if (!design->selected(module) || module->get_blackbox_attribute(ignore_wb))
                        return false;
 
                bool log_continue = false;
@@ -927,6 +927,9 @@ struct TechmapPass : public Pass {
                log("    -autoproc\n");
                log("        Automatically call \"proc\" on implementations that contain processes.\n");
                log("\n");
+               log("    -wb\n");
+               log("        Ignore the 'whitebox' attribute on cell implementations.\n");
+               log("\n");
                log("    -assert\n");
                log("        this option will cause techmap to exit with an error if it can't map\n");
                log("        a selected cell. only cell types that end on an underscore are accepted\n");
@@ -1070,6 +1073,10 @@ struct TechmapPass : public Pass {
                                worker.autoproc_mode = true;
                                continue;
                        }
+                       if (args[argidx] == "-wb") {
+                               worker.ignore_wb = true;
+                               continue;
+                       }
                        break;
                }
                extra_args(args, argidx, design);