+2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * gas/sh/pcrel-coff.d: Update patterns (remove 0x on addresses).
+ * gas/sh/pcrel-hms.d: Likewise.
+ * gas/sh/pcrel.d: Likewise.
+ * gas/sh/pcrel2.d: Likewise.
+ * gas/sh/pic.d: Likewise.
+ * gas/sh/tlsd.d: Likewise.
+ * gas/sh/tlsdnopic.d: Likewise.
+ * gas/sh/tlsdpic.d: Likewise.
+
2006-10-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Indent "x86-64-nops-1".
Disassembly of section .text:
00000000 <code>:
- 0: d1 03 mov\.l 10 <litpool>,r1 ! 0xfffffff0
- 2: d1 03 mov\.l 10 <litpool>,r1 ! 0xfffffff0
+ 0: d1 03 mov\.l 10 <litpool>,r1 ! fffffff0
+ 2: d1 03 mov\.l 10 <litpool>,r1 ! fffffff0
4: c7 02 mova 10 <litpool>,r0
6: 61 02 mov\.l @r0,r1
- 8: d1 01 mov\.l 10 <litpool>,r1 ! 0xfffffff0
+ 8: d1 01 mov\.l 10 <litpool>,r1 ! fffffff0
a: 01 03 bsrf r1
c: 00 09 nop
e: 00 09 nop
Disassembly of section .text:
00000000 <code>:
- 0: d0 04 mov\.l 14 <litpool>,r0 ! 0xffffffec
- 2: d1 05 mov\.l 18 <litpool\+0x4>,r1 ! 0x90009
- 4: d1 03 mov\.l 14 <litpool>,r1 ! 0xffffffec
- 6: d1 03 mov\.l 14 <litpool>,r1 ! 0xffffffec
+ 0: d0 04 mov\.l 14 <litpool>,r0 ! ffffffec
+ 2: d1 05 mov\.l 18 <litpool\+0x4>,r1 ! 90009
+ 4: d1 03 mov\.l 14 <litpool>,r1 ! ffffffec
+ 6: d1 03 mov\.l 14 <litpool>,r1 ! ffffffec
8: c7 02 mova 14 <litpool>,r0
a: 61 02 mov\.l @r0,r1
- c: d1 01 mov\.l 14 <litpool>,r1 ! 0xffffffec
+ c: d1 01 mov\.l 14 <litpool>,r1 ! ffffffec
e: 01 03 bsrf r1
10: 00 09 nop
12: 00 09 nop
Disassembly of section .text:
00000000 <code>:
- 0: d0 04 mov\.l 14 <litpool>,r0 ! 0xffffffec
+ 0: d0 04 mov\.l 14 <litpool>,r0 ! ffffffec
2: d1 05 mov\.l 18 <litpool\+0x4>,r1
- 4: d1 03 mov\.l 14 <litpool>,r1 ! 0xffffffec
- 6: d1 03 mov\.l 14 <litpool>,r1 ! 0xffffffec
+ 4: d1 03 mov\.l 14 <litpool>,r1 ! ffffffec
+ 6: d1 03 mov\.l 14 <litpool>,r1 ! ffffffec
8: c7 02 mova 14 <litpool>,r0
a: 61 02 mov\.l @r0,r1
- c: d1 01 mov\.l 14 <litpool>,r1 ! 0xffffffec
+ c: d1 01 mov\.l 14 <litpool>,r1 ! ffffffec
e: 01 03 bsrf r1
10: 00 09 nop
12: 00 09 nop
00000000 <code>:
0: 8b 01 bf 6 <foo>
- 2: d0 02 mov\.l c <bar>,r0 ! 0x6 .*
- 4: 90 02 mov\.w c <bar>,r0 ! 0x0 .*
+ 2: d0 02 mov\.l c <bar>,r0 ! 6 .*
+ 4: 90 02 mov\.w c <bar>,r0 ! 0 .*
00000006 <foo>:
6: af fe bra 6 <foo>
Disassembly of section \.text:
0x00000000 c7 0a mova 0x0000002c,r0
-0x00000002 dc 0a mov\.l 0x0000002c,r12 ! 0x0
+0x00000002 dc 0a mov\.l 0x0000002c,r12 ! 0
0x00000004 3c 0c add r0,r12
-0x00000006 d0 0a mov\.l 0x00000030,r0 ! 0x0
+0x00000006 d0 0a mov\.l 0x00000030,r0 ! 0
0x00000008 00 ce mov\.l @\(r0,r12\),r0
0x0000000a 40 0b jsr @r0
0x0000000c 00 09 nop
-0x0000000e d0 09 mov\.l 0x00000034,r0 ! 0x0
+0x0000000e d0 09 mov\.l 0x00000034,r0 ! 0
0x00000010 30 cc add r12,r0
0x00000012 40 0b jsr @r0
0x00000014 00 09 nop
-0x00000016 d1 08 mov\.l 0x00000038,r1 ! 0x0
+0x00000016 d1 08 mov\.l 0x00000038,r1 ! 0
0x00000018 c7 07 mova 0x00000038,r0
0x0000001a 30 1c add r1,r0
0x0000001c 40 0b jsr @r0
0x0000001e 00 09 nop
-0x00000020 d0 06 mov\.l 0x0000003c,r0 ! 0x16
+0x00000020 d0 06 mov\.l 0x0000003c,r0 ! 16
0x00000022 40 0b jsr @r0
0x00000024 00 09 nop
-0x00000026 d0 06 mov\.l 0x00000040,r0 ! 0x14
+0x00000026 d0 06 mov\.l 0x00000040,r0 ! 14
0x00000028 40 0b jsr @r0
0x0000002a 00 09 nop
\.\.\.
2: 2f e6 [ ]*mov\.l r14,@-r15
4: 4f 22 [ ]*sts\.l pr,@-r15
6: c7 14 [ ]*mova 58 <fn\+0x58>,r0
- 8: dc 13 [ ]*mov\.l 58 <fn\+0x58>,r12[ ]+! 0x0 .*
+ 8: dc 13 [ ]*mov\.l 58 <fn\+0x58>,r12[ ]+! 0 .*
a: 3c 0c [ ]*add r0,r12
c: 6e f3 [ ]*mov r15,r14
- e: d4 04 [ ]*mov\.l 20 <fn\+0x20>,r4[ ]+! 0x0 .*
+ e: d4 04 [ ]*mov\.l 20 <fn\+0x20>,r4[ ]+! 0 .*
10: c7 04 [ ]*mova 24 <fn\+0x24>,r0
- 12: d1 04 [ ]*mov\.l 24 <fn\+0x24>,r1[ ]+! 0x0 .*
+ 12: d1 04 [ ]*mov\.l 24 <fn\+0x24>,r1[ ]+! 0 .*
14: 31 0c [ ]*add r0,r1
16: 41 0b [ ]*jsr @r1
18: 34 cc [ ]*add r12,r4
\.\.\.
[ ]+20: R_SH_TLS_GD_32 foo
[ ]+24: R_SH_PLT32 __tls_get_addr
- 28: d4 03 [ ]*mov\.l 38 <fn\+0x38>,r4[ ]+! 0x0 .*
+ 28: d4 03 [ ]*mov\.l 38 <fn\+0x38>,r4[ ]+! 0 .*
2a: c7 04 [ ]*mova 3c <fn\+0x3c>,r0
- 2c: d1 03 [ ]*mov\.l 3c <fn\+0x3c>,r1[ ]+! 0x0 .*
+ 2c: d1 03 [ ]*mov\.l 3c <fn\+0x3c>,r1[ ]+! 0 .*
2e: 31 0c [ ]*add r0,r1
30: 41 0b [ ]*jsr @r1
32: 34 cc [ ]*add r12,r4
[ ]+38: R_SH_TLS_LD_32 bar
[ ]+3c: R_SH_PLT32 __tls_get_addr
40: e2 01 [ ]*mov #1,r2
- 42: d1 06 [ ]*mov\.l 5c <fn\+0x5c>,r1[ ]+! 0x0 .*
+ 42: d1 06 [ ]*mov\.l 5c <fn\+0x5c>,r1[ ]+! 0 .*
44: 30 1c [ ]*add r1,r0
46: 20 22 [ ]*mov\.l r2,@r0
- 48: d1 05 [ ]*mov\.l 60 <fn\+0x60>,r1[ ]+! 0x0 .*
+ 48: d1 05 [ ]*mov\.l 60 <fn\+0x60>,r1[ ]+! 0 .*
4a: 30 1c [ ]*add r1,r0
4c: 6f e3 [ ]*mov r14,r15
4e: 4f 26 [ ]*lds\.l @r15\+,pr
0: 2f e6 [ ]*mov\.l r14,@-r15
2: 6e f3 [ ]*mov r15,r14
4: 01 12 [ ]*stc gbr,r1
- 6: d0 02 [ ]*mov\.l 10 <fn\+0x10>,r0[ ]+! 0x0 .*
+ 6: d0 02 [ ]*mov\.l 10 <fn\+0x10>,r0[ ]+! 0 .*
8: 30 1c [ ]*add r1,r0
a: 6f e3 [ ]*mov r14,r15
c: 00 0b [ ]*rts
2: 2f e6 [ ]*mov\.l r14,@-r15
4: 6e f3 [ ]*mov r15,r14
6: c7 08 [ ]*mova 28 <fn\+0x28>,r0
- 8: dc 07 [ ]*mov\.l 28 <fn\+0x28>,r12[ ]+! 0x0 .*
+ 8: dc 07 [ ]*mov\.l 28 <fn\+0x28>,r12[ ]+! 0 .*
a: 3c 0c [ ]*add r0,r12
- c: d0 02 [ ]*mov\.l 18 <fn\+0x18>,r0[ ]+! 0x0 .*
+ c: d0 02 [ ]*mov\.l 18 <fn\+0x18>,r0[ ]+! 0 .*
e: 01 12 [ ]*stc gbr,r1
10: 00 ce [ ]*mov\.l @\(r0,r12\),r0
12: a0 03 [ ]*bra 1c <fn\+0x1c>
+2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
+
+ * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
+ duplicating it.
+
2006-10-18 Dave Brolley <brolley@redhat.com>
* configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
}
if ((*info->symbol_at_address_func) (val, info))
{
- fprintf_fn (stream, "\t! 0x");
+ fprintf_fn (stream, "\t! ");
(*info->print_address_func) (val, info);
}
else
- fprintf_fn (stream, "\t! 0x%x", val);
+ fprintf_fn (stream, "\t! %x", val);
}
}