* Digital circuit design
* Availability: Outside normal working hours.
-## [[Cole Poirier|cole]]
-
-* Trying to learn and organize stuff
-* GitHub: [[https://github.com/colepoirier]]
-* Availability: full-time
-
## [[Sanjay A Menon|Sanjay]]
* Skills: Verilog, C/C++, Python, TCL & PERL
* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design.
* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
* Availability: 8~10hrs/week
+
+## Former Members
+
+### [[Cole Poirier|cole]]