(no commit message)
authorcolepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 <colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0@web>
Tue, 1 Mar 2022 21:06:55 +0000 (21:06 +0000)
committerIkiWiki <ikiwiki.info>
Tue, 1 Mar 2022 21:06:55 +0000 (21:06 +0000)
about_us.mdwn

index a62dc37597ccf2921e28b0fcdb7b4c02872f1f1d..1f47ec041a4d552a75f15f67ad8fc336cec6f5e9 100644 (file)
@@ -89,12 +89,6 @@ Alain's website: <http://phcomp.co.uk>
 * Digital circuit design
 * Availability: Outside normal working hours.
 
-## [[Cole Poirier|cole]]
-
-* Trying to learn and organize stuff
-* GitHub: [[https://github.com/colepoirier]]
-* Availability: full-time
-
 ## [[Sanjay A Menon|Sanjay]]
 
 * Skills: Verilog, C/C++, Python, TCL & PERL
@@ -212,3 +206,7 @@ Alain's website: <http://phcomp.co.uk>
 * Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
 * LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
 * Availability: 8~10hrs/week
+
+## Former Members
+
+### [[Cole Poirier|cole]]