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diff --git a/openpower/sv/biginteger.mdwn b/openpower/sv/biginteger.mdwn
index a51e4c3870d0a3ac7a7284a42c8c040084b9dcb7..266924467edff09fbeff32480080836475aebb52 100644 (file)
--- a/openpower/sv/biginteger.mdwn
+++ b/openpower/sv/biginteger.mdwn
@@ -26,10 +26,10 @@ Dynamic SIMD ALUs for maximum performance and effectiveness.
 # Analysis
 
 Covered in [[biginteger/analysis]] the summary is that standard `adde`
-is sufficient for SVP64 Vectorisation of big-integer addition (and subfe
+is sufficient for SVP64 Vectorisation of big-integer addition (and `subfe`
 for subtraction) but that big-integer shift, multiply and divide require an
-extra 3-in 2-out instructions, similar to Intel's `mulx` and
-`idiv`, to be efficient.
+extra 3-in 2-out instructions, similar to Intel's `shld`, `shrd`,
+`mulx` and `idiv`, to be efficient.
 The same instruction (`maddedu`) is used for both because 'maddedu''s primary
 purpose is to perform a fused 64-bit scalar multiply with a large vector,
 where that result is Big-Added for Big-Multiply, but Big-Subtracted for