add lbzup english description based on lbzu

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index b5671cbc25ae87b174b8e0c2832d9cd4d61a479d..045d32624a294d15809d45a67655637fade50989 100644 (file)
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -20,6 +20,16 @@ Pseudo-code:
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
     RA <- (RA) + EXTS(D)
 
+Description:
+
+    Let the effective address (EA) be register RA. The
+    byte in storage addressed by EA is loaded into RT[56:63].
+    RT[0:55] are set to 0.
+
+    The sum (RA) + D is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None