AVX-512. 78/n. Use blend for inserting.

gcc/
	* config/i386/i386.c (ix86_expand_vector_set): Handle V8DF, V8DI, V16SF,
	V16SI, V32HI, V64QI modes.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216310

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7f79791f9ce6e1296d1fb1cd889d6141913fe7f8..96356fc1e0bb8a57e3fc9a04eb78e5aa101a8f95 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2014-10-16  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/i386.c (ix86_expand_vector_set): Handle V8DF, V8DI, V16SF,
+       V16SI, V32HI, V64QI modes.
+
 2014-10-16  Oleg Endo  <olegendo@gcc.gnu.org>
 
        PR target/53513

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 64a5c552b4ad8e998ef14e2108d76170af45b4a2..073e4ccc0ed5a31ca99e7222c15bc1edf5a5564d 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -40854,6 +40854,79 @@ half:
       emit_insn (gen_insert[j][i] (target, target, tmp));
       return;
 
+    case V8DFmode:
+      if (TARGET_AVX512F)
+       {
+         tmp = gen_reg_rtx (mode);
+         emit_insn (gen_rtx_SET (VOIDmode, tmp,
+                                 gen_rtx_VEC_DUPLICATE (mode, val)));
+         emit_insn (gen_avx512f_blendmv8df (target, tmp, target,
+                                            force_reg (QImode, GEN_INT (1 << elt))));
+         return;
+       }
+      else
+       break;
+    case V8DImode:
+      if (TARGET_AVX512F)
+       {
+         tmp = gen_reg_rtx (mode);
+         emit_insn (gen_rtx_SET (VOIDmode, tmp,
+                                 gen_rtx_VEC_DUPLICATE (mode, val)));
+         emit_insn (gen_avx512f_blendmv8di (target, tmp, target,
+                                            force_reg (QImode, GEN_INT (1 << elt))));
+         return;
+       }
+      else
+       break;
+    case V16SFmode:
+      if (TARGET_AVX512F)
+       {
+         tmp = gen_reg_rtx (mode);
+         emit_insn (gen_rtx_SET (VOIDmode, tmp,
+                                 gen_rtx_VEC_DUPLICATE (mode, val)));
+         emit_insn (gen_avx512f_blendmv16sf (target, tmp, target,
+                                             force_reg (HImode, GEN_INT (1 << elt))));
+         return;
+       }
+      else
+       break;
+    case V16SImode:
+      if (TARGET_AVX512F)
+       {
+         tmp = gen_reg_rtx (mode);
+         emit_insn (gen_rtx_SET (VOIDmode, tmp,
+                                 gen_rtx_VEC_DUPLICATE (mode, val)));
+         emit_insn (gen_avx512f_blendmv16si (target, tmp, target,
+                                             force_reg (HImode, GEN_INT (1 << elt))));
+         return;
+       }
+      else
+       break;
+    case V32HImode:
+      if (TARGET_AVX512F && TARGET_AVX512BW)
+       {
+         tmp = gen_reg_rtx (mode);
+         emit_insn (gen_rtx_SET (VOIDmode, tmp,
+                                 gen_rtx_VEC_DUPLICATE (mode, val)));
+         emit_insn (gen_avx512bw_blendmv32hi (target, tmp, target,
+                                              force_reg (SImode, GEN_INT (1 << elt))));
+         return;
+       }
+      else
+       break;
+    case V64QImode:
+      if (TARGET_AVX512F && TARGET_AVX512BW)
+       {
+         tmp = gen_reg_rtx (mode);
+         emit_insn (gen_rtx_SET (VOIDmode, tmp,
+                                 gen_rtx_VEC_DUPLICATE (mode, val)));
+         emit_insn (gen_avx512bw_blendmv64qi (target, tmp, target,
+                                              force_reg (DImode, GEN_INT (1 << elt))));
+         return;
+       }
+      else
+       break;
+
     default:
       break;
     }