--- /dev/null
+diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pio.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pio.h
+--- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pio.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pio.h 2009-01-01 14:02:28.000000000 +0100
+@@ -0,0 +1,49 @@
++/*
++ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
++ *
++ * Copyright (C) 2005 Ivan Kokshaysky
++ * Copyright (C) SAN People
++ *
++ * Parallel I/O Controller (PIO) - System peripherals registers.
++ * Based on AT91RM9200 datasheet revision E.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91_PIO_H
++#define AT91_PIO_H
++
++#define PIO_PER 0x00 /* Enable Register */
++#define PIO_PDR 0x04 /* Disable Register */
++#define PIO_PSR 0x08 /* Status Register */
++#define PIO_OER 0x10 /* Output Enable Register */
++#define PIO_ODR 0x14 /* Output Disable Register */
++#define PIO_OSR 0x18 /* Output Status Register */
++#define PIO_IFER 0x20 /* Glitch Input Filter Enable */
++#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
++#define PIO_IFSR 0x28 /* Glitch Input Filter Status */
++#define PIO_SODR 0x30 /* Set Output Data Register */
++#define PIO_CODR 0x34 /* Clear Output Data Register */
++#define PIO_ODSR 0x38 /* Output Data Status Register */
++#define PIO_PDSR 0x3c /* Pin Data Status Register */
++#define PIO_IER 0x40 /* Interrupt Enable Register */
++#define PIO_IDR 0x44 /* Interrupt Disable Register */
++#define PIO_IMR 0x48 /* Interrupt Mask Register */
++#define PIO_ISR 0x4c /* Interrupt Status Register */
++#define PIO_MDER 0x50 /* Multi-driver Enable Register */
++#define PIO_MDDR 0x54 /* Multi-driver Disable Register */
++#define PIO_MDSR 0x58 /* Multi-driver Status Register */
++#define PIO_PUDR 0x60 /* Pull-up Disable Register */
++#define PIO_PUER 0x64 /* Pull-up Enable Register */
++#define PIO_PUSR 0x68 /* Pull-up Status Register */
++#define PIO_ASR 0x70 /* Peripheral A Select Register */
++#define PIO_BSR 0x74 /* Peripheral B Select Register */
++#define PIO_ABSR 0x78 /* AB Status Register */
++#define PIO_OWER 0xa0 /* Output Write Enable Register */
++#define PIO_OWDR 0xa4 /* Output Write Disable Register */
++#define PIO_OWSR 0xa8 /* Output Write Status Register */
++
++#endif
+diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pmc.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pmc.h
+--- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pmc.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pmc.h 2009-01-01 15:51:28.000000000 +0100
+@@ -0,0 +1,116 @@
++/*
++ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h]
++ *
++ * Copyright (C) 2005 Ivan Kokshaysky
++ * Copyright (C) SAN People
++ *
++ * Copyright (C) 2008 Ulf Samuelsson
++ *
++ * Power Management Controller (PMC) - System peripherals registers.
++ * Based on AT91RM9200 datasheet revision E.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91_PMC_H
++#define AT91_PMC_H
++
++#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
++#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
++
++#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
++#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
++#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
++#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
++#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
++#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
++#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */
++#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */
++#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */
++#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */
++#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */
++#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */
++#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
++#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
++#define AT91_PMC_RES_0C (AT91_PMC + 0x0c) /* Reserved */
++
++#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
++#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
++#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
++#define AT91_PMC_RES_1C (AT91_PMC + 0x1c) /* Reserved */
++
++
++#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
++#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
++#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */
++#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
++
++#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
++#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
++#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
++
++#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */
++#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */
++#define AT91_PMC_DIV (0xff << 0) /* Divider */
++#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
++#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
++#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */
++#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */
++#define AT91_PMC_USBDIV_1 (0 << 28)
++#define AT91_PMC_USBDIV_2 (1 << 28)
++#define AT91_PMC_USBDIV_4 (2 << 28)
++#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */
++
++#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */
++#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */
++#define AT91_PMC_CSS_SLOW (0 << 0)
++#define AT91_PMC_CSS_MAIN (1 << 0)
++#define AT91_PMC_CSS_PLLA (2 << 0)
++#define AT91_PMC_CSS_PLLB (3 << 0)
++#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */
++#define AT91_PMC_PRES_1 (0 << 2)
++#define AT91_PMC_PRES_2 (1 << 2)
++#define AT91_PMC_PRES_4 (2 << 2)
++#define AT91_PMC_PRES_8 (3 << 2)
++#define AT91_PMC_PRES_16 (4 << 2)
++#define AT91_PMC_PRES_32 (5 << 2)
++#define AT91_PMC_PRES_64 (6 << 2)
++#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */
++#define AT91_PMC_MDIV_1 (0 << 8)
++#define AT91_PMC_MDIV_2 (1 << 8)
++#define AT91_PMC_MDIV_3 (2 << 8)
++#define AT91_PMC_MDIV_4 (3 << 8)
++
++#define AT91_PMC_RES_34 (AT91_PMC + 0x34) /* Reserved */
++#define AT91_PMC_RES_38 (AT91_PMC + 0x38) /* Reserved */
++#define AT91_PMC_RES_3C (AT91_PMC + 0x3c) /* Reserved */
++
++#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */
++
++#define AT91_PMC_RES_50 (AT91_PMC + 0x50) /* Reserved */
++#define AT91_PMC_RES_54 (AT91_PMC + 0x54) /* Reserved */
++#define AT91_PMC_RES_58 (AT91_PMC + 0x58) /* Reserved */
++#define AT91_PMC_RES_5C (AT91_PMC + 0x5c) /* Reserved */
++
++#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */
++#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */
++#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */
++#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */
++#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
++#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
++#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
++#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
++#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
++#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
++#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
++#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
++
++#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
++#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
++
++#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */
++
++#endif
+diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/AT91RM9200.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/AT91RM9200.h
+--- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/AT91RM9200.h 2009-01-01 13:09:34.000000000 +0100
++++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/AT91RM9200.h 2009-01-01 15:52:00.000000000 +0100
+@@ -28,6 +28,114 @@
+ #ifndef __ASSEMBLY__
+ typedef volatile unsigned int AT91_REG; /* Hardware register definition */
+
++/*
++ * Peripheral identifiers/interrupts.
++ */
++#define AT91RM9200_ID_AIC 0 /* Advanced Interrupt Controller (FIQ) */
++#define AT91RM9200_ID_SYSIRQ 1 /* System Peripherals */
++#define AT91RM9200_ID_PIOA 2 /* Parallel IO Controller A */
++#define AT91RM9200_ID_PIOB 3 /* Parallel IO Controller B */
++#define AT91RM9200_ID_PIOC 4 /* Parallel IO Controller C */
++#define AT91RM9200_ID_PIOD 5 /* Parallel IO Controller D */
++#define AT91RM9200_ID_US0 6 /* USART 0 */
++#define AT91RM9200_ID_US1 7 /* USART 1 */
++#define AT91RM9200_ID_US2 8 /* USART 2 */
++#define AT91RM9200_ID_US3 9 /* USART 2 */
++#define AT91RM9200_ID_MCI 10 /* Multimedia Card Interface */
++#define AT91RM9200_ID_UDP 11 /* USB Device Port */
++#define AT91RM9200_ID_TWI 12 /* Two-Wire Interface */
++#define AT91RM9200_ID_SPI0 13 /* Serial Peripheral Interface 0 */
++#define AT91RM9200_ID_SSC0 14 /* Serial Synchronous Controller */
++#define AT91RM9200_ID_SSC1 15 /* Serial Synchronous Controller */
++#define AT91RM9200_ID_SSC2 16 /* Serial Synchronous Controller */
++#define AT91RM9200_ID_TC0 17 /* Timer Counter 0 */
++#define AT91RM9200_ID_TC1 18 /* Timer Counter 1 */
++#define AT91RM9200_ID_TC2 19 /* Timer Counter 2 */
++#define AT91RM9200_ID_TC3 20 /* Timer Counter 3 */
++#define AT91RM9200_ID_TC4 21 /* Timer Counter 4 */
++#define AT91RM9200_ID_TC5 22 /* Timer Counter 5 */
++#define AT91RM9200_ID_UHP 23 /* USB Host port */
++#define AT91RM9200_ID_EMAC 24 /* Ethernet */
++#define AT91RM9200_ID_IRQ0 25 /* Advanced Interrupt Controller (IRQ0) */
++#define AT91RM9200_ID_IRQ1 26 /* Advanced Interrupt Controller (IRQ1) */
++#define AT91RM9200_ID_IRQ2 27 /* Advanced Interrupt Controller (IRQ2) */
++#define AT91RM9200_ID_IRQ3 28 /* Advanced Interrupt Controller (IRQ3) */
++#define AT91RM9200_ID_IRQ4 29 /* Advanced Interrupt Controller (IRQ4) */
++#define AT91RM9200_ID_IRQ5 30 /* Advanced Interrupt Controller (IRQ5) */
++#define AT91RM9200_ID_IRQ6 31 /* Advanced Interrupt Controller (IRQ6) */
++/*
++ * User Peripheral physical base addresses.
++ */
++
++
++
++#define AT91RM9200_BASE_TC0 0xFFFA0000 /* (TC0) Base Address */
++#define AT91RM9200_BASE_TC1 0xFFFA4000 /* (TC0) Base Address */
++#define AT91RM9200_BASE_UDP 0xFFFB0000 /* (TC0) Base Address */
++#define AT91RM9200_BASE_MCI 0xFFFB4000 /* (TC0) Base Address */
++#define AT91RM9200_BASE_TWI 0xFFFB8000 /* (TC0) Base Address */
++#define AT91RM9200_BASE_EMAC 0xFFFBC000 /* (EMAC) Base Address */
++#define AT91RM9200_BASE_US0 0xFFFC0000 /* (US0) Base Address */
++#define AT91RM9200_BASE_US1 0xFFFC4000 /* (US1) Base Address */
++#define AT91RM9200_BASE_US2 0xFFFC8000 /* (US1) Base Address */
++#define AT91RM9200_BASE_US3 0xFFFCC000 /* (US1) Base Address */
++#define AT91RM9200_BASE_SPI 0xFFFE0000 /* (SPI) Base Address */
++
++#define AT91RM9200_BASE_AIC 0xFFFFF000 /* (AIC) Base Address */
++#define AT91RM9200_BASE_DBGU 0xFFFFF200 /* (DBGU) Base Address */
++#define AT91RM9200_BASE_PIOA 0xFFFFF400 /* (PIOA) Base Address */
++#define AT91RM9200_BASE_PIOB 0xFFFFF600 /* (PIOB) Base Address */
++#define AT91RM9200_BASE_PIOC 0xFFFFF800 /* (PIOC) Base Address */
++#define AT91RM9200_BASE_PIOD 0xFFFFFA00 /* (PIOC) Base Address */
++#define AT91RM9200_BASE_PMC 0xFFFFFC00 /* (PMC) Base Address */
++#define AT91RM9200_BASE_CKGR 0xFFFFFC20 /* (CKGR) Base Address */
++#define AT91RM9200_BASE_ST 0xFFFFFD00 /* (PMC) Base Address */
++#define AT91RM9200_BASE_RTC 0xFFFFFE00 /* (PMC) Base Address */
++#define AT91RM9200_BASE_MC 0xFFFFFF00 /* (PMC) Base Address */
++#define AT91RM9200_BASE_EBI 0xFFFFFF60 /* (PMC) Base Address */
++#define AT91RM9200_BASE_SMC2 0xFFFFFF70 /* (SMC2) Base Address */
++#define AT91RM9200_BASE_SDRAMC 0xFFFFFF90 /* (SMC2) Base Address */
++#define AT91RM9200_BASE_BFC 0xFFFFFFC0 /* (SMC2) Base Address */
++
++/*
++ * System Peripherals (offset from AT91_BASE_SYS)
++ */
++#define AT91_BASE_SYS AT91RM9200_BASE_AIC
++
++#define AT91_AIC (AT91RM9200_BASE_AIC - AT91_BASE_SYS)
++#define AT91_DBGU (AT91RM9200_BASE_DBGU - AT91_BASE_SYS)
++#define AT91_PIOA (AT91RM9200_BASE_PIOA - AT91_BASE_SYS)
++#define AT91_PIOB (AT91RM9200_BASE_PIOB - AT91_BASE_SYS)
++#define AT91_PIOC (AT91RM9200_BASE_PIOC - AT91_BASE_SYS)
++#define AT91_PIOD (AT91RM9200_BASE_PIOD - AT91_BASE_SYS)
++#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
++#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
++#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
++#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
++#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
++
++#define AT91_CKGR (AT91RM9200_BASE_CKGR - AT91_BASE_SYS)
++#define AT91_ST (AT91RM9200_BASE_ST - AT91_BASE_SYS)
++#define AT91_RTC (AT91RM9200_BASE_RTC - AT91_BASE_SYS)
++#define AT91_MC (AT91RM9200_BASE_MC - AT91_BASE_SYS)
++#define AT91_EBI (AT91RM9200_BASE_EBI - AT91_BASE_SYS)
++#define AT91_EBI_CSA ((AT91RM9200_BASE_EBI +0x00) - AT91_BASE_SYS)
++#define AT91_SMC2 (AT91RM9200_BASE_SMC2 - AT91_BASE_SYS)
++#define AT91_SMC2_CSR0 ((AT91RM9200_BASE_SMC2+0x00) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR1 ((AT91RM9200_BASE_SMC2+0x04) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR2 ((AT91RM9200_BASE_SMC2+0x08) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR3 ((AT91RM9200_BASE_SMC2+0x0c) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR4 ((AT91RM9200_BASE_SMC2+0x10) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR5 ((AT91RM9200_BASE_SMC2+0x14) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR6 ((AT91RM9200_BASE_SMC2+0x18) - AT91_BASE_SYS)
++#define AT91_SMC2_CSR7 ((AT91RM9200_BASE_SMC2+0x1c) - AT91_BASE_SYS)
++
++
++#define AT91_USART0 AT91RM9200_BASE_US0
++#define AT91_USART1 AT91RM9200_BASE_US1
++#define AT91_USART2 AT91RM9200_BASE_US2
++#define AT91_USART3 AT91RM9200_BASE_US3
++
+ /*****************************************************************************/
+ /* SOFTWARE API DEFINITION FOR Timer Counter Channel Interface */
+ /*****************************************************************************/
+diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/gpio.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/gpio.h
+--- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/gpio.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/gpio.h 2009-01-01 14:02:11.000000000 +0100
+@@ -0,0 +1,367 @@
++/*
++ * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h]
++ *
++ * Copyright (C) 2005 HP Labs
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#ifndef __ASM_ARCH_AT91_GPIO_H
++#define __ASM_ARCH_AT91_GPIO_H
++
++#include <asm/io.h>
++#include <asm/errno.h>
++#include <asm/arch/at91_pio.h>
++#include <asm/arch/hardware.h>
++
++#define PIN_BASE 32
++
++#define MAX_GPIO_BANKS 5
++
++/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
++
++#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0)
++#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1)
++#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2)
++#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3)
++#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4)
++#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5)
++#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6)
++#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7)
++#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8)
++#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9)
++#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10)
++#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11)
++#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12)
++#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13)
++#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14)
++#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15)
++#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16)
++#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17)
++#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18)
++#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19)
++#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20)
++#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21)
++#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22)
++#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23)
++#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24)
++#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25)
++#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26)
++#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27)
++#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28)
++#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29)
++#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30)
++#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31)
++
++#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0)
++#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1)
++#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2)
++#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3)
++#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4)
++#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5)
++#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6)
++#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7)
++#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8)
++#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9)
++#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10)
++#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11)
++#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12)
++#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13)
++#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14)
++#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15)
++#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16)
++#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17)
++#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18)
++#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19)
++#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20)
++#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21)
++#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22)
++#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23)
++#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24)
++#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25)
++#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26)
++#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27)
++#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28)
++#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29)
++#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30)
++#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31)
++
++#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0)
++#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1)
++#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2)
++#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3)
++#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4)
++#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5)
++#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6)
++#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7)
++#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8)
++#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9)
++#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10)
++#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11)
++#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12)
++#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13)
++#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14)
++#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15)
++#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16)
++#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17)
++#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18)
++#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19)
++#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20)
++#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21)
++#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22)
++#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23)
++#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24)
++#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25)
++#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26)
++#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27)
++#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28)
++#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29)
++#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30)
++#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31)
++
++#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0)
++#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1)
++#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2)
++#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3)
++#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4)
++#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5)
++#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6)
++#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7)
++#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8)
++#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9)
++#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10)
++#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11)
++#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12)
++#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13)
++#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14)
++#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15)
++#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16)
++#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17)
++#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18)
++#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19)
++#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20)
++#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21)
++#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22)
++#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23)
++#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24)
++#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25)
++#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26)
++#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27)
++#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28)
++#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29)
++#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30)
++#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31)
++
++#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0)
++#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1)
++#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2)
++#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3)
++#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4)
++#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5)
++#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6)
++#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7)
++#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8)
++#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9)
++#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10)
++#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11)
++#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12)
++#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13)
++#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14)
++#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15)
++#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16)
++#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17)
++#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18)
++#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19)
++#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20)
++#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21)
++#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22)
++#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23)
++#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24)
++#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25)
++#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26)
++#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27)
++#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28)
++#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29)
++#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30)
++#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31)
++
++static unsigned long at91_pios[] = {
++ AT91_PIOA,
++ AT91_PIOB,
++ AT91_PIOC,
++#ifdef AT91_PIOD
++ AT91_PIOD,
++#ifdef AT91_PIOE
++ AT91_PIOE
++#endif
++#endif
++};
++
++static inline void *pin_to_controller(unsigned pin)
++{
++ pin -= PIN_BASE;
++ pin /= 32;
++ return (void *)(AT91_BASE_SYS + at91_pios[pin]);
++}
++
++static inline unsigned pin_to_mask(unsigned pin)
++{
++ pin -= PIN_BASE;
++ return 1 << (pin % 32);
++}
++
++/*
++ * mux the pin to the "GPIO" peripheral role.
++ */
++static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + PIO_IDR);
++ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
++ __raw_writel(mask, pio + PIO_PER);
++ return 0;
++}
++
++/*
++ * mux the pin to the "A" internal peripheral role.
++ */
++static inline int at91_set_A_periph(unsigned pin, int use_pullup)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + PIO_IDR);
++ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
++ __raw_writel(mask, pio + PIO_ASR);
++ __raw_writel(mask, pio + PIO_PDR);
++ return 0;
++}
++
++/*
++ * mux the pin to the "B" internal peripheral role.
++ */
++static inline int at91_set_B_periph(unsigned pin, int use_pullup)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + PIO_IDR);
++ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
++ __raw_writel(mask, pio + PIO_BSR);
++ __raw_writel(mask, pio + PIO_PDR);
++ return 0;
++}
++
++/*
++ * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
++ * configure it for an input.
++ */
++static inline int at91_set_gpio_input(unsigned pin, int use_pullup)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + PIO_IDR);
++ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
++ __raw_writel(mask, pio + PIO_ODR);
++ __raw_writel(mask, pio + PIO_PER);
++ return 0;
++}
++
++/*
++ * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
++ * and configure it for an output.
++ */
++static inline int at91_set_gpio_output(unsigned pin, int value)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + PIO_IDR);
++ __raw_writel(mask, pio + PIO_PUDR);
++ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
++ __raw_writel(mask, pio + PIO_OER);
++ __raw_writel(mask, pio + PIO_PER);
++ return 0;
++}
++
++/*
++ * enable/disable the glitch filter; mostly used with IRQ handling.
++ */
++static inline int at91_set_deglitch(unsigned pin, int is_on)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
++ return 0;
++}
++
++/*
++ * enable/disable the multi-driver; This is only valid for output and
++ * allows the output pin to run as an open collector output.
++ */
++static inline int at91_set_multi_drive(unsigned pin, int is_on)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
++ return 0;
++}
++
++static inline int gpio_direction_input(unsigned pin)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ if (!(__raw_readl(pio + PIO_PSR) & mask))
++ return -EINVAL;
++ __raw_writel(mask, pio + PIO_ODR);
++ return 0;
++}
++
++static inline int gpio_direction_output(unsigned pin, int value)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ if (!(__raw_readl(pio + PIO_PSR) & mask))
++ return -EINVAL;
++ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
++ __raw_writel(mask, pio + PIO_OER);
++ return 0;
++}
++
++/*
++ * assuming the pin is muxed as a gpio output, set its value.
++ */
++static inline int at91_set_gpio_value(unsigned pin, int value)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++
++ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
++ return 0;
++}
++
++/*
++ * read the pin's value (works even if it's not muxed as a gpio).
++ */
++static inline int at91_get_gpio_value(unsigned pin)
++{
++ void *pio = pin_to_controller(pin);
++ unsigned mask = pin_to_mask(pin);
++ u32 pdsr;
++
++ pdsr = __raw_readl(pio + PIO_PDSR);
++ return (pdsr & mask) != 0;
++}
++
++#endif
+diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/io.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/io.h
+--- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/io.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/io.h 2009-01-01 15:59:51.000000000 +0100
+@@ -0,0 +1,56 @@
++/*
++ * [origin: Linux kernel include/asm-arm/arch-at91/io.h]
++ *
++ * Copyright (C) 2003 SAN People
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ */
++
++#ifndef __ASM_ARCH_IO_H
++#define __ASM_ARCH_IO_H
++
++#include <asm/io.h>
++
++static inline unsigned int at91_sys_read(unsigned int reg_offset)
++{
++ void *addr = (void *)AT91_BASE_SYS;
++
++ return __raw_readl(addr + reg_offset);
++}
++
++static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
++{
++ void *addr = (void *)AT91_BASE_SYS;
++
++ __raw_writel(value, addr + reg_offset);
++}
++
++static inline void at91_sys_setbit(unsigned long value, unsigned int reg_offset)
++{
++ void *addr = (void *)(AT91_BASE_SYS + reg_offset);
++ value |= __raw_readl(addr);
++ __raw_writel(value, addr);
++}
++
++static inline void at91_sys_clrbit(unsigned long value, unsigned int reg_offset)
++{
++ void *addr = (void *)(AT91_BASE_SYS + reg_offset);
++ unsigned long data;
++ data = __raw_readl(addr);
++ data &= ~value;
++ __raw_writel(data, addr);
++}
++
++#endif
+
--- /dev/null
+diff -urN u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk_df.h u-boot-2009.01/include/configs/at91rm9200dk_df.h
+--- u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk_df.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200dk_df.h 2009-01-01 21:19:30.000000000 +0100
+@@ -0,0 +1,251 @@
++/*
++ * Rick Bronson <rick@efn.org>
++ *
++ * Configuration settings for the AT91RM9200DK board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200DK
++#define CONFIG_HOSTNAME at91rm9200dk
++
++/* ARM asynchronous clock */
++#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
++#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
++/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
++#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
++#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
++#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++#define USE_920T_MMU 1
++
++#define CONFIG_SKIP_LOWLEVEL_INIT /* Already done by dataflashboot */
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#ifndef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
++/* flash */
++#define MC_PUIA_VAL 0x00000000
++#define MC_PUP_VAL 0x00000000
++#define MC_PUER_VAL 0x00000000
++#define MC_ASR_VAL 0x00000000
++#define MC_AASR_VAL 0x00000000
++#define EBI_CFGR_VAL 0x00000000
++#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
++
++/* clocks */
++#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
++#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
++#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
++
++/* sdram */
++#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
++#define PIOC_BSR_VAL 0x00000000
++#define PIOC_PDR_VAL 0xFFFF0000
++#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
++#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
++#define SDRAM 0x20000000 /* address of the SDRAM */
++#define SDRAM1 0x20000080 /* address of the SDRAM */
++#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
++#define SDRC_MR_VAL 0x00000002 /* Precharge All */
++#define SDRC_MR_VAL1 0x00000004 /* refresh */
++#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
++#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
++#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
++#else
++#define CONFIG_SKIP_RELOCATE_UBOOT
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
++
++#define CONFIG_BAUDRATE 115200
++
++/*
++ * Hardware drivers
++ */
++
++/* define one of these to choose the DBGU, USART0 or USART1 as console */
++#define CONFIG_DBGU
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++
++#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
++
++#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
++
++#define CONFIG_BOOTDELAY 3
++/* #define CONFIG_ENV_OVERWRITE 1 */
++
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE
++#define CONFIG_BOOTP_BOOTPATH
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_HOSTNAME
++
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_NAND
++#define CONFIG_CMD_AT91_SPIMUX
++
++#define CONFIG_NAND_LEGACY
++
++#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
++#define SECTORSIZE 512
++
++#define ADDR_COLUMN 1
++#define ADDR_PAGE 2
++#define ADDR_COLUMN_PAGE 3
++
++#define NAND_ChipID_UNKNOWN 0x00
++#define NAND_MAX_FLOORS 1
++#define NAND_MAX_CHIPS 1
++
++#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
++#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
++
++#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
++#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
++#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
++
++#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
++
++#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
++#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
++#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
++#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
++/* the following are NOP's in our implementation */
++#define NAND_CTL_CLRALE(nandptr)
++#define NAND_CTL_SETALE(nandptr)
++#define NAND_CTL_CLRCLE(nandptr)
++#define NAND_CTL_SETCLE(nandptr)
++
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x20000000
++#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
++
++#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
++#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
++
++#define CONFIG_DRIVER_ETHER
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_AT91C_USE_RMII
++
++/* AC Characteristics */
++/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
++#define DATAFLASH_TCSS (0xC << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++
++#define CONFIG_HAS_DATAFLASH 1
++#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
++#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
++#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
++#define CONFIG__SUPPORT_BLOCK_ERASE 1
++
++
++#define PHYS_FLASH_1 0x10000000
++#define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */
++#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
++#define CONFIG_SYS_MAX_FLASH_BANKS 1
++#define CONFIG_SYS_MAX_FLASH_SECT 256
++#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
++#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
++
++#define CONFIG_ENV_IS_IN_DATAFLASH 1
++#define CONFIG_NEW_PARTITION 1
++
++#ifdef CONFIG_ENV_IS_IN_DATAFLASH
++#ifdef CONFIG_NEW_PARTITION
++#define CONFIG_ENV_OFFSET 0x4200
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x2000 /* 8 * 1056 really , but start.s is not OK with this*/
++#else
++#define CONFIG_ENV_OFFSET 0x20000
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
++#endif
++#else
++#define CONFIG_ENV_IS_IN_FLASH 1
++#ifdef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
++#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
++#else
++#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
++#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
++
++#if defined(CONFIG_AT91RM9200DK)
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
++#else
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
++#endif
++
++#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
++
++#ifdef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
++#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
++#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
++#else
++#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
++#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
++#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
++
++#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
++#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
++
++#define CONFIG_SYS_HZ 1000
++#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
++ /* AT91C_TC_TIMER_DIV1_CLOCK */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++
++#endif
+diff -urN u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk.h u-boot-2009.01/include/configs/at91rm9200dk.h
+--- u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk.h 2009-01-01 13:09:35.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200dk.h 2009-01-01 17:06:32.000000000 +0100
+@@ -24,6 +24,8 @@
+
+ #ifndef __CONFIG_H
+ #define __CONFIG_H
++#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200DK
++#define CONFIG_HOSTNAME at91rm9200dk
+
+ /* ARM asynchronous clock */
+ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
+@@ -33,6 +35,7 @@
+ #define AT91_SLOW_CLOCK 32768 /* slow clock */
+
+ #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
++#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
+ #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
+ #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
+ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+@@ -117,6 +120,7 @@
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_NAND
++#define CONFIG_CMD_AT91_SPIMUX
+
+ #define CONFIG_NAND_LEGACY
+
+@@ -198,6 +202,11 @@
+ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+ #endif /* CONFIG_ENV_IS_IN_DATAFLASH */
+
++#if defined(CONFIG_AT91RM9200DK)
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
++#else
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
++#endif
+
+ #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
+
+diff -urN u-boot-2009.01-rc1-0rig//Makefile u-boot-2009.01/Makefile
+--- u-boot-2009.01-rc1-0rig//Makefile 2009-01-01 13:09:30.000000000 +0100
++++ u-boot-2009.01/Makefile 2009-01-01 21:35:24.000000000 +0100
+@@ -2562,6 +2562,9 @@
+ ## Atmel AT91RM9200 Systems
+ #########################################################################
+
++at91rm9200dk_df_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
++
+ at91rm9200dk_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
+
+
--- /dev/null
+diff -urN u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/at91rm9200dk.c u-boot-2009.01/board/atmel/at91rm9200dk/at91rm9200dk.c
+--- u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/at91rm9200dk.c 2009-01-01 13:09:31.000000000 +0100
++++ u-boot-2009.01/board/atmel/at91rm9200dk/at91rm9200dk.c 2009-01-01 16:11:36.000000000 +0100
+@@ -3,6 +3,9 @@
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
++ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+@@ -24,6 +27,10 @@
+
+ #include <common.h>
+ #include <asm/arch/AT91RM9200.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_pio.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
+ #include <at91rm9200_net.h>
+ #include <dm9161.h>
+
+@@ -41,13 +48,13 @@
+
+ /* Correct IRDA resistor problem */
+ /* Set PA23_TXD in Output */
+- ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
++ at91_set_gpio_output(AT91_PIN_PA23, 1);
+
+ /* memory and cpu-speed are setup before relocation */
+ /* so we do _nothing_ here */
+
+ /* arch number of AT91RM9200DK-Board */
+- gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
++ gd->bd->bi_arch_number = AT91RM9200_BOARD;
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+@@ -91,46 +98,58 @@
+ */
+ #if defined(CONFIG_CMD_NAND)
+ extern ulong nand_probe (ulong physadr);
++/* set the bus interface characteristics based on
++ * tDS Data Set up Time 30 - ns
++ * tDH Data Hold Time 20 - ns
++ * tALS ALE Set up Time 20 - ns
++ * 16ns at 60 MHz ~= 3
++ */
+
+-#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
+-void nand_init (void)
+-{
+- /* Setup Smart Media, fitst enable the address range of CS3 */
+- *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
+- /* set the bus interface characteristics based on
+- tDS Data Set up Time 30 - ns
+- tDH Data Hold Time 20 - ns
+- tALS ALE Set up Time 20 - ns
+- 16ns at 60 MHz ~= 3 */
+ /*memory mapping structures */
+ #define SM_ID_RWH (5 << 28)
+ #define SM_RWH (1 << 28)
+ #define SM_RWS (0 << 24)
+ #define SM_TDF (1 << 8)
+ #define SM_NWS (3)
+- AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
+- AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
+- SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
++
++#define SMARTMEDIA_INIT ( \
++ SM_RWH | \
++ SM_RWS | \
++ AT91C_SMC2_ACSS_STANDARD | \
++ AT91C_SMC2_DBW_8 | \
++ SM_TDF | \
++ AT91C_SMC2_WSEN | \
++ SM_NWS \
++ )
++
++
++
++#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
++void nand_init (void)
++{
++ /* Setup Smart Media, fitst enable the address range of CS3 */
++ /* *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia; */
++ at91_sys_setbit(AT91C_EBI_CS3A_SMC_SmartMedia, AT91_EBI_CSA);
++
++ /* Init Smartmedia Interface */
++ at91_sys_write(AT91_SMC2_CSR3, SMARTMEDIA_INIT);
+
+ /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
+- *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+- AT91C_PC3_BFBAA_SMWE;
+- *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+- AT91C_PC3_BFBAA_SMWE;
++ at91_set_A_periph(AT91_PIN_PC0, 0); /* BFCK */
++ at91_set_A_periph(AT91_PIN_PC1, 0); /* BFRDY/SMOE */
++ at91_set_A_periph(AT91_PIN_PC3, 0); /* BFBAA/SMWE */
+
+ /* Configure PC2 as input (signal READY of the SmartMedia) */
+- *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
+- *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
++ at91_set_gpio_input(AT91_PIN_PC2, 0);
+
+ /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
+- *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
+- *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
++ at91_set_gpio_input(AT91_PIN_PB1, 0);
+
+ /* PIOB and PIOC clock enabling */
+- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
+- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91RM9200_ID_PIOB);
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91RM9200_ID_PIOC);
+
+- if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
++ if (at91_get_gpio_value(AT91_PIN_PB1))
+ printf (" No SmartMedia card inserted\n");
+ #ifdef DEBUG
+ printf (" SmartMedia card inserted\n");
+@@ -140,3 +159,4 @@
+ printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
+ }
+ #endif
++
+diff -urN u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/led.c u-boot-2009.01/board/atmel/at91rm9200dk/led.c
+--- u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/led.c 2009-01-01 13:09:31.000000000 +0100
++++ u-boot-2009.01/board/atmel/at91rm9200dk/led.c 2009-01-01 15:53:56.000000000 +0100
+@@ -24,57 +24,105 @@
+
+ #include <common.h>
+ #include <asm/arch/AT91RM9200.h>
++/*#include <asm/arch/at91_pmc.h>*/
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
+
+-#define GREEN_LED AT91C_PIO_PB0
+-#define YELLOW_LED AT91C_PIO_PB1
+-#define RED_LED AT91C_PIO_PB2
++#define GREEN_LED AT91_PIN_PB0
++#define YELLOW_LED AT91_PIN_PB1
++#define RED_LED AT91_PIN_PB2
+
+-void green_LED_on(void)
++
++#define GREEN_LED_ON 0
++#define GREEN_LED_OFF 1
++#define YELLOW_LED_ON 0
++#define YELLOW_LED_OFF 1
++#define RED_LED_ON 0
++#define RED_LED_OFF 1
++
++#define TIME_SLICE 500000
++
++void yellow_LED_on(void)
++{
++ at91_set_gpio_value(YELLOW_LED, YELLOW_LED_ON);
++}
++
++void yellow_LED_off(void)
++{
++ at91_set_gpio_value(YELLOW_LED, YELLOW_LED_OFF);
++}
++
++void red_LED_on(void)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- PIOB->PIO_CODR = GREEN_LED;
++ at91_set_gpio_value(RED_LED, RED_LED_ON);
+ }
+
+-void yellow_LED_on(void)
++void red_LED_off(void)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- PIOB->PIO_CODR = YELLOW_LED;
++ at91_set_gpio_value(RED_LED, RED_LED_OFF);
+ }
+
+-void red_LED_on(void)
++void green_LED_on(void)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- PIOB->PIO_CODR = RED_LED;
++ at91_set_gpio_value(GREEN_LED, GREEN_LED_ON);
+ }
+
+-void green_LED_off(void)
++void green_LED_off(void)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- PIOB->PIO_SODR = GREEN_LED;
++ at91_set_gpio_value(GREEN_LED, GREEN_LED_OFF);
+ }
+
+-void yellow_LED_off(void)
++static void delay(unsigned int time)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- PIOB->PIO_SODR = YELLOW_LED;
++ volatile unsigned int counter = time;
++ while(counter > 0) counter--;
+ }
+
+-void red_LED_off(void)
++void green_LED_blink(unsigned int time)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- PIOB->PIO_SODR = RED_LED;
++ while(time > 0) {
++ green_LED_on();
++ delay(TIME_SLICE);
++ green_LED_off();
++ delay(TIME_SLICE);
++ time--;
++ }
+ }
+
++void yellow_LED_blink(unsigned int time)
++{
++ while(time > 0) {
++ yellow_LED_on();
++ delay(TIME_SLICE);
++ yellow_LED_off();
++ delay(TIME_SLICE);
++ time--;
++ }
++}
+
+-void coloured_LED_init (void)
++void red_LED_blink(unsigned int time)
+ {
+- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+- AT91PS_PMC PMC = AT91C_BASE_PMC;
+- PMC->PMC_PCER = (1 << AT91C_ID_PIOB); /* Enable PIOB clock */
+- /* Disable peripherals on LEDs */
+- PIOB->PIO_PER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+- /* Enable pins as outputs */
+- PIOB->PIO_OER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+- /* Turn all LEDs OFF */
+- PIOB->PIO_SODR = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
++ while(time > 0) {
++ red_LED_on();
++ delay(TIME_SLICE);
++ red_LED_off();
++ delay(TIME_SLICE);
++ time--;
++ }
+ }
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91C_PMC_PCER, 1 << AT91RM9200_ID_PIOB);
++
++ at91_set_gpio_output(GREEN_LED, 1);
++ at91_set_gpio_output(YELLOW_LED, 1);
++ at91_set_gpio_output(RED_LED, 1);
++
++ at91_set_gpio_value(GREEN_LED, GREEN_LED_OFF);
++ at91_set_gpio_value(YELLOW_LED, YELLOW_LED_OFF);
++ at91_set_gpio_value(RED_LED, RED_LED_ON);
++}
++
++
+diff -urN u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/mux.c u-boot-2009.01/board/atmel/at91rm9200dk/mux.c
+--- u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/mux.c 2009-01-01 13:09:31.000000000 +0100
++++ u-boot-2009.01/board/atmel/at91rm9200dk/mux.c 2009-01-01 16:38:01.000000000 +0100
+@@ -1,37 +1,29 @@
+ #include <config.h>
+ #include <common.h>
+ #include <asm/hardware.h>
++#include <asm/arch/at91_pio.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
+ #include <dataflash.h>
+
+ int AT91F_GetMuxStatus(void) {
+-#ifdef DATAFLASH_MMC_SELECT
+- AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+- AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+-
+-
+- if(AT91C_BASE_PIOB->PIO_ODSR & DATAFLASH_MMC_SELECT) {
+- return 1;
+- } else {
+- return 0;
+- }
+-#endif
++#ifdef CONFIG_CMD_AT91_SPIMUX
++ return at91_get_gpio_value(DATAFLASH_MMC_SELECT);
++#else
+ return 0;
++#endif
+ }
+
+-void AT91F_SelectMMC(void) {
+-#ifdef DATAFLASH_MMC_SELECT
+- AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+- AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+- /* Set Output */
+- AT91C_BASE_PIOB->PIO_SODR = DATAFLASH_MMC_SELECT;
++void AT91F_SelectMMC(void)
++{
++#ifdef CONFIG_CMD_AT91_SPIMUX
++ at91_set_gpio_output(DATAFLASH_MMC_SELECT, 1); /* Set in PIO mode and select SD-Card*/
+ #endif
+ }
+
+ void AT91F_SelectSPI(void) {
+-#ifdef DATAFLASH_MMC_SELECT
+- AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+- AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+- /* Clear Output */
+- AT91C_BASE_PIOB->PIO_CODR = DATAFLASH_MMC_SELECT;
++#ifdef CONFIG_CMD_AT91_SPIMUX
++ at91_set_gpio_output(DATAFLASH_MMC_SELECT, 0); /* Set in PIO mode and select SPI */
+ #endif
+ }
++
+
--- /dev/null
+diff -urN u-boot-2009.01-0rig/include/configs/at91rm9200df.h u-boot-2009.01/include/configs/at91rm9200df.h
+--- u-boot-2009.01-0rig/include/configs/at91rm9200df.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200df.h 2009-01-01 21:19:17.000000000 +0100
+@@ -0,0 +1,261 @@
++/*
++ * Rick Bronson <rick@efn.org>
++ *
++ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
++ *
++ * Configuration settings for the AT91RM9200EK board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200DF
++#define CONFIG_HOSTNAME at91rm9200df
++/* ARM asynchronous clock */
++#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
++#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
++/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
++#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
++#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
++#define CONFIG_AT91RM9200DF 1 /* Generic AT91RM9200 Board running from Dataflashcard */
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++#define USE_920T_MMU 1
++
++#define CONFIG_SKIP_LOWLEVEL_INIT /* Already done by dataflashboot */
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#ifndef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
++/* flash */
++#define MC_PUIA_VAL 0x00000000
++#define MC_PUP_VAL 0x00000000
++#define MC_PUER_VAL 0x00000000
++#define MC_ASR_VAL 0x00000000
++#define MC_AASR_VAL 0x00000000
++#define EBI_CFGR_VAL 0x00000000
++#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
++
++/* clocks */
++#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
++#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
++#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
++
++/* sdram */
++#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
++#define PIOC_BSR_VAL 0x00000000
++#define PIOC_PDR_VAL 0xFFFF0000
++#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
++#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
++#define SDRAM 0x20000000 /* address of the SDRAM */
++#define SDRAM1 0x20000080 /* address of the SDRAM */
++#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
++#define SDRC_MR_VAL 0x00000002 /* Precharge All */
++#define SDRC_MR_VAL1 0x00000004 /* refresh */
++#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
++#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
++#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
++#else
++#define CONFIG_SKIP_RELOCATE_UBOOT
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
++
++#define CONFIG_BAUDRATE 115200
++
++/*
++ * Hardware drivers
++ */
++
++/* define one of these to choose the DBGU, USART0 or USART1 as console */
++#define CONFIG_DBGU
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++
++#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
++
++#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
++
++#define CONFIG_BOOTDELAY 3
++/* #define CONFIG_ENV_OVERWRITE 1 */
++
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE
++#define CONFIG_BOOTP_BOOTPATH
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_HOSTNAME
++
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_NAND
++#define CONFIG_CMD_AT91_SPIMUX
++#define CONFIG_CMD_ETHINIT
++
++#define CONFIG_DOS_PARTITION 1
++#define CONFIG_MMC 1
++#define CONFIG_SUPPORT_VFAT 1
++#define CONFIG__MMC_BASE 0xFFFB4000 /* From AT91RM9200.h*/
++#define CONFIG__MMC_BLOCKSIZE 512
++
++#define CONFIG_NAND_LEGACY
++
++#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
++#define SECTORSIZE 512
++
++#define ADDR_COLUMN 1
++#define ADDR_PAGE 2
++#define ADDR_COLUMN_PAGE 3
++
++#define NAND_ChipID_UNKNOWN 0x00
++#define NAND_MAX_FLOORS 1
++#define NAND_MAX_CHIPS 1
++
++#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
++#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
++
++#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
++#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
++#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
++
++#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
++
++#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
++#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
++#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
++#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
++/* the following are NOP's in our implementation */
++#define NAND_CTL_CLRALE(nandptr)
++#define NAND_CTL_SETALE(nandptr)
++#define NAND_CTL_CLRCLE(nandptr)
++#define NAND_CTL_SETCLE(nandptr)
++
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x20000000
++#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
++
++#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
++#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
++
++#define CONFIG_DRIVER_ETHER
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_AT91C_USE_RMII
++
++/* AC Characteristics */
++/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
++#define DATAFLASH_TCSS (0xC << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++
++#define CONFIG_HAS_DATAFLASH 1
++#undef BOARD_LATE_INIT
++
++#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
++#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
++#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
++#define CONFIG__SUPPORT_BLOCK_ERASE 1
++
++#define PHYS_FLASH_1 0x10000000
++#define PHYS_FLASH_SIZE 0x800000 /* 2 megs main flash */
++#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
++#define CONFIG_SYS_MAX_FLASH_BANKS 1
++#define CONFIG_SYS_MAX_FLASH_SECT 256
++#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
++#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
++
++#define CONFIG_ENV_IS_IN_DATAFLASH
++#define CONFIG_NEW_PARTITION 1
++
++#ifdef CONFIG_ENV_IS_IN_DATAFLASH
++#ifdef CONFIG_NEW_PARTITION
++#define CONFIG_ENV_OFFSET 0x21000
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x2000 /* 8 * 1056 really , but start.s is not OK with this*/
++#else
++#define CONFIG_ENV_OFFSET 0x20000
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
++#endif
++#else
++#define CONFIG_ENV_IS_IN_FLASH 1
++#ifdef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
++#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
++#else
++#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
++#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
++
++#if defined(CONFIG_AT91RM9200DK)
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
++#else
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
++#endif
++
++#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
++
++#ifdef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
++#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
++#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
++#else
++#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
++#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
++#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
++
++#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
++#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
++
++#define CONFIG_SYS_HZ 1000
++#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
++ /* AT91C_TC_TIMER_DIV1_CLOCK */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
++#define CONFIG_STACKSIZE_FIQ (4*1024)
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++#endif
+diff -urN u-boot-2009.01-0rig/include/configs/at91rm9200ek.h u-boot-2009.01/include/configs/at91rm9200ek.h
+--- u-boot-2009.01-0rig/include/configs/at91rm9200ek.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200ek.h 2009-01-01 17:13:31.000000000 +0100
+@@ -0,0 +1,251 @@
++/*
++ * Rick Bronson <rick@efn.org>
++ *
++ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
++ *
++ * Configuration settings for the AT91RM9200EK board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200EK
++#define CONFIG_HOSTNAME at91rm9200ek
++/* ARM asynchronous clock */
++#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
++#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
++/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
++#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
++#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
++#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++#define USE_920T_MMU 1
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#ifndef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
++/* flash */
++#define MC_PUIA_VAL 0x00000000
++#define MC_PUP_VAL 0x00000000
++#define MC_PUER_VAL 0x00000000
++#define MC_ASR_VAL 0x00000000
++#define MC_AASR_VAL 0x00000000
++#define EBI_CFGR_VAL 0x00000000
++#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
++
++/* clocks */
++#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
++#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
++#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
++
++/* sdram */
++#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
++#define PIOC_BSR_VAL 0x00000000
++#define PIOC_PDR_VAL 0xFFFF0000
++#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
++#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
++#define SDRAM 0x20000000 /* address of the SDRAM */
++#define SDRAM1 0x20000080 /* address of the SDRAM */
++#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
++#define SDRC_MR_VAL 0x00000002 /* Precharge All */
++#define SDRC_MR_VAL1 0x00000004 /* refresh */
++#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
++#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
++#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
++#else
++#define CONFIG_SKIP_RELOCATE_UBOOT
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
++
++#define CONFIG_BAUDRATE 115200
++
++/*
++ * Hardware drivers
++ */
++
++/* define one of these to choose the DBGU, USART0 or USART1 as console */
++#define CONFIG_DBGU
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++
++#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
++
++#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
++
++#define CONFIG_BOOTDELAY 3
++/* #define CONFIG_ENV_OVERWRITE 1 */
++
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE
++#define CONFIG_BOOTP_BOOTPATH
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_HOSTNAME
++
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_NAND
++#define CONFIG_CMD_AT91_SPIMUX
++#define CONFIG_CMD_ETHINIT
++
++#define CONFIG_NAND_LEGACY
++
++#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
++#define SECTORSIZE 512
++
++#define ADDR_COLUMN 1
++#define ADDR_PAGE 2
++#define ADDR_COLUMN_PAGE 3
++
++#define NAND_ChipID_UNKNOWN 0x00
++#define NAND_MAX_FLOORS 1
++#define NAND_MAX_CHIPS 1
++
++#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
++#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
++
++#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
++#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
++#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
++
++#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
++
++#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
++#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
++#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
++#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
++/* the following are NOP's in our implementation */
++#define NAND_CTL_CLRALE(nandptr)
++#define NAND_CTL_SETALE(nandptr)
++#define NAND_CTL_CLRCLE(nandptr)
++#define NAND_CTL_SETCLE(nandptr)
++
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x20000000
++#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
++
++#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
++#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
++
++#define CONFIG_DRIVER_ETHER
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_AT91C_USE_RMII
++
++/* AC Characteristics */
++/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
++#define DATAFLASH_TCSS (0xC << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++
++#define CONFIG_HAS_DATAFLASH 1
++#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
++#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
++#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
++#define CONFIG__SUPPORT_BLOCK_ERASE 1
++
++#define PHYS_FLASH_1 0x10000000
++#define PHYS_FLASH_SIZE 0x800000 /* 2 megs main flash */
++#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
++#define CONFIG_SYS_MAX_FLASH_BANKS 1
++#define CONFIG_SYS_MAX_FLASH_SECT 256
++#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
++#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
++
++#undef CONFIG_ENV_IS_IN_DATAFLASH
++#define CONFIG_NEW_PARTITION 1
++
++#ifdef CONFIG_ENV_IS_IN_DATAFLASH
++#ifdef CONFIG_NEW_PARTITION
++#define CONFIG__ENV_OFFSET 0x21000
++#define CONFIG__ENV_ADDR (CONFIG_SYS__DATAFLASH_LOGIC_ADDR_CS0 + CONFIG__ENV_OFFSET)
++#define CONFIG__ENV_SIZE 0x2000 /* 8 * 1056 really , but start.s is not OK with this*/
++> #else
++#define CONFIG_ENV_OFFSET 0x20000
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
++#endif
++#else
++#define CONFIG_ENV_IS_IN_FLASH 1
++#ifdef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
++#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
++#else
++#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
++#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
++
++#if defined(CONFIG_AT91RM9200DK)
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
++#else
++#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
++#endif
++
++#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
++
++#ifdef CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
++#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
++#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
++#else
++#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
++#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
++#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
++#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
++
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
++
++#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
++#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
++
++#define CONFIG_SYS_HZ 1000
++#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
++ /* AT91C_TC_TIMER_DIV1_CLOCK */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
++#define CONFIG_STACKSIZE_FIQ (4*1024)
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++#endif
+diff -urN u-boot-2009.01-0rig/Makefile u-boot-2009.01/Makefile
+--- u-boot-2009.01-0rig/Makefile 2009-01-02 10:03:11.000000000 +0100
++++ u-boot-2009.01/Makefile 2009-01-01 21:31:34.000000000 +0100
+@@ -2568,6 +2568,12 @@
+ at91rm9200dk_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
+
++at91rm9200df_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
++
++at91rm9200ek_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
++
+ cmc_pu2_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
+
--- /dev/null
+diff -urN u-boot-2008.10-0rig/Makefile u-boot-2008.10/Makefile
+--- u-boot-2008.10-0rig/Makefile 2008-12-28 14:07:30.000000000 +0100
++++ u-boot-2008.10/Makefile 2008-12-28 14:06:28.000000000 +0100
+@@ -2541,6 +2541,22 @@
+ fi;
+ @$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
+
++at91sam9g20ek_nandflash_config \
++at91sam9g20ek_dataflash_cs0_config \
++at91sam9g20ek_dataflash_cs1_config \
++at91sam9g20ek_config : unconfig
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CONFIG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CONFIG_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9g20ek arm arm926ejs at91sam9g20ek atmel at91
++
+ at91sam9261ek_nandflash_config \
+ at91sam9261ek_dataflash_cs0_config \
+ at91sam9261ek_dataflash_cs3_config \
+Index: include/configs/at91sam9g20ek.h
+===================================================================
+--- a/include/configs/at91sam9g20ek.h (.../u-boot-1.3.4) (revision 0)
++++ b/include/configs/at91sam9g20ek.h (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1,198 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * Configuation settings for the AT91SAM9G20EK board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++/* ARM asynchronous clock */
++#define AT91_MAIN_CLOCK 396288000 /* from 18.432 MHz crystal */
++#define AT91_MASTER_CLOCK 132096000 /* peripheral = main / 3 */
++#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
++#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/
++#define CONFIG_AT91SAM9G20EK 1 /* on an AT91SAM9G20EK Board */
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#define CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_ATMEL_USART 1
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#define CONFIG_USART3 1 /* USART 3 is DBGU */
++
++#define CONFIG_BOOTDELAY 3
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE 1
++#define CONFIG_BOOTP_BOOTPATH 1
++#define CONFIG_BOOTP_GATEWAY 1
++#define CONFIG_BOOTP_HOSTNAME 1
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++#undef CONFIG_CMD_BDI
++#undef CONFIG_CMD_IMI
++#undef CONFIG_CMD_AUTOSCRIPT
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_LOADS
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_CMD_PING 1
++#define CONFIG_CMD_DHCP 1
++#define CONFIG_CMD_NAND
++#define CONFIG_CMD_USB 1
++
++/* SDRAM */
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x20000000
++#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
++
++/* DataFlash */
++#define CONFIG_HAS_DATAFLASH 1
++#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
++#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
++#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
++#define AT91_SPI_CLK 15000000
++#define DATAFLASH_TCSS (0x22 << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++#define AT91SAM9260_BASE_SPI0 0xfffc8000
++/* NAND flash */
++#define NAND_MAX_CHIPS 1
++#define CONFIG_SYS_MAX_NAND_DEVICE 1
++#define CONFIG_SYS_NAND_BASE 0x40000000
++#define CONFIG_SYS_NAND_DBW_8 1
++
++/* NOR flash - no real flash on this board */
++#define CONFIG_SYS_NO_FLASH 1
++
++/* Ethernet */
++#define CONFIG_MACB 1
++#define CONFIG_RMII 1
++#define CONFIG_NET_MULTI 1
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_RESET_PHY_R 1
++#define AT91SAM9260_BASE_EMAC 0xfffc4000
++/* USB */
++#define CONFIG_USB_OHCI_NEW 1
++#define LITTLEENDIAN 1
++#define CONFIG_DOS_PARTITION 1
++#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
++#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9G20_UHP_BASE */
++#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g20"
++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
++#define CONFIG_USB_STORAGE 1
++
++#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
++
++#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
++#define CONFIG_SYS_MEMTEST_END 0x23e00000
++
++#ifdef CONFIG_USE_DATAFLASH_CS0
++
++/* bootstrap + u-boot + env + linux in dataflash on CS0 */
++#define CONFIG_ENV_IS_IN_DATAFLASH 1
++#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
++#define CONFIG_ENV_OFFSET 0x4200
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
++#elif CONFIG_USE_DATAFLASH_CS1
++
++/* bootstrap + u-boot + env + linux in dataflash on CS1 */
++#define CONFIG_ENV_IS_IN_DATAFLASH 1
++#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
++#define CONFIG_ENV_OFFSET 0x4200
++#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
++#define CONFIG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
++#else /* CONFIG_USE_NANDFLASH */
++
++/* bootstrap + u-boot + env + linux in nandflash */
++#define CONFIG_ENV_IS_IN_NAND 1
++#define CONFIG_ENV_OFFSET 0x60000
++#define CONFIG_ENV_OFFSET_REDUND 0x80000
++#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
++#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock5 " \
++ "mtdparts=at91_nand:128k(bootstrap)ro," \
++ "256k(uboot)ro,128k(env1)ro," \
++ "128k(env2)ro,2M(linux),-(root) " \
++ "rw rootfstype=jffs2"
++
++#endif
++
++#define CONFIG_BAUDRATE 115200
++#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
++
++#define CONFIG_SYS_PROMPT "U-Boot> "
++#define CONFIG_SYS_CBSIZE 256
++#define CONFIG_SYS_MAXARGS 16
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
++#define CONFIG_SYS_LONGHELP 1
++#define CONFIG_CMDLINE_EDITING 1
++
++#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++
++#endif
+Index: board/atmel/at91sam9g20ek/nand.c
+===================================================================
+--- a/board/atmel/at91sam9g20ek/nand.c (.../u-boot-1.3.4) (revision 0)
++++ b/board/atmel/at91sam9g20ek/nand.c (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1,78 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91_pio.h>
++
++#include <nand.h>
++
++/*
++ * hardware specific access to control-lines
++ */
++#define MASK_ALE (1 << 21) /* our ALE is AD21 */
++#define MASK_CLE (1 << 22) /* our CLE is AD22 */
++
++static void at91sam9g20ek_nand_hwcontrol(struct mtd_info *mtd,
++ int cmd, unsigned int ctrl)
++{
++ struct nand_chip *this = mtd->priv;
++
++ if (ctrl & NAND_CTRL_CHANGE) {
++ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
++ IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
++
++ if (ctrl & NAND_CLE)
++ IO_ADDR_W |= MASK_CLE;
++ if (ctrl & NAND_ALE)
++ IO_ADDR_W |= MASK_ALE;
++
++ at91_set_gpio_value(AT91_PIN_PC14, !(ctrl & NAND_NCE));
++ this->IO_ADDR_W = (void *) IO_ADDR_W;
++ }
++
++ if (cmd != NAND_CMD_NONE)
++ writeb(cmd, this->IO_ADDR_W);
++}
++
++static int at91sam9g20ek_nand_ready(struct mtd_info *mtd)
++{
++ return at91_get_gpio_value(AT91_PIN_PC13);
++}
++
++int board_nand_init(struct nand_chip *nand)
++{
++ nand->ecc.mode = NAND_ECC_SOFT;
++#ifdef CONFIG_SYS_NAND_DBW_16
++ nand->options = NAND_BUSWIDTH_16;
++#endif
++ nand->cmd_ctrl = at91sam9g20ek_nand_hwcontrol;
++ nand->dev_ready = at91sam9g20ek_nand_ready;
++ nand->chip_delay = 20;
++
++ return 0;
++}
+Index: board/atmel/at91sam9g20ek/at91sam9g20ek.c
+===================================================================
+--- a/board/atmel/at91sam9g20ek/at91sam9g20ek.c (.../u-boot-1.3.4) (revision 0)
++++ b/board/atmel/at91sam9g20ek/at91sam9g20ek.c (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1,250 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/at91sam9260_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
++#include <net.h>
++#endif
++#include <netdev.h>
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++static void at91sam9g20ek_serial_hw_init(void)
++{
++#ifdef CONFIG_USART0
++ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
++ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
++#endif
++
++#ifdef CONFIG_USART1
++ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
++ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
++#endif
++
++#ifdef CONFIG_USART2
++ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
++#endif
++
++#ifdef CONFIG_USART3 /* DBGU */
++ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
++#endif
++}
++
++#ifdef CONFIG_CMD_NAND
++static void at91sam9g20ek_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
++ AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(3));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CONFIG_SYS_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CONFIG_SYS_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(3));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(AT91_PIN_PC13, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(AT91_PIN_PC14, 1);
++}
++#endif
++
++#ifdef CONFIG_HAS_DATAFLASH
++static void at91sam9g20ek_spi_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
++ at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
++
++ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
++ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
++ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
++}
++#endif
++
++#ifdef CONFIG_MACB
++static void at91sam9g20ek_macb_hw_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
++
++ /*
++ * Disable pull-up on:
++ * RXDV (PA17) => PHY normal mode (not Test mode)
++ * ERX0 (PA14) => PHY ADDR0
++ * ERX1 (PA15) => PHY ADDR1
++ * ERX2 (PA25) => PHY ADDR2
++ * ERX3 (PA26) => PHY ADDR3
++ * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
++ *
++ * PHY has internal pull-down
++ */
++ writel(pin_to_mask(AT91_PIN_PA14) |
++ pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA17) |
++ pin_to_mask(AT91_PIN_PA25) |
++ pin_to_mask(AT91_PIN_PA26) |
++ pin_to_mask(AT91_PIN_PA28),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
++
++ /* Need to reset PHY -> 500ms reset */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (AT91_RSTC_ERSTL & (0x0D << 8)) |
++ AT91_RSTC_URSTEN);
++
++ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
++
++ /* Wait for end hardware reset */
++ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
++
++ /* Restore NRST value */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (AT91_RSTC_ERSTL & (0x0 << 8)) |
++ AT91_RSTC_URSTEN);
++
++ /* Re-enable pull-up */
++ writel(pin_to_mask(AT91_PIN_PA14) |
++ pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA17) |
++ pin_to_mask(AT91_PIN_PA25) |
++ pin_to_mask(AT91_PIN_PA26) |
++ pin_to_mask(AT91_PIN_PA28),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
++
++ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
++ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
++ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
++ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
++ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
++ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
++ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
++ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
++ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
++ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
++
++#ifndef CONFIG_RMII
++ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
++ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
++ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
++ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
++ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
++#if defined(CONFIG_AT91SAM9G20EK)
++ /*
++ * use PA10, PA11 for ETX2, ETX3.
++ * PA23 and PA24 are for TWI EEPROM
++ */
++ at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
++#else
++ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
++#endif
++ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
++#endif
++
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9G20EK-Board */
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91sam9g20ek_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ at91sam9g20ek_nand_hw_init();
++#endif
++#ifdef CONFIG_HAS_DATAFLASH
++ at91sam9g20ek_spi_hw_init();
++#endif
++#ifdef CONFIG_MACB
++ at91sam9g20ek_macb_hw_init();
++#endif
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_MACB
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
+Index: board/atmel/at91sam9g20ek/led.c
+===================================================================
+--- a/board/atmel/at91sam9g20ek/led.c (.../u-boot-1.3.4) (revision 0)
++++ b/board/atmel/at91sam9g20ek/led.c (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1,64 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++
++#define RED_LED AT91_PIN_PA9 /* this is the power led */
++#define GREEN_LED AT91_PIN_PA6 /* this is the user led */
++
++void red_LED_on(void)
++{
++ at91_set_gpio_value(RED_LED, 1);
++}
++
++void red_LED_off(void)
++{
++ at91_set_gpio_value(RED_LED, 0);
++}
++
++void green_LED_on(void)
++{
++ at91_set_gpio_value(GREEN_LED, 0);
++}
++
++void green_LED_off(void)
++{
++ at91_set_gpio_value(GREEN_LED, 1);
++}
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
++
++ at91_set_gpio_output(RED_LED, 1);
++ at91_set_gpio_output(GREEN_LED, 1);
++
++ at91_set_gpio_value(RED_LED, 0);
++ at91_set_gpio_value(GREEN_LED, 1);
++}
+Index: board/atmel/at91sam9g20ek/partition.c
+===================================================================
+--- a/board/atmel/at91sam9g20ek/partition.c (.../u-boot-1.3.4) (revision 0)
++++ b/board/atmel/at91sam9g20ek/partition.c (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1,40 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf@atmel.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++#include <common.h>
++#include <config.h>
++#include <asm/hardware.h>
++#include <dataflash.h>
++
++AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
++
++struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
++ {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
++ {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1}
++};
++
++/*define the area offsets*/
++dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
++ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
++ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
++ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
++ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
++ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
++};
+Index: board/atmel/at91sam9g20ek/config.mk
+===================================================================
+--- a/board/atmel/at91sam9g20ek/config.mk (.../u-boot-1.3.4) (revision 0)
++++ b/board/atmel/at91sam9g20ek/config.mk (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1 @@
++TEXT_BASE = 0x23f00000
+Index: board/atmel/at91sam9g20ek/Makefile
+===================================================================
+--- a/board/atmel/at91sam9g20ek/Makefile (.../u-boot-1.3.4) (revision 0)
++++ b/board/atmel/at91sam9g20ek/Makefile (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -0,0 +1,57 @@
++#
++# (C) Copyright 2003-2008
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Stelian Pop <stelian.pop@leadtechdesign.com>
++# Lead Tech Design <www.leadtechdesign.com>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y += at91sam9g20ek.o
++COBJS-y += led.o
++COBJS-y += partition.o
++COBJS-$(CONFIG_CMD_NAND) += nand.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+Index: include/asm-arm/arch-at91/hardware.h
+===================================================================
+--- a/include/asm-arm/arch-at91/hardware.h (.../u-boot-1.3.4) (revision 8417)
++++ b/include/asm-arm/arch-at91/hardware.h (.../u-boot-1.3.4-exp) (revision 8417)
+@@ -18,7 +18,7 @@
+
+ #if defined(CONFIG_AT91RM9200)
+ #include <asm/arch/at91rm9200.h>
+-#elif defined(CONFIG_AT91SAM9260)
++#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
+ #include <asm/arch/at91sam9260.h>
+ #define AT91_BASE_EMAC AT91SAM9260_BASE_EMAC
+ #define AT91_BASE_SPI AT91SAM9260_BASE_SPI0
+diff -urN u-boot-2008.10-0rig/include/asm-arm/mach-types.h u-boot-2008.10/include/asm-arm/mach-types.h
+--- u-boot-2008.10-0rig/include/asm-arm/mach-types.h 2008-10-18 21:30:31.000000000 +0200
++++ u-boot-2008.10/include/asm-arm/mach-types.h 2008-12-28 23:40:55.000000000 +0100
+@@ -23998,6 +23998,18 @@
+ # define machine_is_geneva() (0)
+ #endif
+
++#ifdef CONFIG_MACH_AT91SAM9G20EK
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9G20EK
++# endif
++# define machine_is_at91sam9g20ek() (machine_arch_type == MACH_TYPE_AT91SAM9G20EK)
++#else
++# define machine_is_at91sam9g20ek() (0)
++#endif
++
+ /*
+ * These have not yet been registered
+ */
+diff -urN u-boot-2008.10-0rig/board/atmel/at91sam9g20ek/at91sam9g20ek.c u-boot-2008.10/board/atmel/at91sam9g20ek/at91sam9g20ek.c
+--- u-boot-2008.10-0rig/board/atmel/at91sam9g20ek/at91sam9g20ek.c 2008-12-28 14:09:52.000000000 +0100
++++ u-boot-2008.10/board/atmel/at91sam9g20ek/at91sam9g20ek.c 2008-12-28 23:56:09.000000000 +0100
+@@ -248,3 +248,13 @@
+ #endif
+ }
+ #endif
++
++int board_eth_init(bd_t *bis)
++{
++ int rc = 0;
++#ifdef CONFIG_MACB
++ rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
++#endif
++ return rc;
++}
++
--- /dev/null
+diff -urN u-boot-2008.10-0rig/drivers/net/macb.c u-boot-2008.10/drivers/net/macb.c
+--- u-boot-2008.10-0rig/drivers/net/macb.c 2008-10-18 21:30:31.000000000 +0200
++++ u-boot-2008.10/drivers/net/macb.c 2008-12-28 23:44:11.000000000 +0100
+@@ -415,18 +415,16 @@
+
+ /* choose RMII or MII mode. This depends on the board */
+ #ifdef CONFIG_RMII
+-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+- defined(CONFIG_AT91SAM9263)
+- macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
+-#else
++#if defined(CONFIG_AVR32)
+ macb_writel(macb, USRIO, 0);
+-#endif
+ #else
+-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+- defined(CONFIG_AT91SAM9263)
+- macb_writel(macb, USRIO, MACB_BIT(CLKEN));
++ macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
++#endif
+ #else
++#if defined(CONFIG_AVR32)
+ macb_writel(macb, USRIO, MACB_BIT(MII));
++#else
++ macb_writel(macb, USRIO, MACB_BIT(CLKEN));
+ #endif
+ #endif /* CONFIG_RMII */
+
--- /dev/null
+diff -urN u-boot-2008.10-0rig//tools/Makefile u-boot-2008.10/tools/Makefile
+--- u-boot-2008.10-0rig//tools/Makefile 2008-12-31 17:51:29.000000000 +0100
++++ u-boot-2008.10/tools/Makefile 2008-12-31 19:38:15.000000000 +0100
+@@ -37,6 +37,11 @@
+ #OBJ_FILES += mpc86x_clk.o
+ #endif
+
++ifeq ($(VENDOR),atmel)
++BINS+= raw-at91$(SFX) sx-at91$(SFX)
++OBJS+= raw-at91.o sx-at91.o
++endif
++
+ LIBFDT_OBJ_FILES = $(obj)fdt.o $(obj)fdt_ro.o $(obj)fdt_rw.o $(obj)fdt_strerror.o $(obj)fdt_wip.o
+
+ LOGO_H = $(OBJTREE)/include/bmp_logo.h
+@@ -175,6 +180,14 @@
+ $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
+ $(STRIP) $@
+
++$(obj)raw-at91$(SFX): $(obj)raw-at91.o
++ $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
++ $(STRIP) $@
++
++$(obj)sx-at91$(SFX): $(obj)sx-at91.o
++ $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
++ $(STRIP) $@
++
+ $(obj)envcrc.o: $(src)envcrc.c
+ $(CC) -g $(CFLAGS) -c -o $@ $<
+
+@@ -223,6 +236,12 @@
+ $(obj)fdt_wip.o: $(obj)fdt_wip.c
+ $(CC) -g $(FIT_CFLAGS) -c -o $@ $<
+
++$(obj)sx-at91.o: $(src)sx-at91.c
++ $(CC) -g $(CFLAGS) -c -o $@ $<
++
++$(obj)raw-at91.o: $(src)raw-at91.c
++ $(CC) -g $(CFLAGS) -c -o $@ $<
++
+ subdirs:
+ ifeq ($(TOOLSUBDIRS),)
+ @:
+diff -urN u-boot-2008.10-0rig//tools/raw-at91.c u-boot-2008.10/tools/raw-at91.c
+--- u-boot-2008.10-0rig//tools/raw-at91.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2008.10/tools/raw-at91.c 2008-12-31 19:26:23.000000000 +0100
+@@ -0,0 +1,225 @@
++/*
++ * xmodem-at91.c
++ *
++ * A simple program using xmodem/1kxmode upload file to at91rm9200 based board.
++ * Created by (C) Copyright 2004
++ * Linhang.Zhang, Jilin University of PR.China, linxing@jlu.edu.cn.
++ *
++ *************************************************************************************
++ *
++ * Modified 01-Feb-2005 (C)Copyright 2005
++ * Marco Cavallini, www.KoanSoftware.com - ITALY, m.cavallini@koansoftware.com
++ * - edited indentations and changed break usage in switch statement.
++ * - added "\r" to printf
++ *
++ * - build with
++ * gcc sx-at91.c -o sx-at91
++ *
++ * - Howto use this program with minicom/xminicom and AT91
++ * start minicom or xminicom
++ * edit Options / File transfer protocol,
++ * add a name (for example J) like the following example
++ *
++ * | Name Program Name U/D FullScr IO-Red. Multi |
++ * | A zmodem /usr/bin/sz -vv -b Y U N Y Y |
++ * | B ymodem /usr/bin/sb -vv Y U N Y Y |
++ * | C xmodem /usr/bin/sx -vv Y U N Y N |
++ * | D zmodem /usr/bin/rz -vv -b -E N D N Y Y |
++ * | E ymodem /usr/bin/rb -vv N D N Y Y |
++ * | F xmodem /usr/bin/rx -vv Y D N Y N |
++ * | G kermit /usr/bin/kermit -i -l %l -s Y U Y N N |
++ * | H kermit /usr/bin/kermit -i -l %l -r N D Y N N |
++ * | I ascii /usr/bin/ascii-xfr -dsv Y U N Y N |
++ * | J at91 /home/koan/xmodem/xs-at91 Y U Y N N |
++ * | K - |
++ * | L - |
++ *
++ * save and use it selecting at91 protocol when you start an Xmodem upload to AT91
++ *
++ *************************************************************************************
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include <string.h>
++#include <unistd.h>
++#include <sys/types.h>
++#include <sys/stat.h>
++#include <fcntl.h>
++#include <termios.h>
++#include <errno.h>
++#include <time.h>
++
++#define TRUE 1
++#define FALSE 0
++#define LINESIZE 1024
++
++/*********/
++
++#define SERIAL_DEVICE "/dev/ttyS0"
++#define MYBAUDRATE B115200
++
++/***************SUB PROGRAM*******/
++
++int Initial_SerialPort(void)
++{
++ int fd;
++ struct termios options;
++
++ fd = open( SERIAL_DEVICE , O_RDWR | O_NOCTTY | O_NDELAY );
++ if ( fd == -1 )
++ {
++ /*open error!*/
++ perror("Can't open serial port!");
++ return -1;
++ }
++
++ /*Get the current options for the port...*/
++ tcgetattr(fd, &options);
++
++ /*Set the baud rates to BAUDRATE...*/
++ cfsetispeed(&options,MYBAUDRATE);
++ cfsetospeed(&options,MYBAUDRATE);
++ tcsetattr(fd, TCSANOW, &options);
++ if (0 != tcgetattr(fd, &options))
++ {
++ perror("SetupSerial 1");
++ return -1;
++ }
++
++ /*
++ * 8bit Data,no partity,1 stop bit...
++ */
++ options.c_cflag &= ~PARENB;
++ options.c_cflag &= ~CSTOPB;
++ options.c_cflag &= ~CSIZE;
++ options.c_cflag |= CS8;
++ tcflush(fd,TCIFLUSH);
++
++ /***Choosing Raw Input*/
++ options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
++ options.c_oflag &= ~OPOST;
++
++ /*
++ * Set the new options for the port...
++ */
++ if (0 != tcsetattr(fd, TCSANOW, &options))
++ {
++ perror("SetupSerial error");
++ return -1 ;
++ }
++
++ return fd ;
++}
++
++/******************************/
++void ClearReceiveBuffer(int fd)
++{
++ unsigned char tmp;
++ while ((read(fd,&tmp,1))>0);
++
++ return;
++}
++unsigned char filebuf[ LINESIZE+2 ];
++unsigned char outbuf[ LINESIZE+2 ];
++FILE *datafile;
++int fd;
++
++static unsigned int ChCnt=0;
++static unsigned int ChIx;
++unsigned char GetChar(unsigned char *ch)
++/*
++ * SUCCESS: Return TRUE
++ * FAILURE: Return FALSE
++ */
++{
++
++ if(ChCnt == 0) {
++ ChCnt = fread( filebuf, sizeof(char), LINESIZE, datafile);
++ ChIx = 0;
++ }
++ if(ChCnt > 0) {
++ *ch = filebuf[ChIx++];
++ ChCnt--;
++ return TRUE;
++ } else {
++ return FALSE; /* Reached End of File */
++ }
++}
++
++/********************************/
++void delay()
++{
++}
++
++int main(int argc,char *argv[])
++{
++ char *data_file_name;
++ int len;
++ unsigned char c;
++ int complete,i,sts;
++
++ printf("raw-at91 started...\r\n");
++
++ /* open serial port1 */
++ if ( (fd = Initial_SerialPort()) == -1)
++ return -1 ;
++
++ data_file_name = argv[1];
++
++ if((datafile=fopen(data_file_name,"rb"))==NULL)
++ {
++ perror ("Can't open file!");
++ return -1 ;
++ }
++
++ /*******************************/
++
++ complete = 0;
++ /* ClearReceiveBuffer(fd); */
++
++ /* while((read(fd,&ack_id,1))<=0);*/
++
++ /* printf("%c\r\n",ack_id); */
++ while(!complete)
++ {
++ for(i=0;i < LINESIZE; i++) { /* A line more than 1024 characters will have problems...*/
++ if((sts = GetChar(&outbuf[i]))) {
++ /* Sts = Success */
++ if((c = outbuf[i]) == '\n') { /* Found end of Line - Start Processing*/
++ outbuf[i+1] = '\0'; /* Terminate String*/
++ break;
++ }
++ } else {
++ /* Sts = Failure - End of File */
++ outbuf[i] = '\n';
++ outbuf[i+1] = '\0';
++ complete = 1;
++ }
++ }
++ printf("%s",outbuf); /* Inform user */
++ len = strlen((char *)outbuf);
++ write(fd,outbuf,strlen((char *)outbuf));
++ for(i = 0; i < 500000000; i++ ) delay();
++ while((read(fd,&c,1))<=0) putchar(c);
++ printf(" ");
++ }
++ fclose(datafile);
++ close(fd);
++ return 0;
++}
+diff -urN u-boot-2008.10-0rig//tools/sx-at91.c u-boot-2008.10/tools/sx-at91.c
+--- u-boot-2008.10-0rig//tools/sx-at91.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2008.10/tools/sx-at91.c 2008-12-31 19:26:23.000000000 +0100
+@@ -0,0 +1,300 @@
++/*
++ * xmodem-at91.c
++ *
++ * A simple program using xmodem/1kxmode upload file to at91rm9200 based board.
++ * Created by (C) Copyright 2004
++ * Linhang.Zhang, Jilin University of PR.China, linxing@jlu.edu.cn.
++ *
++ *************************************************************************************
++ *
++ * Modified 01-Feb-2005 (C)Copyright 2005
++ * Marco Cavallini, www.KoanSoftware.com - ITALY, m.cavallini@koansoftware.com
++ * - edited indentations and changed break usage in switch statement.
++ * - added "\r" to printf
++ *
++ * - build with
++ * gcc sx-at91.c -o sx-at91
++ *
++ * - Howto use this program with minicom/xminicom and AT91
++ * start minicom or xminicom
++ * edit Options / File transfer protocol,
++ * add a name (for example J) like the following example
++ *
++ * | Name Program Name U/D FullScr IO-Red. Multi |
++ * | A zmodem /usr/bin/sz -vv -b Y U N Y Y |
++ * | B ymodem /usr/bin/sb -vv Y U N Y Y |
++ * | C xmodem /usr/bin/sx -vv Y U N Y N |
++ * | D zmodem /usr/bin/rz -vv -b -E N D N Y Y |
++ * | E ymodem /usr/bin/rb -vv N D N Y Y |
++ * | F xmodem /usr/bin/rx -vv Y D N Y N |
++ * | G kermit /usr/bin/kermit -i -l %l -s Y U Y N N |
++ * | H kermit /usr/bin/kermit -i -l %l -r N D Y N N |
++ * | I ascii /usr/bin/ascii-xfr -dsv Y U N Y N |
++ * | J at91 /home/koan/xmodem/xs-at91 Y U Y N N |
++ * | K - |
++ * | L - |
++ *
++ * save and use it selecting at91 protocol when you start an Xmodem upload to AT91
++ *
++ *************************************************************************************
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <stdio.h>
++#include <stdlib.h>
++#include <unistd.h>
++#include <sys/types.h>
++#include <sys/stat.h>
++#include <fcntl.h>
++#include <termios.h>
++#include <errno.h>
++#include <time.h>
++
++/*
++Xmodem Frame form: <SOH><blk #><255-blk #><--128 data bytes--><CRC hi><CRC lo>
++*/
++
++#define XMODEM_SOH 0x01
++#define XMODEM_STX 0x02
++#define XMODEM_EOT 0x04
++#define XMODEM_ACK 0x06
++#define XMODEM_NAK 0x15
++#define XMODEM_CRC_CHR 'C'
++#define XMODEM_CRC_SIZE 2 /* Crc_High Byte + Crc_Low Byte */
++#define XMODEM_FRAME_ID_SIZE 2 /* Frame_Id + 255-Frame_Id */
++#define XMODEM_DATA_SIZE_SOH 128 /* for Xmodem protocol */
++#define XMODEM_DATA_SIZE_STX 1024 /* for 1K xmodem protocol */
++#define USE_1K_XMODEM 0 /* 1 for use 1k_xmodem 0 for xmodem */
++
++#if (USE_1K_XMODEM)
++ #define XMODEM_DATA_SIZE XMODEM_DATA_SIZE_STX
++ #define XMODEM_HEAD XMODEM_STX
++#else
++ #define XMODEM_DATA_SIZE XMODEM_DATA_SIZE_SOH
++ #define XMODEM_HEAD XMODEM_SOH
++#endif
++/*********/
++
++#define SERIAL_DEVICE "/dev/ttyS0"
++#define MYBAUDRATE B115200
++
++/***************SUB PROGRAM*******/
++unsigned short GetCrc16 ( char *ptr, unsigned short count )
++{
++ unsigned short crc, i;
++
++ crc = 0;
++ while(count--)
++ {
++ crc = crc ^ (int) *ptr++ << 8;
++
++ for(i = 0; i < 8; i++)
++ {
++ if(crc & 0x8000)
++ crc = crc << 1 ^ 0x1021;
++ else
++ crc = crc << 1;
++ }
++ }
++
++ return (crc & 0xFFFF);
++}
++
++/*******************************/
++int Initial_SerialPort(void)
++{
++ int fd;
++ struct termios options;
++
++ fd = open( SERIAL_DEVICE , O_RDWR | O_NOCTTY | O_NDELAY );
++ if ( fd == -1 )
++ {
++ /*open error!*/
++ perror("Can't open serial port!");
++ return -1;
++ }
++
++ /*Get the current options for the port...*/
++ tcgetattr(fd, &options);
++
++ /*Set the baud rates to BAUDRATE...*/
++ cfsetispeed(&options,MYBAUDRATE);
++ cfsetospeed(&options,MYBAUDRATE);
++ tcsetattr(fd, TCSANOW, &options);
++ if (0 != tcgetattr(fd, &options))
++ {
++ perror("SetupSerial 1");
++ return -1;
++ }
++
++ /*
++ * 8bit Data,no partity,1 stop bit...
++ */
++ options.c_cflag &= ~PARENB;
++ options.c_cflag &= ~CSTOPB;
++ options.c_cflag &= ~CSIZE;
++ options.c_cflag |= CS8;
++ tcflush(fd,TCIFLUSH);
++
++ /***Choosing Raw Input*/
++ options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
++ options.c_oflag &= ~OPOST;
++
++ /*
++ * Set the new options for the port...
++ */
++ if (0 != tcsetattr(fd, TCSANOW, &options))
++ {
++ perror("SetupSerial error");
++ return -1 ;
++ }
++
++ return fd ;
++}
++
++/******************************/
++void ClearReceiveBuffer(int fd)
++{
++ unsigned char tmp;
++ while ((read(fd,&tmp,1))>0);
++
++ return;
++}
++
++/********************************/
++int main(int argc,char *argv[])
++{
++ int fd;
++ char *data_file_name;
++ char packet_data[ XMODEM_DATA_SIZE ];
++ char frame_data[ XMODEM_DATA_SIZE + XMODEM_CRC_SIZE + XMODEM_FRAME_ID_SIZE + 1 ];
++ FILE *datafile;
++ int complete,retry_num,pack_counter,read_number,write_number,i;
++ unsigned short crc_value;
++ unsigned char ack_id;
++
++ printf("sx-at91 started...\r\n");
++
++ /* open serial port1 */
++ if ( (fd = Initial_SerialPort()) == -1)
++ return -1 ;
++
++ data_file_name = argv[1];
++
++ if((datafile=fopen(data_file_name,"rb"))==NULL)
++ {
++ perror ("Can't open file!");
++ return -1 ;
++ }
++
++ /*******************************/
++
++ pack_counter = 0;
++ complete = 0;
++ retry_num = 0;
++ ClearReceiveBuffer(fd);
++
++ while((read(fd,&ack_id,1))<=0);
++
++ printf("%c\r\n",ack_id);
++ ack_id=XMODEM_ACK;
++ while(!complete)
++ {
++ switch(ack_id)
++ {
++ case XMODEM_ACK:
++ retry_num = 0;
++ pack_counter++;
++ read_number = fread( packet_data, sizeof(char), XMODEM_DATA_SIZE, datafile);
++ if(read_number>0)
++ {
++ if(read_number<XMODEM_DATA_SIZE_SOH)
++ {
++
++ printf("Start filling the last frame!\r\n");
++ for(;read_number<XMODEM_DATA_SIZE;read_number++)
++ packet_data[read_number] = 0x00;
++ }
++ frame_data[0] = XMODEM_HEAD;
++ frame_data[1] = (char)pack_counter;
++ frame_data[2] = (char)(255-frame_data[1]);
++
++ for(i=0;i<XMODEM_DATA_SIZE;i++)
++ frame_data[i+3]=packet_data[i];
++
++ crc_value = GetCrc16(packet_data,XMODEM_DATA_SIZE);
++ frame_data[XMODEM_DATA_SIZE_SOH+3]=(unsigned char)(crc_value >> 8);
++ frame_data[XMODEM_DATA_SIZE_SOH+4]=(unsigned char)(crc_value);
++ write_number = write( fd, frame_data, XMODEM_DATA_SIZE_SOH + 5);
++ printf("waiting for ACK,%d,%d,...",pack_counter,write_number);
++ while((read(fd,&ack_id,1))<=0);
++
++ if(ack_id == XMODEM_ACK)
++ printf("Ok!\r\n");
++ else
++ printf("Error!\r\n");
++ }
++ else
++ {
++ ack_id = XMODEM_EOT;
++ complete = 1;
++ printf("Waiting for complete ACK ...");
++
++ while(ack_id != XMODEM_ACK)
++ {
++ ack_id = XMODEM_EOT;
++ write_number=write(fd,&ack_id,1);
++ while((read(fd,&ack_id,1))<=0);
++ }
++ printf("OK\r\n");
++
++ printf("Sending file complete\r\n");
++ }
++ break;
++
++ case XMODEM_NAK:
++ if( retry_num++ > 10)
++ {
++ printf("Retry too many times,Quit!\r\n");
++ complete = 1;
++ }
++ else
++ {
++ write_number = write(fd,frame_data,XMODEM_DATA_SIZE + 5);
++ printf("Retry for ACK,%d,%d...",pack_counter,write_number);
++ while((read(fd,&ack_id,1))<=0);
++
++ if( ack_id == XMODEM_ACK )
++ printf("OK\r\n");
++ else
++ printf("Error!\r\n");
++ }
++ break;
++
++ default:
++ printf("Fatal Error!\r\n");
++ complete = 1;
++ break;
++ }
++
++ }
++
++ fclose(datafile);
++ close(fd);
++
++ return 0;
++}
--- /dev/null
+diff -urN u-boot-2008.10-0rig//Makefile u-boot-2008.10/Makefile
+--- u-boot-2008.10-0rig//Makefile 2008-12-31 18:11:18.000000000 +0100
++++ u-boot-2008.10/Makefile 2008-12-31 18:39:58.000000000 +0100
+@@ -20,6 +20,7 @@
+ # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ # MA 02111-1307 USA
+ #
++BUILD_DATE= $(shell date +%F)
+
+ VERSION = 2008
+ PATCHLEVEL = 10
+@@ -294,6 +295,22 @@
+ ALL += $(obj)u-boot.ldr
+ endif
+
++ifneq ($(BOARDNAME),)
++BINARY := $(BOARDNAME)-u-boot-$(U_BOOT_VERSION)-$(BUILD_DATE)
++BINARY_BIN := $(obj)$(BINARY).bin
++BINARY_GZ := $(obj)$(BINARY).gz
++ALL += $(BINARY_BIN)
++ALL += $(BINARY_GZ)
++else
++BINARY := u-boot
++BINARY_BIN := $(obj)$(BINARY).bin
++BINARY_GZ := $(obj)$(BINARY).gz
++endif
++
++ifeq ($(DESTDIR),)
++DESTDIR=binaries
++endif
++
+ all: $(ALL)
+
+ $(obj)u-boot.hex: $(obj)u-boot
+@@ -302,9 +319,20 @@
+ $(obj)u-boot.srec: $(obj)u-boot
+ $(OBJCOPY) -O srec $< $@
+
+-$(obj)u-boot.bin: $(obj)u-boot
++$(BINARY_BIN): $(obj)u-boot
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
++$(BINARY_GZ): $(BINARY_BIN)
++ gzip -c $(BINARY_BIN) > $(BINARY_GZ)
++
++install: all
++ -install -d $(DESTDIR)
++ install $(BINARY_BIN) $(DESTDIR)
++
++tftp: install
++ cp $(BINARY_GZ) $(TFTPBOOT)/$(BINARY).gz
++ cp $(BINARY_BIN) $(TFTPBOOT)/$(BINARY).bin
++
+ $(obj)u-boot.ldr: $(obj)u-boot
+ $(LDR) -T $(CONFIG_BFIN_CPU) -f -c $@ $< $(LDR_FLAGS)
+
+@@ -3295,6 +3324,7 @@
+ -o -name '*.srec' -o -name '*.bin' -o -name u-boot.img \) \
+ -print0 \
+ | xargs -0 rm -f
++ @rm -f $(obj)u-boot-*.gz
+ @rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
+ $(obj)cscope.* $(obj)*.*~
+ @rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
--- /dev/null
+diff -urN u-boot-2009.01-0rig//common/cmd_factory.c u-boot-2009.01/common/cmd_factory.c
+--- u-boot-2009.01-0rig//common/cmd_factory.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/common/cmd_factory.c 2009-01-02 19:32:07.000000000 +0100
+@@ -0,0 +1,308 @@
++/*
++ * (C) Copyright 2000
++ * Ulf Samuelsson <ulf.samuelsson@atmelcom>.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++/*
++ * Boot support
++ */
++#include <config.h>
++#include <common.h>
++#include <command.h>
++#include <dataflash.h>
++
++/*
++ *
++ * The typical use of this file, is to update config.h
++ * from an external build system
++ *
++ */
++
++
++/*
++ * Macros to transform values
++ * into environment strings.
++ */
++#define XMK_STR(x) #x
++#define MK_STR(x) XMK_STR(x)
++
++void setargs(void);
++
++int do_factory_defaults (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++#if defined(CONFIG_ETHADDR)
++ setenv("ethaddr", MK_STR(CONFIG_ETHADDR));
++#endif
++#if defined(CONFIG_ETH1ADDR)
++ setenv("eth1addr", MK_STR(CONFIG_ETH1ADDR));
++#endif
++#if defined(CONFIG_HOSTNAME)
++ setenv("hostname", MK_STR(CONFIG_HOSTNAME));
++#endif
++#if defined(CONFIG_IPADDR)
++ setenv("ipaddr", MK_STR(CONFIG_IPADDR));
++#endif
++#if defined(CONFIG_SERVERIP)
++ setenv("serverip", MK_STR(CONFIG_SERVERIP));
++#endif
++#if defined(CONFIG_GATEWAY)
++ setenv("gatewayip", MK_STR(CONFIG_GATEWAY));
++#endif
++#if defined(CONFIG_NETMASK)
++ setenv("netmask", MK_STR(CONFIG_NETMASK));
++#endif
++#if defined(KERNEL_START)
++ setenv("kernel", MK_STR(KERNEL_START));
++#endif
++#if defined(KERNEL_LOCATION)
++ setenv("OS", MK_STR(KERNEL_LOCATION));
++#endif
++#if defined(FILESYSTEM_START)
++ setenv("ramdisk", MK_STR(FILESYSTEM_START));
++ setenv("initrd", MK_STR(FILESYSTEM_START)","MK_STR(FILESYSTEM_SIZE));
++#endif
++#if defined(FILESYSTEM_LOCATION)
++ setenv("FS", MK_STR(FS_LOCATION));
++#endif
++#if defined(END_OF_FLASH)
++ setenv("endflash", MK_STR(END_OF_FLASH));
++#endif
++#if defined(CONFIG_LOAD_SCRIPTS)
++ /* By updating the "fs-date" environment variable and running "fs"
++ You set "rd-1" and "rd-2"
++ */
++ setenv("rd-1", "rootfs.arm-"MK_STR(DATE)".ext2");
++ setenv("rd-2", "rootfs.arm-"MK_STR(DATE)".jffs2");
++ setenv("rd-3", "rootfs.arm-linux.ext2");
++ setenv("rd-4", "rootfs.arm-linux.jffs2");
++ setenv("ver", "1");
++
++ setenv("config", "tftp ${ramdisk} autoscript.${hostname} ; autoscr ${ramdisk} ");
++
++#if defined(KERNEL_VERSION)
++ setenv("kernel-version",MK_STR(KERNEL_VERSION));
++#endif
++#if defined(DATE)
++ setenv("kernel-date", MK_STR(DATE));
++ setenv("fs-date", MK_STR(DATE));
++ setenv("rd", "rootfs.arm-"MK_STR(DATE)".ext2");
++#endif
++#if defined(KERNEL_VERSION)
++ setenv("linux", MK_STR(BOARD_NAME)"-linux-"MK_STR(KERNEL_VERSION)"-"MK_STR(DATE)".gz");
++#endif
++ setenv("get-ramdisk", "tftp ${ramdisk} ${rd}; setenv rd-size ${filesize}");
++ setenv("store-ramdisk", "cp.b ${ramdisk} ${FS} ${rd-size}");
++ setenv("load-ramdisk", "cp.b ${FS} ${ramdisk} ${rd-size}");
++ setenv("flash-ramdisk", "run get-ramdisk; run store-ramdisk");
++
++ setenv("get-kernel", "tftp ${kernel} ${linux}; setenv kernel-size ${filesize}");
++ setenv("store-kernel", "cp.b ${kernel} ${OS} ${kernel-size}; saveenv");
++ setenv("load-kernel", "cp.b ${OS} ${kernel} ${kernel-size}; saveenv");
++ setenv("flash-kernel", "run get-kernel; run store-kernel");
++
++ setenv("get", "run get-kernel ; run get-ramdisk");
++ setenv("flash", "run flash-kernel ; run flash-ramdisk ; saveenv");
++ setenv("load", "run load-kernel ; run load-ramdisk");
++
++ setenv("bootcmd", "run load ; bootm "MK_STR(KERNEL_START));
++
++ setenv("fstype", "ram");
++ setenv("flashfs", "/dev/mtdblock2");
++ setenv("ramfs", "/dev/ram");
++
++ setenv("rootfstype", "jffs2");
++ setenv("access", "rw");
++ setenv("ramdisk_size", "15360");
++ setenv("console", "ttyS0,115200");
++
++
++#if defined(MEMORY_SIZE)
++ setenv("mem", MK_STR(MEMORY_SIZE));
++#else
++ setenv("mem", "32M"); /* Cautious default */
++#endif
++
++ setenv("update", "os; fs; setargs");
++ setenv("cmpk", "run flash-kernel; cp.b ${OS} ${ramdisk} ${kernel-size}; cmp ${kernel} ${ramdisk} ${kernel-size}");
++#endif /* CONFIG_LOAD_SCRIPTS */
++#if defined(CONFIG_AT91RM9200)
++ setenv("machid24", "0x0fb");
++ setenv("machid26", "0x2c1");
++ setenv("machid", "0x2c1");
++ setenv("k24", "setenv machid ${machid24}; os");
++ setenv("k26", "setenv machid ${machid26}; os");
++#endif
++ AT91F_DataflashSetEnv ();
++#if defined(CONFIG_LOAD_SCRIPTS)
++ setargs();
++#endif
++ return (saveenv() ? 1 : 0);
++}
++
++
++
++U_BOOT_CMD(
++ factory, 1, 1, do_factory_defaults,
++ "factory\t- Create a default environment\n",
++ "\n"
++);
++
++#if defined(CONFIG_LOAD_SCRIPTS)
++void setargs(void)
++{
++ char cmd[512];
++ char fstype[512];
++
++ sprintf(fstype,getenv("fstype"));
++ if((fstype[0] != 'f') && (fstype[0] != 'r')) {
++ fstype[0] = 'r';
++ }
++
++ if(fstype[0] == 'f') {
++ sprintf(cmd,"root=%s rootfstype=%s ip=%s:%s:%s:%s console=%s,mem=%s",
++ getenv("flashfs"),
++ getenv("rootfstype"),
++ getenv("ipaddr"),
++ getenv("serverip"),
++ getenv("gatewayip"),
++ getenv("netmask"),
++ getenv("console"),
++ getenv("mem")
++ );
++ cmd[511] = '\0';
++ printf("len=%d: %s\n",strlen(cmd),cmd);
++ if(strlen(cmd) > 500) {
++ printf("Error: Environment too large during 'setargs'\n");
++ } else {
++ setenv("bootargs",cmd);
++ setenv("bootcmd", "run load-kernel ; bootm 21000000");
++ }
++ } else if(fstype[0] == 'r') {
++ sprintf(cmd,"root=%s %s initrd=%s ramdisk_size=%s ip=%s:%s:%s:%s console=%s,mem=%s",
++ getenv("ramfs"),
++ getenv("access"),
++ getenv("initrd"),
++ getenv("ramdisk_size"),
++ getenv("ipaddr"),
++ getenv("serverip"),
++ getenv("gatewayip"),
++ getenv("netmask"),
++ getenv("console"),
++ getenv("mem")
++ );
++ printf("len=%d: %s\n",strlen(cmd),cmd);
++ cmd[511] = '\0';
++ if(strlen(cmd) > 500) {
++ printf("Error: Environment too large during 'setargs'\n");
++ } else {
++ setenv("bootargs",cmd);
++ setenv("bootcmd", "run load ; bootm 21000000");
++ }
++ } else {
++ setenv("bootargs","no args");
++ }
++}
++
++int do_setargs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ setargs();
++ return 0;
++}
++
++U_BOOT_CMD(
++ setargs, 1, 1, do_setargs,
++ "setargs\t- Create a bootargs from:"
++ "fstype=flash: (${flash} ${access} ${initrd} ${ramdisk_size}) "
++ "fstype=ram: (${ram} ${access} ${initrd} ${ramdisk_size}) "
++ "${ipaddr} ${serverip} ${gatewayip} ${netmask} "
++ "${console} ${mem}\n"
++ , "\n"
++);
++
++int do_os (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ char *kchip;
++ char *kdate;
++ char *kver;
++ char cmd[512];
++ kchip = getenv("hostname");
++ kdate = getenv("kernel-date");
++ kver = getenv("kernel-version");
++ if((strlen(kdate) + strlen(kver) + 32) > 500) {
++ printf("Error: Environment too large during 'os': ");
++ printf("len=%d\n", strlen(kdate) + strlen(kver) + 32);
++ } else if(kver != NULL) {
++ if(kdate != NULL) {
++ sprintf(cmd,"%s-linux-%s-%s.gz",kchip,kver,kdate);
++ } else {
++ sprintf(cmd,"%s-linux-%s.gz",kchip,kver);
++ }
++ printf("Setting kernel to %s\n",cmd);
++ setenv("linux",cmd);
++ return 0;
++ }
++ return 1;
++}
++
++U_BOOT_CMD(
++ os, 1, 1, do_os,
++ "os\t- Select linux version ${hostname}-linux-${kernel-name}-${kernel-date}\n"
++ , "\n"
++);
++
++
++int do_fs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ char *ver;
++ char *fsdate;
++ char *hostname;
++ char cmd[512];
++ fsdate = getenv("fs-date");
++ hostname = getenv("hostname");
++
++ if(fsdate != NULL) {
++ sprintf(cmd,"rootfs.arm-%s.ext2",fsdate);
++ setenv("rd-1",cmd);
++ sprintf(cmd,"rootfs.arm-%s.jffs2",fsdate);
++ setenv("rd-2",cmd);
++ }
++ ver = getenv("ver"); /* Find out which version we are using*/
++ if(cmd==NULL) {
++ setenv("ver","1");
++ }
++ ver = getenv("ver"); /* Find out which version we are using*/
++ sprintf(cmd,"rd-%s",ver); /* create rd${ver}*/
++ ver=getenv(cmd);
++ sprintf(cmd,"%s",ver);
++ printf("Setting ramdisk to %s\n",cmd);
++ setenv("rd",cmd);
++ return 0;
++}
++
++
++U_BOOT_CMD(
++ fs, 1, 1, do_fs,
++ "fs\t- Select ramdisk version == rd-${ver}\n"
++ , "\n"
++);
++#endif /* #if defined(CONFIG_LOAD_SCRIPTS) */
++
++
+diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
+--- u-boot-2009.01-0rig//common/Makefile 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/common/Makefile 2009-01-02 19:17:16.000000000 +0100
+@@ -84,6 +84,7 @@
+ COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
+ COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o
+ COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o
++COBJS-$(CONFIG_CMD_FACTORY) += cmd_factory.o
+ COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o
+ COBJS-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o
+ COBJS-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
--- /dev/null
+diff -urN u-boot-2009.01-0rig//common/cmd_led.c u-boot-2009.01/common/cmd_led.c
+--- u-boot-2009.01-0rig//common/cmd_led.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/common/cmd_led.c 2009-01-03 23:39:57.000000000 +0100
+@@ -0,0 +1,84 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++/*
++ * This file provides a shell like 'test' function to return
++ * true/false from an integer or string compare of two memory
++ * locations or a location and a scalar/literal.
++ * A few parts were lifted from bash 'test' command
++ */
++
++#include <common.h>
++#include <config.h>
++#include <command.h>
++#include <coloured_led.h>
++
++int do_led ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
++{
++ int led;
++ /* Validate arguments */
++ if ((argc != 3)){
++ printf("Usage:\n%s\n", cmdtp->usage);
++ return 1;
++ }
++ if (strcmp(argv[1], "1") == 0) {
++ led = (1 << 0);
++ } else if (strcmp(argv[1], "2") == 0) {
++ led = (1 << 1);
++ } else if (strcmp(argv[1], "3") == 0) {
++ led = (1 << 2);
++ } else if (strcmp(argv[1], "green") == 0) {
++ led = (1 << 0);
++ } else if (strcmp(argv[1], "yellow") == 0) {
++ led = (1 << 1);
++ } else if (strcmp(argv[1], "red") == 0) {
++ led = (1 << 2);
++ } else if (strcmp(argv[1], "all") == 0) {
++ led = 7;
++ } else {
++ printf ("Usage:\n%s\n", cmdtp->usage);
++ return 1;
++ }
++
++ if (strcmp(argv[2], "off") == 0) {
++ if(led & 1) green_LED_off();
++ if(led & 2) yellow_LED_off();
++ if(led & 4) red_LED_off();
++ } else if (strcmp(argv[2], "on") == 0) {
++ if(led & 1) green_LED_on();
++ if(led & 2) yellow_LED_on();
++ if(led & 4) red_LED_on();
++ } else {
++ printf ("Usage:\n%s\n", cmdtp->usage);
++ return 1;
++ }
++
++ return 0;
++}
++
++U_BOOT_CMD(
++ led, 3, 1, do_led,
++ "led\t- [1|2|3|green|yellow|red|all] [on|off]\n",
++ "led [1|2|3|green|yellow|red|all] [on|off] sets /clears led 1,2,3\n"
++);
++
+diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
+--- u-boot-2009.01-0rig//common/Makefile 2009-01-02 21:18:24.000000000 +0100
++++ u-boot-2009.01/common/Makefile 2009-01-03 23:41:53.000000000 +0100
+@@ -99,6 +99,7 @@
+ COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o
+ COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o
+ COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o
++COBJS-$(CONFIG_CMD_LED) += cmd_led.o
+ COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o
+ COBJS-y += cmd_load.o
+ COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
+diff -urN u-boot-2009.01-0rig//include/coloured_led.h u-boot-2009.01/include/coloured_led.h
+--- u-boot-2009.01-0rig//include/coloured_led.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/include/coloured_led.h 2009-01-03 23:39:19.000000000 +0100
+@@ -0,0 +1,62 @@
++/*
++ * (C) Copyright 2008
++ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++/*
++ * The purpose of this code is to signal the operational status of a
++ * target which usually boots over the network; while running in
++ * PCBoot, a status LED is blinking. As soon as a valid BOOTP reply
++ * message has been received, the LED is turned off. The Linux
++ * kernel, once it is running, will start blinking the LED again,
++ * with another frequency.
++ */
++
++#ifndef _COLOURED_LED_H_
++#define _COLOURED_LED_H_
++
++#ifdef CONFIG_COLOURED_LED
++
++/*
++ * Coloured LEDs API
++ */
++#ifndef __ASSEMBLY__
++extern void coloured_LED_init (void);
++extern void red_LED_on(void);
++extern void red_LED_off(void);
++extern void green_LED_on(void);
++extern void green_LED_off(void);
++extern void yellow_LED_on(void);
++extern void yellow_LED_off(void);
++#else
++ .extern LED_init
++ .extern red_LED_on
++ .extern red_LED_off
++ .extern yellow_LED_on
++ .extern yellow_LED_off
++ .extern green_LED_on
++ .extern green_LED_off
++#endif
++
++#endif /* CONFIG_COLOURED_LED */
++
++#endif /* _STATUS_COLOURED_H_ */
++
+diff -urN u-boot-2009.01-0rig//include/status_led.h u-boot-2009.01/include/status_led.h
+--- u-boot-2009.01-0rig//include/status_led.h 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/include/status_led.h 2009-01-03 23:44:40.000000000 +0100
+@@ -383,27 +383,6 @@
+ # include <asm/status_led.h>
+ #endif
+
+-/*
+- * Coloured LEDs API
+- */
+-#ifndef __ASSEMBLY__
+-extern void coloured_LED_init (void);
+-extern void red_LED_on(void);
+-extern void red_LED_off(void);
+-extern void green_LED_on(void);
+-extern void green_LED_off(void);
+-extern void yellow_LED_on(void);
+-extern void yellow_LED_off(void);
+-#else
+- .extern LED_init
+- .extern red_LED_on
+- .extern red_LED_off
+- .extern yellow_LED_on
+- .extern yellow_LED_off
+- .extern green_LED_on
+- .extern green_LED_off
+-#endif
+-
+ #endif /* CONFIG_STATUS_LED */
+
+ #endif /* _STATUS_LED_H_ */
--- /dev/null
+diff -urN u-boot-2009.01-0rig//common/cmd_mux.c u-boot-2009.01/common/cmd_mux.c
+--- u-boot-2009.01-0rig//common/cmd_mux.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/common/cmd_mux.c 2009-01-04 00:17:19.000000000 +0100
+@@ -0,0 +1,78 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <command.h>
++#if (defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF))
++
++#include <asm/arch/AT91RM9200.h>
++#include <dataflash.h>
++#include <at45.h>
++
++
++static int mmc_nspi (const char *s)
++{
++ if (strcmp(s, "mmc") == 0) {
++ return (1);
++ } else if (strcmp(s, "spi") == 0) {
++ return (0);
++ }
++ return (-1);
++}
++
++int do_mux ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ switch (argc) {
++ case 2: /* on / off */
++ switch (mmc_nspi(argv[1])) {
++#if 0 /* prevented by varargs handling; FALLTROUGH is harmless, too */
++ default: printf ("Usage:\n%s\n", cmdtp->usage);
++ return;
++#endif
++ case 0: AT91F_SelectSPI ();
++ break;
++ case 1: AT91F_SelectMMC ();
++ break;
++ }
++ /* FALL TROUGH */
++ case 1: /* get status */
++ printf ("Mux is configured to be %s\n",
++ AT91F_GetMuxStatus() ? "MMC" : "SPI");
++ return 0;
++ default:
++ printf ("Usage:\n%s\n", cmdtp->usage);
++ return 1;
++ }
++ return 0;
++}
++
++
++U_BOOT_CMD(
++ mux, 2, 1, do_mux,
++ "mux\t- enable or disable MMC or SPI\n",
++ "[mmc, spi]\n"
++ " - enable or disable MMC or SPI\n"
++);
++
++#endif /* CONFIG_CMD_MUX */
++
+diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
+--- u-boot-2009.01-0rig//common/Makefile 2009-01-04 00:10:28.000000000 +0100
++++ u-boot-2009.01/common/Makefile 2009-01-04 00:20:39.000000000 +0100
+@@ -112,6 +112,7 @@
+ COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o
+ COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
+ COBJS-$(CONFIG_MP) += cmd_mp.o
++COBJS-$(CONFIG_CMD_AT91_SPIMUX) += cmd_mux.o
+ COBJS-y += cmd_nand.o
+ COBJS-$(CONFIG_CMD_NET) += cmd_net.o
+ COBJS-$(CONFIG_CMD_ONENAND) += cmd_onenand.o
--- /dev/null
+diff -urN u-boot-2009.01-0rig//common/cmd_ethinit.c u-boot-2009.01/common/cmd_ethinit.c
+--- u-boot-2009.01-0rig//common/cmd_ethinit.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.01/common/cmd_ethinit.c 2009-01-04 00:28:39.000000000 +0100
+@@ -0,0 +1,62 @@
++/*
++ * (C) Copyright 2000
++ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++/*
++ * Boot support
++ */
++#include <common.h>
++#include <command.h>
++#include <net.h>
++#ifdef CONFIG_CMD_ETHINIT
++extern int eth_init (bd_t * bd);
++
++static void delay(void)
++{
++}
++/*
++ * This command allows you to delay booting until you have a
++ * valid Ethernet connection.
++ * Neccessary if you want to NFS mount a rootfs etc.
++ * When both this target and the NFS server
++ * are powered on at the same time, then the NFS
++ * server can take a long time to boot.
++ */
++int do_ethinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ int i;
++ DECLARE_GLOBAL_DATA_PTR;
++ while(eth_init (gd->bd) == 0) {
++ for(i = 0; i < 10000000; i ++) {
++ delay();
++ }
++ }
++ return 0;
++}
++
++U_BOOT_CMD(
++ ethinit, 1, 1, do_ethinit,
++ "ethinit\t- Initialize Ethernet controller\n",
++ "\n"
++);
++
++#endif /* CONFIG_CMD_ETHINIT */
+diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
+--- u-boot-2009.01-0rig//common/Makefile 2009-01-04 00:22:06.000000000 +0100
++++ u-boot-2009.01/common/Makefile 2009-01-04 00:29:46.000000000 +0100
+@@ -83,6 +83,7 @@
+ COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
+ COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
+ COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o
++COBJS-$(CONFIG_CMD_ETHINIT) += cmd_ethinit.o
+ COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o
+ COBJS-$(CONFIG_CMD_FACTORY) += cmd_factory.o
+ COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o
--- /dev/null
+diff -urN u-boot-2009.01-0rig//include/configs/at91cap9adk.h u-boot-2009.01/include/configs/at91cap9adk.h
+--- u-boot-2009.01-0rig//include/configs/at91cap9adk.h 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/include/configs/at91cap9adk.h 2009-01-04 00:43:58.000000000 +0100
+@@ -69,7 +69,9 @@
+ #define CONFIG_ATMEL_LCD 1
+ #define CONFIG_ATMEL_LCD_BGR555 1
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
+-
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+ #define CONFIG_BOOTDELAY 3
+
+ /*
+diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200df.h u-boot-2009.01/include/configs/at91rm9200df.h
+--- u-boot-2009.01-0rig//include/configs/at91rm9200df.h 2009-01-02 17:37:43.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200df.h 2009-01-04 00:43:33.000000000 +0100
+@@ -123,6 +123,9 @@
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_NAND
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+ #define CONFIG_CMD_AT91_SPIMUX
+ #define CONFIG_CMD_ETHINIT
+
+diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200dk_df.h u-boot-2009.01/include/configs/at91rm9200dk_df.h
+--- u-boot-2009.01-0rig//include/configs/at91rm9200dk_df.h 2009-01-02 10:03:11.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200dk_df.h 2009-01-04 00:42:52.000000000 +0100
+@@ -122,7 +122,11 @@
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_NAND
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+ #define CONFIG_CMD_AT91_SPIMUX
++#define CONFIG_CMD_ETHINIT
+
+ #define CONFIG_NAND_LEGACY
+
+diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200dk.h u-boot-2009.01/include/configs/at91rm9200dk.h
+--- u-boot-2009.01-0rig//include/configs/at91rm9200dk.h 2009-01-02 10:03:11.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200dk.h 2009-01-04 00:43:15.000000000 +0100
+@@ -120,7 +120,11 @@
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_NAND
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+ #define CONFIG_CMD_AT91_SPIMUX
++#define CONFIG_CMD_ETHINIT
+
+ #define CONFIG_NAND_LEGACY
+
+diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200ek.h u-boot-2009.01/include/configs/at91rm9200ek.h
+--- u-boot-2009.01-0rig//include/configs/at91rm9200ek.h 2009-01-02 17:37:43.000000000 +0100
++++ u-boot-2009.01/include/configs/at91rm9200ek.h 2009-01-04 00:42:35.000000000 +0100
+@@ -121,9 +121,11 @@
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_NAND
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+ #define CONFIG_CMD_AT91_SPIMUX
+ #define CONFIG_CMD_ETHINIT
+-
+ #define CONFIG_NAND_LEGACY
+
+ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+diff -urN u-boot-2009.01-0rig//include/configs/at91sam9260ek.h u-boot-2009.01/include/configs/at91sam9260ek.h
+--- u-boot-2009.01-0rig//include/configs/at91sam9260ek.h 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/include/configs/at91sam9260ek.h 2009-01-04 00:41:56.000000000 +0100
+@@ -74,10 +74,13 @@
+ #include <config_cmd_default.h>
+ #undef CONFIG_CMD_BDI
+ #undef CONFIG_CMD_IMI
+-#undef CONFIG_CMD_AUTOSCRIPT
++#define CONFIG_CMD_AUTOSCRIPT
+ #undef CONFIG_CMD_FPGA
+ #undef CONFIG_CMD_LOADS
+ #undef CONFIG_CMD_IMLS
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+
+ #define CONFIG_CMD_PING 1
+ #define CONFIG_CMD_DHCP 1
+diff -urN u-boot-2009.01-0rig//include/configs/at91sam9261ek.h u-boot-2009.01/include/configs/at91sam9261ek.h
+--- u-boot-2009.01-0rig//include/configs/at91sam9261ek.h 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/include/configs/at91sam9261ek.h 2009-01-04 00:44:11.000000000 +0100
+@@ -68,6 +68,9 @@
+ #define CONFIG_ATMEL_LCD 1
+ #define CONFIG_ATMEL_LCD_BGR555 1
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+
+ #define CONFIG_BOOTDELAY 3
+
+diff -urN u-boot-2009.01-0rig//include/configs/at91sam9263ek.h u-boot-2009.01/include/configs/at91sam9263ek.h
+--- u-boot-2009.01-0rig//include/configs/at91sam9263ek.h 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/include/configs/at91sam9263ek.h 2009-01-04 00:44:34.000000000 +0100
+@@ -69,6 +69,9 @@
+ #define CONFIG_ATMEL_LCD 1
+ #define CONFIG_ATMEL_LCD_BGR555 1
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+
+ #define CONFIG_BOOTDELAY 3
+
+diff -urN u-boot-2009.01-0rig//include/configs/at91sam9rlek.h u-boot-2009.01/include/configs/at91sam9rlek.h
+--- u-boot-2009.01-0rig//include/configs/at91sam9rlek.h 2008-12-16 23:48:27.000000000 +0100
++++ u-boot-2009.01/include/configs/at91sam9rlek.h 2009-01-04 00:44:54.000000000 +0100
+@@ -68,6 +68,9 @@
+ #define CONFIG_ATMEL_LCD 1
+ #define CONFIG_ATMEL_LCD_RGB565 1
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
++#define CONFIG_CMD_FACTORY
++#define CONFIG_CMD_LED
++#define CONFIG_COLOURED_LED
+
+ #define CONFIG_BOOTDELAY 3
+
+++ /dev/null
-diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pio.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pio.h
---- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pio.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pio.h 2009-01-01 14:02:28.000000000 +0100
-@@ -0,0 +1,49 @@
-+/*
-+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
-+ *
-+ * Copyright (C) 2005 Ivan Kokshaysky
-+ * Copyright (C) SAN People
-+ *
-+ * Parallel I/O Controller (PIO) - System peripherals registers.
-+ * Based on AT91RM9200 datasheet revision E.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef AT91_PIO_H
-+#define AT91_PIO_H
-+
-+#define PIO_PER 0x00 /* Enable Register */
-+#define PIO_PDR 0x04 /* Disable Register */
-+#define PIO_PSR 0x08 /* Status Register */
-+#define PIO_OER 0x10 /* Output Enable Register */
-+#define PIO_ODR 0x14 /* Output Disable Register */
-+#define PIO_OSR 0x18 /* Output Status Register */
-+#define PIO_IFER 0x20 /* Glitch Input Filter Enable */
-+#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
-+#define PIO_IFSR 0x28 /* Glitch Input Filter Status */
-+#define PIO_SODR 0x30 /* Set Output Data Register */
-+#define PIO_CODR 0x34 /* Clear Output Data Register */
-+#define PIO_ODSR 0x38 /* Output Data Status Register */
-+#define PIO_PDSR 0x3c /* Pin Data Status Register */
-+#define PIO_IER 0x40 /* Interrupt Enable Register */
-+#define PIO_IDR 0x44 /* Interrupt Disable Register */
-+#define PIO_IMR 0x48 /* Interrupt Mask Register */
-+#define PIO_ISR 0x4c /* Interrupt Status Register */
-+#define PIO_MDER 0x50 /* Multi-driver Enable Register */
-+#define PIO_MDDR 0x54 /* Multi-driver Disable Register */
-+#define PIO_MDSR 0x58 /* Multi-driver Status Register */
-+#define PIO_PUDR 0x60 /* Pull-up Disable Register */
-+#define PIO_PUER 0x64 /* Pull-up Enable Register */
-+#define PIO_PUSR 0x68 /* Pull-up Status Register */
-+#define PIO_ASR 0x70 /* Peripheral A Select Register */
-+#define PIO_BSR 0x74 /* Peripheral B Select Register */
-+#define PIO_ABSR 0x78 /* AB Status Register */
-+#define PIO_OWER 0xa0 /* Output Write Enable Register */
-+#define PIO_OWDR 0xa4 /* Output Write Disable Register */
-+#define PIO_OWSR 0xa8 /* Output Write Status Register */
-+
-+#endif
-diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pmc.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pmc.h
---- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/at91_pmc.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/at91_pmc.h 2009-01-01 15:51:28.000000000 +0100
-@@ -0,0 +1,116 @@
-+/*
-+ * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h]
-+ *
-+ * Copyright (C) 2005 Ivan Kokshaysky
-+ * Copyright (C) SAN People
-+ *
-+ * Copyright (C) 2008 Ulf Samuelsson
-+ *
-+ * Power Management Controller (PMC) - System peripherals registers.
-+ * Based on AT91RM9200 datasheet revision E.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef AT91_PMC_H
-+#define AT91_PMC_H
-+
-+#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
-+#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
-+
-+#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
-+#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
-+#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
-+#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
-+#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
-+#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
-+#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */
-+#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */
-+#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */
-+#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */
-+#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */
-+#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */
-+#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
-+#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
-+#define AT91_PMC_RES_0C (AT91_PMC + 0x0c) /* Reserved */
-+
-+#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
-+#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
-+#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
-+#define AT91_PMC_RES_1C (AT91_PMC + 0x1c) /* Reserved */
-+
-+
-+#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
-+#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
-+#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */
-+#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
-+
-+#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
-+#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
-+#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
-+
-+#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */
-+#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */
-+#define AT91_PMC_DIV (0xff << 0) /* Divider */
-+#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
-+#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
-+#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */
-+#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */
-+#define AT91_PMC_USBDIV_1 (0 << 28)
-+#define AT91_PMC_USBDIV_2 (1 << 28)
-+#define AT91_PMC_USBDIV_4 (2 << 28)
-+#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */
-+
-+#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */
-+#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */
-+#define AT91_PMC_CSS_SLOW (0 << 0)
-+#define AT91_PMC_CSS_MAIN (1 << 0)
-+#define AT91_PMC_CSS_PLLA (2 << 0)
-+#define AT91_PMC_CSS_PLLB (3 << 0)
-+#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */
-+#define AT91_PMC_PRES_1 (0 << 2)
-+#define AT91_PMC_PRES_2 (1 << 2)
-+#define AT91_PMC_PRES_4 (2 << 2)
-+#define AT91_PMC_PRES_8 (3 << 2)
-+#define AT91_PMC_PRES_16 (4 << 2)
-+#define AT91_PMC_PRES_32 (5 << 2)
-+#define AT91_PMC_PRES_64 (6 << 2)
-+#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */
-+#define AT91_PMC_MDIV_1 (0 << 8)
-+#define AT91_PMC_MDIV_2 (1 << 8)
-+#define AT91_PMC_MDIV_3 (2 << 8)
-+#define AT91_PMC_MDIV_4 (3 << 8)
-+
-+#define AT91_PMC_RES_34 (AT91_PMC + 0x34) /* Reserved */
-+#define AT91_PMC_RES_38 (AT91_PMC + 0x38) /* Reserved */
-+#define AT91_PMC_RES_3C (AT91_PMC + 0x3c) /* Reserved */
-+
-+#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */
-+
-+#define AT91_PMC_RES_50 (AT91_PMC + 0x50) /* Reserved */
-+#define AT91_PMC_RES_54 (AT91_PMC + 0x54) /* Reserved */
-+#define AT91_PMC_RES_58 (AT91_PMC + 0x58) /* Reserved */
-+#define AT91_PMC_RES_5C (AT91_PMC + 0x5c) /* Reserved */
-+
-+#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */
-+#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */
-+#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */
-+#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */
-+#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
-+#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
-+#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
-+#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
-+#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
-+#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
-+#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
-+#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
-+
-+#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
-+#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
-+
-+#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */
-+
-+#endif
-diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/AT91RM9200.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/AT91RM9200.h
---- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/AT91RM9200.h 2009-01-01 13:09:34.000000000 +0100
-+++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/AT91RM9200.h 2009-01-01 15:52:00.000000000 +0100
-@@ -28,6 +28,114 @@
- #ifndef __ASSEMBLY__
- typedef volatile unsigned int AT91_REG; /* Hardware register definition */
-
-+/*
-+ * Peripheral identifiers/interrupts.
-+ */
-+#define AT91RM9200_ID_AIC 0 /* Advanced Interrupt Controller (FIQ) */
-+#define AT91RM9200_ID_SYSIRQ 1 /* System Peripherals */
-+#define AT91RM9200_ID_PIOA 2 /* Parallel IO Controller A */
-+#define AT91RM9200_ID_PIOB 3 /* Parallel IO Controller B */
-+#define AT91RM9200_ID_PIOC 4 /* Parallel IO Controller C */
-+#define AT91RM9200_ID_PIOD 5 /* Parallel IO Controller D */
-+#define AT91RM9200_ID_US0 6 /* USART 0 */
-+#define AT91RM9200_ID_US1 7 /* USART 1 */
-+#define AT91RM9200_ID_US2 8 /* USART 2 */
-+#define AT91RM9200_ID_US3 9 /* USART 2 */
-+#define AT91RM9200_ID_MCI 10 /* Multimedia Card Interface */
-+#define AT91RM9200_ID_UDP 11 /* USB Device Port */
-+#define AT91RM9200_ID_TWI 12 /* Two-Wire Interface */
-+#define AT91RM9200_ID_SPI0 13 /* Serial Peripheral Interface 0 */
-+#define AT91RM9200_ID_SSC0 14 /* Serial Synchronous Controller */
-+#define AT91RM9200_ID_SSC1 15 /* Serial Synchronous Controller */
-+#define AT91RM9200_ID_SSC2 16 /* Serial Synchronous Controller */
-+#define AT91RM9200_ID_TC0 17 /* Timer Counter 0 */
-+#define AT91RM9200_ID_TC1 18 /* Timer Counter 1 */
-+#define AT91RM9200_ID_TC2 19 /* Timer Counter 2 */
-+#define AT91RM9200_ID_TC3 20 /* Timer Counter 3 */
-+#define AT91RM9200_ID_TC4 21 /* Timer Counter 4 */
-+#define AT91RM9200_ID_TC5 22 /* Timer Counter 5 */
-+#define AT91RM9200_ID_UHP 23 /* USB Host port */
-+#define AT91RM9200_ID_EMAC 24 /* Ethernet */
-+#define AT91RM9200_ID_IRQ0 25 /* Advanced Interrupt Controller (IRQ0) */
-+#define AT91RM9200_ID_IRQ1 26 /* Advanced Interrupt Controller (IRQ1) */
-+#define AT91RM9200_ID_IRQ2 27 /* Advanced Interrupt Controller (IRQ2) */
-+#define AT91RM9200_ID_IRQ3 28 /* Advanced Interrupt Controller (IRQ3) */
-+#define AT91RM9200_ID_IRQ4 29 /* Advanced Interrupt Controller (IRQ4) */
-+#define AT91RM9200_ID_IRQ5 30 /* Advanced Interrupt Controller (IRQ5) */
-+#define AT91RM9200_ID_IRQ6 31 /* Advanced Interrupt Controller (IRQ6) */
-+/*
-+ * User Peripheral physical base addresses.
-+ */
-+
-+
-+
-+#define AT91RM9200_BASE_TC0 0xFFFA0000 /* (TC0) Base Address */
-+#define AT91RM9200_BASE_TC1 0xFFFA4000 /* (TC0) Base Address */
-+#define AT91RM9200_BASE_UDP 0xFFFB0000 /* (TC0) Base Address */
-+#define AT91RM9200_BASE_MCI 0xFFFB4000 /* (TC0) Base Address */
-+#define AT91RM9200_BASE_TWI 0xFFFB8000 /* (TC0) Base Address */
-+#define AT91RM9200_BASE_EMAC 0xFFFBC000 /* (EMAC) Base Address */
-+#define AT91RM9200_BASE_US0 0xFFFC0000 /* (US0) Base Address */
-+#define AT91RM9200_BASE_US1 0xFFFC4000 /* (US1) Base Address */
-+#define AT91RM9200_BASE_US2 0xFFFC8000 /* (US1) Base Address */
-+#define AT91RM9200_BASE_US3 0xFFFCC000 /* (US1) Base Address */
-+#define AT91RM9200_BASE_SPI 0xFFFE0000 /* (SPI) Base Address */
-+
-+#define AT91RM9200_BASE_AIC 0xFFFFF000 /* (AIC) Base Address */
-+#define AT91RM9200_BASE_DBGU 0xFFFFF200 /* (DBGU) Base Address */
-+#define AT91RM9200_BASE_PIOA 0xFFFFF400 /* (PIOA) Base Address */
-+#define AT91RM9200_BASE_PIOB 0xFFFFF600 /* (PIOB) Base Address */
-+#define AT91RM9200_BASE_PIOC 0xFFFFF800 /* (PIOC) Base Address */
-+#define AT91RM9200_BASE_PIOD 0xFFFFFA00 /* (PIOC) Base Address */
-+#define AT91RM9200_BASE_PMC 0xFFFFFC00 /* (PMC) Base Address */
-+#define AT91RM9200_BASE_CKGR 0xFFFFFC20 /* (CKGR) Base Address */
-+#define AT91RM9200_BASE_ST 0xFFFFFD00 /* (PMC) Base Address */
-+#define AT91RM9200_BASE_RTC 0xFFFFFE00 /* (PMC) Base Address */
-+#define AT91RM9200_BASE_MC 0xFFFFFF00 /* (PMC) Base Address */
-+#define AT91RM9200_BASE_EBI 0xFFFFFF60 /* (PMC) Base Address */
-+#define AT91RM9200_BASE_SMC2 0xFFFFFF70 /* (SMC2) Base Address */
-+#define AT91RM9200_BASE_SDRAMC 0xFFFFFF90 /* (SMC2) Base Address */
-+#define AT91RM9200_BASE_BFC 0xFFFFFFC0 /* (SMC2) Base Address */
-+
-+/*
-+ * System Peripherals (offset from AT91_BASE_SYS)
-+ */
-+#define AT91_BASE_SYS AT91RM9200_BASE_AIC
-+
-+#define AT91_AIC (AT91RM9200_BASE_AIC - AT91_BASE_SYS)
-+#define AT91_DBGU (AT91RM9200_BASE_DBGU - AT91_BASE_SYS)
-+#define AT91_PIOA (AT91RM9200_BASE_PIOA - AT91_BASE_SYS)
-+#define AT91_PIOB (AT91RM9200_BASE_PIOB - AT91_BASE_SYS)
-+#define AT91_PIOC (AT91RM9200_BASE_PIOC - AT91_BASE_SYS)
-+#define AT91_PIOD (AT91RM9200_BASE_PIOD - AT91_BASE_SYS)
-+#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
-+#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
-+#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
-+#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
-+#define AT91_PMC (AT91RM9200_BASE_PMC - AT91_BASE_SYS)
-+
-+#define AT91_CKGR (AT91RM9200_BASE_CKGR - AT91_BASE_SYS)
-+#define AT91_ST (AT91RM9200_BASE_ST - AT91_BASE_SYS)
-+#define AT91_RTC (AT91RM9200_BASE_RTC - AT91_BASE_SYS)
-+#define AT91_MC (AT91RM9200_BASE_MC - AT91_BASE_SYS)
-+#define AT91_EBI (AT91RM9200_BASE_EBI - AT91_BASE_SYS)
-+#define AT91_EBI_CSA ((AT91RM9200_BASE_EBI +0x00) - AT91_BASE_SYS)
-+#define AT91_SMC2 (AT91RM9200_BASE_SMC2 - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR0 ((AT91RM9200_BASE_SMC2+0x00) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR1 ((AT91RM9200_BASE_SMC2+0x04) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR2 ((AT91RM9200_BASE_SMC2+0x08) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR3 ((AT91RM9200_BASE_SMC2+0x0c) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR4 ((AT91RM9200_BASE_SMC2+0x10) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR5 ((AT91RM9200_BASE_SMC2+0x14) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR6 ((AT91RM9200_BASE_SMC2+0x18) - AT91_BASE_SYS)
-+#define AT91_SMC2_CSR7 ((AT91RM9200_BASE_SMC2+0x1c) - AT91_BASE_SYS)
-+
-+
-+#define AT91_USART0 AT91RM9200_BASE_US0
-+#define AT91_USART1 AT91RM9200_BASE_US1
-+#define AT91_USART2 AT91RM9200_BASE_US2
-+#define AT91_USART3 AT91RM9200_BASE_US3
-+
- /*****************************************************************************/
- /* SOFTWARE API DEFINITION FOR Timer Counter Channel Interface */
- /*****************************************************************************/
-diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/gpio.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/gpio.h
---- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/gpio.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/gpio.h 2009-01-01 14:02:11.000000000 +0100
-@@ -0,0 +1,367 @@
-+/*
-+ * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h]
-+ *
-+ * Copyright (C) 2005 HP Labs
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ */
-+
-+#ifndef __ASM_ARCH_AT91_GPIO_H
-+#define __ASM_ARCH_AT91_GPIO_H
-+
-+#include <asm/io.h>
-+#include <asm/errno.h>
-+#include <asm/arch/at91_pio.h>
-+#include <asm/arch/hardware.h>
-+
-+#define PIN_BASE 32
-+
-+#define MAX_GPIO_BANKS 5
-+
-+/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
-+
-+#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0)
-+#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1)
-+#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2)
-+#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3)
-+#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4)
-+#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5)
-+#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6)
-+#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7)
-+#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8)
-+#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9)
-+#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10)
-+#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11)
-+#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12)
-+#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13)
-+#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14)
-+#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15)
-+#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16)
-+#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17)
-+#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18)
-+#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19)
-+#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20)
-+#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21)
-+#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22)
-+#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23)
-+#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24)
-+#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25)
-+#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26)
-+#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27)
-+#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28)
-+#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29)
-+#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30)
-+#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31)
-+
-+#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0)
-+#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1)
-+#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2)
-+#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3)
-+#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4)
-+#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5)
-+#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6)
-+#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7)
-+#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8)
-+#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9)
-+#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10)
-+#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11)
-+#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12)
-+#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13)
-+#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14)
-+#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15)
-+#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16)
-+#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17)
-+#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18)
-+#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19)
-+#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20)
-+#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21)
-+#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22)
-+#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23)
-+#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24)
-+#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25)
-+#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26)
-+#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27)
-+#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28)
-+#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29)
-+#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30)
-+#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31)
-+
-+#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0)
-+#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1)
-+#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2)
-+#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3)
-+#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4)
-+#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5)
-+#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6)
-+#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7)
-+#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8)
-+#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9)
-+#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10)
-+#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11)
-+#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12)
-+#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13)
-+#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14)
-+#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15)
-+#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16)
-+#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17)
-+#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18)
-+#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19)
-+#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20)
-+#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21)
-+#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22)
-+#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23)
-+#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24)
-+#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25)
-+#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26)
-+#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27)
-+#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28)
-+#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29)
-+#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30)
-+#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31)
-+
-+#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0)
-+#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1)
-+#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2)
-+#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3)
-+#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4)
-+#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5)
-+#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6)
-+#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7)
-+#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8)
-+#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9)
-+#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10)
-+#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11)
-+#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12)
-+#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13)
-+#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14)
-+#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15)
-+#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16)
-+#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17)
-+#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18)
-+#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19)
-+#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20)
-+#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21)
-+#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22)
-+#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23)
-+#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24)
-+#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25)
-+#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26)
-+#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27)
-+#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28)
-+#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29)
-+#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30)
-+#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31)
-+
-+#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0)
-+#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1)
-+#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2)
-+#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3)
-+#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4)
-+#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5)
-+#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6)
-+#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7)
-+#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8)
-+#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9)
-+#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10)
-+#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11)
-+#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12)
-+#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13)
-+#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14)
-+#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15)
-+#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16)
-+#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17)
-+#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18)
-+#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19)
-+#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20)
-+#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21)
-+#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22)
-+#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23)
-+#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24)
-+#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25)
-+#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26)
-+#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27)
-+#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28)
-+#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29)
-+#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30)
-+#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31)
-+
-+static unsigned long at91_pios[] = {
-+ AT91_PIOA,
-+ AT91_PIOB,
-+ AT91_PIOC,
-+#ifdef AT91_PIOD
-+ AT91_PIOD,
-+#ifdef AT91_PIOE
-+ AT91_PIOE
-+#endif
-+#endif
-+};
-+
-+static inline void *pin_to_controller(unsigned pin)
-+{
-+ pin -= PIN_BASE;
-+ pin /= 32;
-+ return (void *)(AT91_BASE_SYS + at91_pios[pin]);
-+}
-+
-+static inline unsigned pin_to_mask(unsigned pin)
-+{
-+ pin -= PIN_BASE;
-+ return 1 << (pin % 32);
-+}
-+
-+/*
-+ * mux the pin to the "GPIO" peripheral role.
-+ */
-+static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + PIO_IDR);
-+ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-+ __raw_writel(mask, pio + PIO_PER);
-+ return 0;
-+}
-+
-+/*
-+ * mux the pin to the "A" internal peripheral role.
-+ */
-+static inline int at91_set_A_periph(unsigned pin, int use_pullup)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + PIO_IDR);
-+ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-+ __raw_writel(mask, pio + PIO_ASR);
-+ __raw_writel(mask, pio + PIO_PDR);
-+ return 0;
-+}
-+
-+/*
-+ * mux the pin to the "B" internal peripheral role.
-+ */
-+static inline int at91_set_B_periph(unsigned pin, int use_pullup)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + PIO_IDR);
-+ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-+ __raw_writel(mask, pio + PIO_BSR);
-+ __raw_writel(mask, pio + PIO_PDR);
-+ return 0;
-+}
-+
-+/*
-+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
-+ * configure it for an input.
-+ */
-+static inline int at91_set_gpio_input(unsigned pin, int use_pullup)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + PIO_IDR);
-+ __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
-+ __raw_writel(mask, pio + PIO_ODR);
-+ __raw_writel(mask, pio + PIO_PER);
-+ return 0;
-+}
-+
-+/*
-+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
-+ * and configure it for an output.
-+ */
-+static inline int at91_set_gpio_output(unsigned pin, int value)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + PIO_IDR);
-+ __raw_writel(mask, pio + PIO_PUDR);
-+ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
-+ __raw_writel(mask, pio + PIO_OER);
-+ __raw_writel(mask, pio + PIO_PER);
-+ return 0;
-+}
-+
-+/*
-+ * enable/disable the glitch filter; mostly used with IRQ handling.
-+ */
-+static inline int at91_set_deglitch(unsigned pin, int is_on)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
-+ return 0;
-+}
-+
-+/*
-+ * enable/disable the multi-driver; This is only valid for output and
-+ * allows the output pin to run as an open collector output.
-+ */
-+static inline int at91_set_multi_drive(unsigned pin, int is_on)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
-+ return 0;
-+}
-+
-+static inline int gpio_direction_input(unsigned pin)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ if (!(__raw_readl(pio + PIO_PSR) & mask))
-+ return -EINVAL;
-+ __raw_writel(mask, pio + PIO_ODR);
-+ return 0;
-+}
-+
-+static inline int gpio_direction_output(unsigned pin, int value)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ if (!(__raw_readl(pio + PIO_PSR) & mask))
-+ return -EINVAL;
-+ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
-+ __raw_writel(mask, pio + PIO_OER);
-+ return 0;
-+}
-+
-+/*
-+ * assuming the pin is muxed as a gpio output, set its value.
-+ */
-+static inline int at91_set_gpio_value(unsigned pin, int value)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+
-+ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
-+ return 0;
-+}
-+
-+/*
-+ * read the pin's value (works even if it's not muxed as a gpio).
-+ */
-+static inline int at91_get_gpio_value(unsigned pin)
-+{
-+ void *pio = pin_to_controller(pin);
-+ unsigned mask = pin_to_mask(pin);
-+ u32 pdsr;
-+
-+ pdsr = __raw_readl(pio + PIO_PDSR);
-+ return (pdsr & mask) != 0;
-+}
-+
-+#endif
-diff -urN u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/io.h u-boot-2009.01/include/asm-arm/arch-at91rm9200/io.h
---- u-boot-2009.01-rc1-0rig//include/asm-arm/arch-at91rm9200/io.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/asm-arm/arch-at91rm9200/io.h 2009-01-01 15:59:51.000000000 +0100
-@@ -0,0 +1,56 @@
-+/*
-+ * [origin: Linux kernel include/asm-arm/arch-at91/io.h]
-+ *
-+ * Copyright (C) 2003 SAN People
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#ifndef __ASM_ARCH_IO_H
-+#define __ASM_ARCH_IO_H
-+
-+#include <asm/io.h>
-+
-+static inline unsigned int at91_sys_read(unsigned int reg_offset)
-+{
-+ void *addr = (void *)AT91_BASE_SYS;
-+
-+ return __raw_readl(addr + reg_offset);
-+}
-+
-+static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
-+{
-+ void *addr = (void *)AT91_BASE_SYS;
-+
-+ __raw_writel(value, addr + reg_offset);
-+}
-+
-+static inline void at91_sys_setbit(unsigned long value, unsigned int reg_offset)
-+{
-+ void *addr = (void *)(AT91_BASE_SYS + reg_offset);
-+ value |= __raw_readl(addr);
-+ __raw_writel(value, addr);
-+}
-+
-+static inline void at91_sys_clrbit(unsigned long value, unsigned int reg_offset)
-+{
-+ void *addr = (void *)(AT91_BASE_SYS + reg_offset);
-+ unsigned long data;
-+ data = __raw_readl(addr);
-+ data &= ~value;
-+ __raw_writel(data, addr);
-+}
-+
-+#endif
-
+++ /dev/null
-diff -urN u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk_df.h u-boot-2009.01/include/configs/at91rm9200dk_df.h
---- u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk_df.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200dk_df.h 2009-01-01 21:19:30.000000000 +0100
-@@ -0,0 +1,251 @@
-+/*
-+ * Rick Bronson <rick@efn.org>
-+ *
-+ * Configuration settings for the AT91RM9200DK board.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200DK
-+#define CONFIG_HOSTNAME at91rm9200dk
-+
-+/* ARM asynchronous clock */
-+#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
-+#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-+/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
-+
-+#define AT91_SLOW_CLOCK 32768 /* slow clock */
-+
-+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-+#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
-+#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
-+#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
-+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-+#define USE_920T_MMU 1
-+
-+#define CONFIG_SKIP_LOWLEVEL_INIT /* Already done by dataflashboot */
-+
-+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-+#define CONFIG_SETUP_MEMORY_TAGS 1
-+#define CONFIG_INITRD_TAG 1
-+
-+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
-+/* flash */
-+#define MC_PUIA_VAL 0x00000000
-+#define MC_PUP_VAL 0x00000000
-+#define MC_PUER_VAL 0x00000000
-+#define MC_ASR_VAL 0x00000000
-+#define MC_AASR_VAL 0x00000000
-+#define EBI_CFGR_VAL 0x00000000
-+#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
-+
-+/* clocks */
-+#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
-+#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
-+#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
-+
-+/* sdram */
-+#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
-+#define PIOC_BSR_VAL 0x00000000
-+#define PIOC_PDR_VAL 0xFFFF0000
-+#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
-+#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
-+#define SDRAM 0x20000000 /* address of the SDRAM */
-+#define SDRAM1 0x20000080 /* address of the SDRAM */
-+#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
-+#define SDRC_MR_VAL 0x00000002 /* Precharge All */
-+#define SDRC_MR_VAL1 0x00000004 /* refresh */
-+#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
-+#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
-+#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-+#else
-+#define CONFIG_SKIP_RELOCATE_UBOOT
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+/*
-+ * Size of malloc() pool
-+ */
-+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-+
-+#define CONFIG_BAUDRATE 115200
-+
-+/*
-+ * Hardware drivers
-+ */
-+
-+/* define one of these to choose the DBGU, USART0 or USART1 as console */
-+#define CONFIG_DBGU
-+#undef CONFIG_USART0
-+#undef CONFIG_USART1
-+
-+#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
-+
-+#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
-+
-+#define CONFIG_BOOTDELAY 3
-+/* #define CONFIG_ENV_OVERWRITE 1 */
-+
-+
-+/*
-+ * BOOTP options
-+ */
-+#define CONFIG_BOOTP_BOOTFILESIZE
-+#define CONFIG_BOOTP_BOOTPATH
-+#define CONFIG_BOOTP_GATEWAY
-+#define CONFIG_BOOTP_HOSTNAME
-+
-+
-+/*
-+ * Command line configuration.
-+ */
-+#include <config_cmd_default.h>
-+
-+#define CONFIG_CMD_DHCP
-+#define CONFIG_CMD_MII
-+#define CONFIG_CMD_NAND
-+#define CONFIG_CMD_AT91_SPIMUX
-+
-+#define CONFIG_NAND_LEGACY
-+
-+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-+#define SECTORSIZE 512
-+
-+#define ADDR_COLUMN 1
-+#define ADDR_PAGE 2
-+#define ADDR_COLUMN_PAGE 3
-+
-+#define NAND_ChipID_UNKNOWN 0x00
-+#define NAND_MAX_FLOORS 1
-+#define NAND_MAX_CHIPS 1
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
-+#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
-+
-+#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
-+#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
-+#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
-+
-+#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
-+
-+#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
-+#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
-+#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-+#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-+/* the following are NOP's in our implementation */
-+#define NAND_CTL_CLRALE(nandptr)
-+#define NAND_CTL_SETALE(nandptr)
-+#define NAND_CTL_CLRCLE(nandptr)
-+#define NAND_CTL_SETCLE(nandptr)
-+
-+#define CONFIG_NR_DRAM_BANKS 1
-+#define PHYS_SDRAM 0x20000000
-+#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
-+
-+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
-+#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-+
-+#define CONFIG_DRIVER_ETHER
-+#define CONFIG_NET_RETRY_COUNT 20
-+#define CONFIG_AT91C_USE_RMII
-+
-+/* AC Characteristics */
-+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS (0xC << 16)
-+#define DATAFLASH_TCHS (0x1 << 24)
-+
-+#define CONFIG_HAS_DATAFLASH 1
-+#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
-+#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
-+#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
-+#define CONFIG__SUPPORT_BLOCK_ERASE 1
-+
-+
-+#define PHYS_FLASH_1 0x10000000
-+#define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */
-+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-+#define CONFIG_SYS_MAX_FLASH_BANKS 1
-+#define CONFIG_SYS_MAX_FLASH_SECT 256
-+#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-+#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-+
-+#define CONFIG_ENV_IS_IN_DATAFLASH 1
-+#define CONFIG_NEW_PARTITION 1
-+
-+#ifdef CONFIG_ENV_IS_IN_DATAFLASH
-+#ifdef CONFIG_NEW_PARTITION
-+#define CONFIG_ENV_OFFSET 0x4200
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x2000 /* 8 * 1056 really , but start.s is not OK with this*/
-+#else
-+#define CONFIG_ENV_OFFSET 0x20000
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
-+#endif
-+#else
-+#define CONFIG_ENV_IS_IN_FLASH 1
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
-+#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
-+#else
-+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
-+#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
-+
-+#if defined(CONFIG_AT91RM9200DK)
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
-+#else
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
-+#endif
-+
-+#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
-+
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
-+#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
-+#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
-+#else
-+#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
-+#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
-+#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+
-+#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
-+
-+#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
-+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-+
-+#define CONFIG_SYS_HZ 1000
-+#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
-+ /* AT91C_TC_TIMER_DIV1_CLOCK */
-+
-+#define CONFIG_STACKSIZE (32*1024) /* regular stack */
-+
-+#ifdef CONFIG_USE_IRQ
-+#error CONFIG_USE_IRQ not supported
-+#endif
-+
-+#endif
-diff -urN u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk.h u-boot-2009.01/include/configs/at91rm9200dk.h
---- u-boot-2009.01-rc1-0rig//include/configs/at91rm9200dk.h 2009-01-01 13:09:35.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200dk.h 2009-01-01 17:06:32.000000000 +0100
-@@ -24,6 +24,8 @@
-
- #ifndef __CONFIG_H
- #define __CONFIG_H
-+#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200DK
-+#define CONFIG_HOSTNAME at91rm9200dk
-
- /* ARM asynchronous clock */
- #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
-@@ -33,6 +35,7 @@
- #define AT91_SLOW_CLOCK 32768 /* slow clock */
-
- #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-+#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
- #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
- #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
- #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-@@ -117,6 +120,7 @@
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_MII
- #define CONFIG_CMD_NAND
-+#define CONFIG_CMD_AT91_SPIMUX
-
- #define CONFIG_NAND_LEGACY
-
-@@ -198,6 +202,11 @@
- #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
- #endif /* CONFIG_ENV_IS_IN_DATAFLASH */
-
-+#if defined(CONFIG_AT91RM9200DK)
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
-+#else
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
-+#endif
-
- #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
-
-diff -urN u-boot-2009.01-rc1-0rig//Makefile u-boot-2009.01/Makefile
---- u-boot-2009.01-rc1-0rig//Makefile 2009-01-01 13:09:30.000000000 +0100
-+++ u-boot-2009.01/Makefile 2009-01-01 21:35:24.000000000 +0100
-@@ -2562,6 +2562,9 @@
- ## Atmel AT91RM9200 Systems
- #########################################################################
-
-+at91rm9200dk_df_config : unconfig
-+ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
-+
- at91rm9200dk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
-
-
+++ /dev/null
-diff -urN u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/at91rm9200dk.c u-boot-2009.01/board/atmel/at91rm9200dk/at91rm9200dk.c
---- u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/at91rm9200dk.c 2009-01-01 13:09:31.000000000 +0100
-+++ u-boot-2009.01/board/atmel/at91rm9200dk/at91rm9200dk.c 2009-01-01 16:11:36.000000000 +0100
-@@ -3,6 +3,9 @@
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
-+ * (C) Copyright 2008
-+ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
-+ *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
-@@ -24,6 +27,10 @@
-
- #include <common.h>
- #include <asm/arch/AT91RM9200.h>
-+#include <asm/arch/at91_pmc.h>
-+#include <asm/arch/at91_pio.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/io.h>
- #include <at91rm9200_net.h>
- #include <dm9161.h>
-
-@@ -41,13 +48,13 @@
-
- /* Correct IRDA resistor problem */
- /* Set PA23_TXD in Output */
-- ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
-+ at91_set_gpio_output(AT91_PIN_PA23, 1);
-
- /* memory and cpu-speed are setup before relocation */
- /* so we do _nothing_ here */
-
- /* arch number of AT91RM9200DK-Board */
-- gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
-+ gd->bd->bi_arch_number = AT91RM9200_BOARD;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-@@ -91,46 +98,58 @@
- */
- #if defined(CONFIG_CMD_NAND)
- extern ulong nand_probe (ulong physadr);
-+/* set the bus interface characteristics based on
-+ * tDS Data Set up Time 30 - ns
-+ * tDH Data Hold Time 20 - ns
-+ * tALS ALE Set up Time 20 - ns
-+ * 16ns at 60 MHz ~= 3
-+ */
-
--#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
--void nand_init (void)
--{
-- /* Setup Smart Media, fitst enable the address range of CS3 */
-- *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
-- /* set the bus interface characteristics based on
-- tDS Data Set up Time 30 - ns
-- tDH Data Hold Time 20 - ns
-- tALS ALE Set up Time 20 - ns
-- 16ns at 60 MHz ~= 3 */
- /*memory mapping structures */
- #define SM_ID_RWH (5 << 28)
- #define SM_RWH (1 << 28)
- #define SM_RWS (0 << 24)
- #define SM_TDF (1 << 8)
- #define SM_NWS (3)
-- AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
-- AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
-- SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
-+
-+#define SMARTMEDIA_INIT ( \
-+ SM_RWH | \
-+ SM_RWS | \
-+ AT91C_SMC2_ACSS_STANDARD | \
-+ AT91C_SMC2_DBW_8 | \
-+ SM_TDF | \
-+ AT91C_SMC2_WSEN | \
-+ SM_NWS \
-+ )
-+
-+
-+
-+#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
-+void nand_init (void)
-+{
-+ /* Setup Smart Media, fitst enable the address range of CS3 */
-+ /* *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia; */
-+ at91_sys_setbit(AT91C_EBI_CS3A_SMC_SmartMedia, AT91_EBI_CSA);
-+
-+ /* Init Smartmedia Interface */
-+ at91_sys_write(AT91_SMC2_CSR3, SMARTMEDIA_INIT);
-
- /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
-- *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
-- AT91C_PC3_BFBAA_SMWE;
-- *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
-- AT91C_PC3_BFBAA_SMWE;
-+ at91_set_A_periph(AT91_PIN_PC0, 0); /* BFCK */
-+ at91_set_A_periph(AT91_PIN_PC1, 0); /* BFRDY/SMOE */
-+ at91_set_A_periph(AT91_PIN_PC3, 0); /* BFBAA/SMWE */
-
- /* Configure PC2 as input (signal READY of the SmartMedia) */
-- *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
-- *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
-+ at91_set_gpio_input(AT91_PIN_PC2, 0);
-
- /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
-- *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
-- *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
-+ at91_set_gpio_input(AT91_PIN_PB1, 0);
-
- /* PIOB and PIOC clock enabling */
-- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
-- *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91RM9200_ID_PIOB);
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91RM9200_ID_PIOC);
-
-- if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
-+ if (at91_get_gpio_value(AT91_PIN_PB1))
- printf (" No SmartMedia card inserted\n");
- #ifdef DEBUG
- printf (" SmartMedia card inserted\n");
-@@ -140,3 +159,4 @@
- printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
- }
- #endif
-+
-diff -urN u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/led.c u-boot-2009.01/board/atmel/at91rm9200dk/led.c
---- u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/led.c 2009-01-01 13:09:31.000000000 +0100
-+++ u-boot-2009.01/board/atmel/at91rm9200dk/led.c 2009-01-01 15:53:56.000000000 +0100
-@@ -24,57 +24,105 @@
-
- #include <common.h>
- #include <asm/arch/AT91RM9200.h>
-+/*#include <asm/arch/at91_pmc.h>*/
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/io.h>
-
--#define GREEN_LED AT91C_PIO_PB0
--#define YELLOW_LED AT91C_PIO_PB1
--#define RED_LED AT91C_PIO_PB2
-+#define GREEN_LED AT91_PIN_PB0
-+#define YELLOW_LED AT91_PIN_PB1
-+#define RED_LED AT91_PIN_PB2
-
--void green_LED_on(void)
-+
-+#define GREEN_LED_ON 0
-+#define GREEN_LED_OFF 1
-+#define YELLOW_LED_ON 0
-+#define YELLOW_LED_OFF 1
-+#define RED_LED_ON 0
-+#define RED_LED_OFF 1
-+
-+#define TIME_SLICE 500000
-+
-+void yellow_LED_on(void)
-+{
-+ at91_set_gpio_value(YELLOW_LED, YELLOW_LED_ON);
-+}
-+
-+void yellow_LED_off(void)
-+{
-+ at91_set_gpio_value(YELLOW_LED, YELLOW_LED_OFF);
-+}
-+
-+void red_LED_on(void)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- PIOB->PIO_CODR = GREEN_LED;
-+ at91_set_gpio_value(RED_LED, RED_LED_ON);
- }
-
--void yellow_LED_on(void)
-+void red_LED_off(void)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- PIOB->PIO_CODR = YELLOW_LED;
-+ at91_set_gpio_value(RED_LED, RED_LED_OFF);
- }
-
--void red_LED_on(void)
-+void green_LED_on(void)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- PIOB->PIO_CODR = RED_LED;
-+ at91_set_gpio_value(GREEN_LED, GREEN_LED_ON);
- }
-
--void green_LED_off(void)
-+void green_LED_off(void)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- PIOB->PIO_SODR = GREEN_LED;
-+ at91_set_gpio_value(GREEN_LED, GREEN_LED_OFF);
- }
-
--void yellow_LED_off(void)
-+static void delay(unsigned int time)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- PIOB->PIO_SODR = YELLOW_LED;
-+ volatile unsigned int counter = time;
-+ while(counter > 0) counter--;
- }
-
--void red_LED_off(void)
-+void green_LED_blink(unsigned int time)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- PIOB->PIO_SODR = RED_LED;
-+ while(time > 0) {
-+ green_LED_on();
-+ delay(TIME_SLICE);
-+ green_LED_off();
-+ delay(TIME_SLICE);
-+ time--;
-+ }
- }
-
-+void yellow_LED_blink(unsigned int time)
-+{
-+ while(time > 0) {
-+ yellow_LED_on();
-+ delay(TIME_SLICE);
-+ yellow_LED_off();
-+ delay(TIME_SLICE);
-+ time--;
-+ }
-+}
-
--void coloured_LED_init (void)
-+void red_LED_blink(unsigned int time)
- {
-- AT91PS_PIO PIOB = AT91C_BASE_PIOB;
-- AT91PS_PMC PMC = AT91C_BASE_PMC;
-- PMC->PMC_PCER = (1 << AT91C_ID_PIOB); /* Enable PIOB clock */
-- /* Disable peripherals on LEDs */
-- PIOB->PIO_PER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-- /* Enable pins as outputs */
-- PIOB->PIO_OER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-- /* Turn all LEDs OFF */
-- PIOB->PIO_SODR = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-+ while(time > 0) {
-+ red_LED_on();
-+ delay(TIME_SLICE);
-+ red_LED_off();
-+ delay(TIME_SLICE);
-+ time--;
-+ }
- }
-+
-+void coloured_LED_init(void)
-+{
-+ /* Enable clock */
-+ at91_sys_write(AT91C_PMC_PCER, 1 << AT91RM9200_ID_PIOB);
-+
-+ at91_set_gpio_output(GREEN_LED, 1);
-+ at91_set_gpio_output(YELLOW_LED, 1);
-+ at91_set_gpio_output(RED_LED, 1);
-+
-+ at91_set_gpio_value(GREEN_LED, GREEN_LED_OFF);
-+ at91_set_gpio_value(YELLOW_LED, YELLOW_LED_OFF);
-+ at91_set_gpio_value(RED_LED, RED_LED_ON);
-+}
-+
-+
-diff -urN u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/mux.c u-boot-2009.01/board/atmel/at91rm9200dk/mux.c
---- u-boot-2009.01-rc1-0rig//board/atmel/at91rm9200dk/mux.c 2009-01-01 13:09:31.000000000 +0100
-+++ u-boot-2009.01/board/atmel/at91rm9200dk/mux.c 2009-01-01 16:38:01.000000000 +0100
-@@ -1,37 +1,29 @@
- #include <config.h>
- #include <common.h>
- #include <asm/hardware.h>
-+#include <asm/arch/at91_pio.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/io.h>
- #include <dataflash.h>
-
- int AT91F_GetMuxStatus(void) {
--#ifdef DATAFLASH_MMC_SELECT
-- AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
-- AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
--
--
-- if(AT91C_BASE_PIOB->PIO_ODSR & DATAFLASH_MMC_SELECT) {
-- return 1;
-- } else {
-- return 0;
-- }
--#endif
-+#ifdef CONFIG_CMD_AT91_SPIMUX
-+ return at91_get_gpio_value(DATAFLASH_MMC_SELECT);
-+#else
- return 0;
-+#endif
- }
-
--void AT91F_SelectMMC(void) {
--#ifdef DATAFLASH_MMC_SELECT
-- AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
-- AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
-- /* Set Output */
-- AT91C_BASE_PIOB->PIO_SODR = DATAFLASH_MMC_SELECT;
-+void AT91F_SelectMMC(void)
-+{
-+#ifdef CONFIG_CMD_AT91_SPIMUX
-+ at91_set_gpio_output(DATAFLASH_MMC_SELECT, 1); /* Set in PIO mode and select SD-Card*/
- #endif
- }
-
- void AT91F_SelectSPI(void) {
--#ifdef DATAFLASH_MMC_SELECT
-- AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
-- AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
-- /* Clear Output */
-- AT91C_BASE_PIOB->PIO_CODR = DATAFLASH_MMC_SELECT;
-+#ifdef CONFIG_CMD_AT91_SPIMUX
-+ at91_set_gpio_output(DATAFLASH_MMC_SELECT, 0); /* Set in PIO mode and select SPI */
- #endif
- }
-+
-
+++ /dev/null
-diff -urN u-boot-2009.01-0rig/include/configs/at91rm9200df.h u-boot-2009.01/include/configs/at91rm9200df.h
---- u-boot-2009.01-0rig/include/configs/at91rm9200df.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200df.h 2009-01-01 21:19:17.000000000 +0100
-@@ -0,0 +1,261 @@
-+/*
-+ * Rick Bronson <rick@efn.org>
-+ *
-+ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
-+ *
-+ * Configuration settings for the AT91RM9200EK board.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200DF
-+#define CONFIG_HOSTNAME at91rm9200df
-+/* ARM asynchronous clock */
-+#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
-+#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-+/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
-+
-+#define AT91_SLOW_CLOCK 32768 /* slow clock */
-+
-+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-+#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
-+#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
-+#define CONFIG_AT91RM9200DF 1 /* Generic AT91RM9200 Board running from Dataflashcard */
-+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-+#define USE_920T_MMU 1
-+
-+#define CONFIG_SKIP_LOWLEVEL_INIT /* Already done by dataflashboot */
-+
-+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-+#define CONFIG_SETUP_MEMORY_TAGS 1
-+#define CONFIG_INITRD_TAG 1
-+
-+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
-+/* flash */
-+#define MC_PUIA_VAL 0x00000000
-+#define MC_PUP_VAL 0x00000000
-+#define MC_PUER_VAL 0x00000000
-+#define MC_ASR_VAL 0x00000000
-+#define MC_AASR_VAL 0x00000000
-+#define EBI_CFGR_VAL 0x00000000
-+#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
-+
-+/* clocks */
-+#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
-+#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
-+#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
-+
-+/* sdram */
-+#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
-+#define PIOC_BSR_VAL 0x00000000
-+#define PIOC_PDR_VAL 0xFFFF0000
-+#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
-+#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
-+#define SDRAM 0x20000000 /* address of the SDRAM */
-+#define SDRAM1 0x20000080 /* address of the SDRAM */
-+#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
-+#define SDRC_MR_VAL 0x00000002 /* Precharge All */
-+#define SDRC_MR_VAL1 0x00000004 /* refresh */
-+#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
-+#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
-+#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-+#else
-+#define CONFIG_SKIP_RELOCATE_UBOOT
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+/*
-+ * Size of malloc() pool
-+ */
-+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-+
-+#define CONFIG_BAUDRATE 115200
-+
-+/*
-+ * Hardware drivers
-+ */
-+
-+/* define one of these to choose the DBGU, USART0 or USART1 as console */
-+#define CONFIG_DBGU
-+#undef CONFIG_USART0
-+#undef CONFIG_USART1
-+
-+#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
-+
-+#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
-+
-+#define CONFIG_BOOTDELAY 3
-+/* #define CONFIG_ENV_OVERWRITE 1 */
-+
-+
-+/*
-+ * BOOTP options
-+ */
-+#define CONFIG_BOOTP_BOOTFILESIZE
-+#define CONFIG_BOOTP_BOOTPATH
-+#define CONFIG_BOOTP_GATEWAY
-+#define CONFIG_BOOTP_HOSTNAME
-+
-+
-+/*
-+ * Command line configuration.
-+ */
-+#include <config_cmd_default.h>
-+
-+#define CONFIG_CMD_DHCP
-+#define CONFIG_CMD_MII
-+#define CONFIG_CMD_NAND
-+#define CONFIG_CMD_AT91_SPIMUX
-+#define CONFIG_CMD_ETHINIT
-+
-+#define CONFIG_DOS_PARTITION 1
-+#define CONFIG_MMC 1
-+#define CONFIG_SUPPORT_VFAT 1
-+#define CONFIG__MMC_BASE 0xFFFB4000 /* From AT91RM9200.h*/
-+#define CONFIG__MMC_BLOCKSIZE 512
-+
-+#define CONFIG_NAND_LEGACY
-+
-+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-+#define SECTORSIZE 512
-+
-+#define ADDR_COLUMN 1
-+#define ADDR_PAGE 2
-+#define ADDR_COLUMN_PAGE 3
-+
-+#define NAND_ChipID_UNKNOWN 0x00
-+#define NAND_MAX_FLOORS 1
-+#define NAND_MAX_CHIPS 1
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
-+#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
-+
-+#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
-+#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
-+#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
-+
-+#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
-+
-+#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
-+#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
-+#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-+#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-+/* the following are NOP's in our implementation */
-+#define NAND_CTL_CLRALE(nandptr)
-+#define NAND_CTL_SETALE(nandptr)
-+#define NAND_CTL_CLRCLE(nandptr)
-+#define NAND_CTL_SETCLE(nandptr)
-+
-+#define CONFIG_NR_DRAM_BANKS 1
-+#define PHYS_SDRAM 0x20000000
-+#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
-+
-+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
-+#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-+
-+#define CONFIG_DRIVER_ETHER
-+#define CONFIG_NET_RETRY_COUNT 20
-+#define CONFIG_AT91C_USE_RMII
-+
-+/* AC Characteristics */
-+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS (0xC << 16)
-+#define DATAFLASH_TCHS (0x1 << 24)
-+
-+#define CONFIG_HAS_DATAFLASH 1
-+#undef BOARD_LATE_INIT
-+
-+#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
-+#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
-+#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
-+#define CONFIG__SUPPORT_BLOCK_ERASE 1
-+
-+#define PHYS_FLASH_1 0x10000000
-+#define PHYS_FLASH_SIZE 0x800000 /* 2 megs main flash */
-+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-+#define CONFIG_SYS_MAX_FLASH_BANKS 1
-+#define CONFIG_SYS_MAX_FLASH_SECT 256
-+#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-+#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-+
-+#define CONFIG_ENV_IS_IN_DATAFLASH
-+#define CONFIG_NEW_PARTITION 1
-+
-+#ifdef CONFIG_ENV_IS_IN_DATAFLASH
-+#ifdef CONFIG_NEW_PARTITION
-+#define CONFIG_ENV_OFFSET 0x21000
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x2000 /* 8 * 1056 really , but start.s is not OK with this*/
-+#else
-+#define CONFIG_ENV_OFFSET 0x20000
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
-+#endif
-+#else
-+#define CONFIG_ENV_IS_IN_FLASH 1
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
-+#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
-+#else
-+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
-+#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
-+
-+#if defined(CONFIG_AT91RM9200DK)
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
-+#else
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
-+#endif
-+
-+#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
-+
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
-+#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
-+#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
-+#else
-+#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
-+#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
-+#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+
-+#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
-+
-+#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
-+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-+
-+#define CONFIG_SYS_HZ 1000
-+#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
-+ /* AT91C_TC_TIMER_DIV1_CLOCK */
-+
-+#define CONFIG_STACKSIZE (32*1024) /* regular stack */
-+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-+#define CONFIG_STACKSIZE_FIQ (4*1024)
-+
-+#ifdef CONFIG_USE_IRQ
-+#error CONFIG_USE_IRQ not supported
-+#endif
-+#endif
-diff -urN u-boot-2009.01-0rig/include/configs/at91rm9200ek.h u-boot-2009.01/include/configs/at91rm9200ek.h
---- u-boot-2009.01-0rig/include/configs/at91rm9200ek.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200ek.h 2009-01-01 17:13:31.000000000 +0100
-@@ -0,0 +1,251 @@
-+/*
-+ * Rick Bronson <rick@efn.org>
-+ *
-+ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
-+ *
-+ * Configuration settings for the AT91RM9200EK board.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+#define AT91RM9200_BOARD MACH_TYPE_AT91RM9200EK
-+#define CONFIG_HOSTNAME at91rm9200ek
-+/* ARM asynchronous clock */
-+#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
-+#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-+/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
-+
-+#define AT91_SLOW_CLOCK 32768 /* slow clock */
-+
-+#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-+#define CONFIG_AT91 1 /* THis is an ARM from the AT91 family */
-+#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
-+#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */
-+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-+#define USE_920T_MMU 1
-+
-+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-+#define CONFIG_SETUP_MEMORY_TAGS 1
-+#define CONFIG_INITRD_TAG 1
-+
-+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
-+/* flash */
-+#define MC_PUIA_VAL 0x00000000
-+#define MC_PUP_VAL 0x00000000
-+#define MC_PUER_VAL 0x00000000
-+#define MC_ASR_VAL 0x00000000
-+#define MC_AASR_VAL 0x00000000
-+#define EBI_CFGR_VAL 0x00000000
-+#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
-+
-+/* clocks */
-+#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
-+#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
-+#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
-+
-+/* sdram */
-+#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
-+#define PIOC_BSR_VAL 0x00000000
-+#define PIOC_PDR_VAL 0xFFFF0000
-+#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
-+#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
-+#define SDRAM 0x20000000 /* address of the SDRAM */
-+#define SDRAM1 0x20000080 /* address of the SDRAM */
-+#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
-+#define SDRC_MR_VAL 0x00000002 /* Precharge All */
-+#define SDRC_MR_VAL1 0x00000004 /* refresh */
-+#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
-+#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
-+#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-+#else
-+#define CONFIG_SKIP_RELOCATE_UBOOT
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+/*
-+ * Size of malloc() pool
-+ */
-+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-+
-+#define CONFIG_BAUDRATE 115200
-+
-+/*
-+ * Hardware drivers
-+ */
-+
-+/* define one of these to choose the DBGU, USART0 or USART1 as console */
-+#define CONFIG_DBGU
-+#undef CONFIG_USART0
-+#undef CONFIG_USART1
-+
-+#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
-+
-+#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
-+
-+#define CONFIG_BOOTDELAY 3
-+/* #define CONFIG_ENV_OVERWRITE 1 */
-+
-+
-+/*
-+ * BOOTP options
-+ */
-+#define CONFIG_BOOTP_BOOTFILESIZE
-+#define CONFIG_BOOTP_BOOTPATH
-+#define CONFIG_BOOTP_GATEWAY
-+#define CONFIG_BOOTP_HOSTNAME
-+
-+
-+/*
-+ * Command line configuration.
-+ */
-+#include <config_cmd_default.h>
-+
-+#define CONFIG_CMD_DHCP
-+#define CONFIG_CMD_MII
-+#define CONFIG_CMD_NAND
-+#define CONFIG_CMD_AT91_SPIMUX
-+#define CONFIG_CMD_ETHINIT
-+
-+#define CONFIG_NAND_LEGACY
-+
-+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-+#define SECTORSIZE 512
-+
-+#define ADDR_COLUMN 1
-+#define ADDR_PAGE 2
-+#define ADDR_COLUMN_PAGE 3
-+
-+#define NAND_ChipID_UNKNOWN 0x00
-+#define NAND_MAX_FLOORS 1
-+#define NAND_MAX_CHIPS 1
-+
-+#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
-+#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
-+
-+#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
-+#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
-+#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
-+
-+#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
-+
-+#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
-+#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
-+#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-+#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-+/* the following are NOP's in our implementation */
-+#define NAND_CTL_CLRALE(nandptr)
-+#define NAND_CTL_SETALE(nandptr)
-+#define NAND_CTL_CLRCLE(nandptr)
-+#define NAND_CTL_SETCLE(nandptr)
-+
-+#define CONFIG_NR_DRAM_BANKS 1
-+#define PHYS_SDRAM 0x20000000
-+#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
-+
-+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
-+#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-+
-+#define CONFIG_DRIVER_ETHER
-+#define CONFIG_NET_RETRY_COUNT 20
-+#define CONFIG_AT91C_USE_RMII
-+
-+/* AC Characteristics */
-+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS (0xC << 16)
-+#define DATAFLASH_TCHS (0x1 << 24)
-+
-+#define CONFIG_HAS_DATAFLASH 1
-+#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
-+#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
-+#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
-+#define CONFIG__SUPPORT_BLOCK_ERASE 1
-+
-+#define PHYS_FLASH_1 0x10000000
-+#define PHYS_FLASH_SIZE 0x800000 /* 2 megs main flash */
-+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-+#define CONFIG_SYS_MAX_FLASH_BANKS 1
-+#define CONFIG_SYS_MAX_FLASH_SECT 256
-+#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-+#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-+
-+#undef CONFIG_ENV_IS_IN_DATAFLASH
-+#define CONFIG_NEW_PARTITION 1
-+
-+#ifdef CONFIG_ENV_IS_IN_DATAFLASH
-+#ifdef CONFIG_NEW_PARTITION
-+#define CONFIG__ENV_OFFSET 0x21000
-+#define CONFIG__ENV_ADDR (CONFIG_SYS__DATAFLASH_LOGIC_ADDR_CS0 + CONFIG__ENV_OFFSET)
-+#define CONFIG__ENV_SIZE 0x2000 /* 8 * 1056 really , but start.s is not OK with this*/
-+> #else
-+#define CONFIG_ENV_OFFSET 0x20000
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
-+#endif
-+#else
-+#define CONFIG_ENV_IS_IN_FLASH 1
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
-+#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
-+#else
-+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
-+#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
-+
-+#if defined(CONFIG_AT91RM9200DK)
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB7
-+#else
-+#define DATAFLASH_MMC_SELECT AT91_PIN_PB22
-+#endif
-+
-+#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
-+
-+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
-+#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
-+#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
-+#else
-+#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
-+#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
-+#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
-+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-+
-+#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
-+
-+#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
-+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-+
-+#define CONFIG_SYS_HZ 1000
-+#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
-+ /* AT91C_TC_TIMER_DIV1_CLOCK */
-+
-+#define CONFIG_STACKSIZE (32*1024) /* regular stack */
-+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-+#define CONFIG_STACKSIZE_FIQ (4*1024)
-+
-+#ifdef CONFIG_USE_IRQ
-+#error CONFIG_USE_IRQ not supported
-+#endif
-+#endif
-diff -urN u-boot-2009.01-0rig/Makefile u-boot-2009.01/Makefile
---- u-boot-2009.01-0rig/Makefile 2009-01-02 10:03:11.000000000 +0100
-+++ u-boot-2009.01/Makefile 2009-01-01 21:31:34.000000000 +0100
-@@ -2568,6 +2568,12 @@
- at91rm9200dk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
-
-+at91rm9200df_config : unconfig
-+ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
-+
-+at91rm9200ek_config : unconfig
-+ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
-+
- cmc_pu2_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
-
+++ /dev/null
-diff -urN u-boot-2008.10-0rig/Makefile u-boot-2008.10/Makefile
---- u-boot-2008.10-0rig/Makefile 2008-12-28 14:07:30.000000000 +0100
-+++ u-boot-2008.10/Makefile 2008-12-28 14:06:28.000000000 +0100
-@@ -2541,6 +2541,22 @@
- fi;
- @$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
-
-+at91sam9g20ek_nandflash_config \
-+at91sam9g20ek_dataflash_cs0_config \
-+at91sam9g20ek_dataflash_cs1_config \
-+at91sam9g20ek_config : unconfig
-+ @if [ "$(findstring _nandflash,$@)" ] ; then \
-+ echo "#define CONFIG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
-+ $(XECHO) "... with environment variable in NAND FLASH" ; \
-+ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
-+ echo "#define CONFIG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
-+ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
-+ else \
-+ echo "#define CONFIG_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
-+ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
-+ fi;
-+ @$(MKCONFIG) -a at91sam9g20ek arm arm926ejs at91sam9g20ek atmel at91
-+
- at91sam9261ek_nandflash_config \
- at91sam9261ek_dataflash_cs0_config \
- at91sam9261ek_dataflash_cs3_config \
-Index: include/configs/at91sam9g20ek.h
-===================================================================
---- a/include/configs/at91sam9g20ek.h (.../u-boot-1.3.4) (revision 0)
-+++ b/include/configs/at91sam9g20ek.h (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1,198 @@
-+/*
-+ * (C) Copyright 2007-2008
-+ * Stelian Pop <stelian.pop@leadtechdesign.com>
-+ * Lead Tech Design <www.leadtechdesign.com>
-+ *
-+ * Configuation settings for the AT91SAM9G20EK board.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+
-+/* ARM asynchronous clock */
-+#define AT91_MAIN_CLOCK 396288000 /* from 18.432 MHz crystal */
-+#define AT91_MASTER_CLOCK 132096000 /* peripheral = main / 3 */
-+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
-+
-+#define AT91_SLOW_CLOCK 32768 /* slow clock */
-+
-+#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
-+#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/
-+#define CONFIG_AT91SAM9G20EK 1 /* on an AT91SAM9G20EK Board */
-+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-+
-+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-+#define CONFIG_SETUP_MEMORY_TAGS 1
-+#define CONFIG_INITRD_TAG 1
-+
-+#define CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SKIP_RELOCATE_UBOOT
-+
-+/*
-+ * Hardware drivers
-+ */
-+#define CONFIG_ATMEL_USART 1
-+#undef CONFIG_USART0
-+#undef CONFIG_USART1
-+#undef CONFIG_USART2
-+#define CONFIG_USART3 1 /* USART 3 is DBGU */
-+
-+#define CONFIG_BOOTDELAY 3
-+
-+/*
-+ * BOOTP options
-+ */
-+#define CONFIG_BOOTP_BOOTFILESIZE 1
-+#define CONFIG_BOOTP_BOOTPATH 1
-+#define CONFIG_BOOTP_GATEWAY 1
-+#define CONFIG_BOOTP_HOSTNAME 1
-+
-+/*
-+ * Command line configuration.
-+ */
-+#include <config_cmd_default.h>
-+#undef CONFIG_CMD_BDI
-+#undef CONFIG_CMD_IMI
-+#undef CONFIG_CMD_AUTOSCRIPT
-+#undef CONFIG_CMD_FPGA
-+#undef CONFIG_CMD_LOADS
-+#undef CONFIG_CMD_IMLS
-+
-+#define CONFIG_CMD_PING 1
-+#define CONFIG_CMD_DHCP 1
-+#define CONFIG_CMD_NAND
-+#define CONFIG_CMD_USB 1
-+
-+/* SDRAM */
-+#define CONFIG_NR_DRAM_BANKS 1
-+#define PHYS_SDRAM 0x20000000
-+#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
-+
-+/* DataFlash */
-+#define CONFIG_HAS_DATAFLASH 1
-+#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
-+#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
-+#define AT91_SPI_CLK 15000000
-+#define DATAFLASH_TCSS (0x22 << 16)
-+#define DATAFLASH_TCHS (0x1 << 24)
-+#define AT91SAM9260_BASE_SPI0 0xfffc8000
-+/* NAND flash */
-+#define NAND_MAX_CHIPS 1
-+#define CONFIG_SYS_MAX_NAND_DEVICE 1
-+#define CONFIG_SYS_NAND_BASE 0x40000000
-+#define CONFIG_SYS_NAND_DBW_8 1
-+
-+/* NOR flash - no real flash on this board */
-+#define CONFIG_SYS_NO_FLASH 1
-+
-+/* Ethernet */
-+#define CONFIG_MACB 1
-+#define CONFIG_RMII 1
-+#define CONFIG_NET_MULTI 1
-+#define CONFIG_NET_RETRY_COUNT 20
-+#define CONFIG_RESET_PHY_R 1
-+#define AT91SAM9260_BASE_EMAC 0xfffc4000
-+/* USB */
-+#define CONFIG_USB_OHCI_NEW 1
-+#define LITTLEENDIAN 1
-+#define CONFIG_DOS_PARTITION 1
-+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
-+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9G20_UHP_BASE */
-+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g20"
-+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-+#define CONFIG_USB_STORAGE 1
-+
-+#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-+
-+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
-+#define CONFIG_SYS_MEMTEST_END 0x23e00000
-+
-+#ifdef CONFIG_USE_DATAFLASH_CS0
-+
-+/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-+#define CONFIG_ENV_IS_IN_DATAFLASH 1
-+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
-+#define CONFIG_ENV_OFFSET 0x4200
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x4200
-+#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
-+#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
-+ "root=/dev/mtdblock0 " \
-+ "mtdparts=at91_nand:-(root) " \
-+ "rw rootfstype=jffs2"
-+
-+#elif CONFIG_USE_DATAFLASH_CS1
-+
-+/* bootstrap + u-boot + env + linux in dataflash on CS1 */
-+#define CONFIG_ENV_IS_IN_DATAFLASH 1
-+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
-+#define CONFIG_ENV_OFFSET 0x4200
-+#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
-+#define CONFIG_ENV_SIZE 0x4200
-+#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
-+#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
-+ "root=/dev/mtdblock0 " \
-+ "mtdparts=at91_nand:-(root) " \
-+ "rw rootfstype=jffs2"
-+
-+#else /* CONFIG_USE_NANDFLASH */
-+
-+/* bootstrap + u-boot + env + linux in nandflash */
-+#define CONFIG_ENV_IS_IN_NAND 1
-+#define CONFIG_ENV_OFFSET 0x60000
-+#define CONFIG_ENV_OFFSET_REDUND 0x80000
-+#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
-+#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-+#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
-+ "root=/dev/mtdblock5 " \
-+ "mtdparts=at91_nand:128k(bootstrap)ro," \
-+ "256k(uboot)ro,128k(env1)ro," \
-+ "128k(env2)ro,2M(linux),-(root) " \
-+ "rw rootfstype=jffs2"
-+
-+#endif
-+
-+#define CONFIG_BAUDRATE 115200
-+#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
-+
-+#define CONFIG_SYS_PROMPT "U-Boot> "
-+#define CONFIG_SYS_CBSIZE 256
-+#define CONFIG_SYS_MAXARGS 16
-+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-+#define CONFIG_SYS_LONGHELP 1
-+#define CONFIG_CMDLINE_EDITING 1
-+
-+#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
-+/*
-+ * Size of malloc() pool
-+ */
-+#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
-+
-+#define CONFIG_STACKSIZE (32*1024) /* regular stack */
-+
-+#ifdef CONFIG_USE_IRQ
-+#error CONFIG_USE_IRQ not supported
-+#endif
-+
-+#endif
-Index: board/atmel/at91sam9g20ek/nand.c
-===================================================================
---- a/board/atmel/at91sam9g20ek/nand.c (.../u-boot-1.3.4) (revision 0)
-+++ b/board/atmel/at91sam9g20ek/nand.c (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1,78 @@
-+/*
-+ * (C) Copyright 2007-2008
-+ * Stelian Pop <stelian.pop@leadtechdesign.com>
-+ * Lead Tech Design <www.leadtechdesign.com>
-+ *
-+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <asm/arch/at91sam9260.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/at91_pio.h>
-+
-+#include <nand.h>
-+
-+/*
-+ * hardware specific access to control-lines
-+ */
-+#define MASK_ALE (1 << 21) /* our ALE is AD21 */
-+#define MASK_CLE (1 << 22) /* our CLE is AD22 */
-+
-+static void at91sam9g20ek_nand_hwcontrol(struct mtd_info *mtd,
-+ int cmd, unsigned int ctrl)
-+{
-+ struct nand_chip *this = mtd->priv;
-+
-+ if (ctrl & NAND_CTRL_CHANGE) {
-+ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-+ IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-+
-+ if (ctrl & NAND_CLE)
-+ IO_ADDR_W |= MASK_CLE;
-+ if (ctrl & NAND_ALE)
-+ IO_ADDR_W |= MASK_ALE;
-+
-+ at91_set_gpio_value(AT91_PIN_PC14, !(ctrl & NAND_NCE));
-+ this->IO_ADDR_W = (void *) IO_ADDR_W;
-+ }
-+
-+ if (cmd != NAND_CMD_NONE)
-+ writeb(cmd, this->IO_ADDR_W);
-+}
-+
-+static int at91sam9g20ek_nand_ready(struct mtd_info *mtd)
-+{
-+ return at91_get_gpio_value(AT91_PIN_PC13);
-+}
-+
-+int board_nand_init(struct nand_chip *nand)
-+{
-+ nand->ecc.mode = NAND_ECC_SOFT;
-+#ifdef CONFIG_SYS_NAND_DBW_16
-+ nand->options = NAND_BUSWIDTH_16;
-+#endif
-+ nand->cmd_ctrl = at91sam9g20ek_nand_hwcontrol;
-+ nand->dev_ready = at91sam9g20ek_nand_ready;
-+ nand->chip_delay = 20;
-+
-+ return 0;
-+}
-Index: board/atmel/at91sam9g20ek/at91sam9g20ek.c
-===================================================================
---- a/board/atmel/at91sam9g20ek/at91sam9g20ek.c (.../u-boot-1.3.4) (revision 0)
-+++ b/board/atmel/at91sam9g20ek/at91sam9g20ek.c (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1,250 @@
-+/*
-+ * (C) Copyright 2007-2008
-+ * Stelian Pop <stelian.pop@leadtechdesign.com>
-+ * Lead Tech Design <www.leadtechdesign.com>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <asm/arch/at91sam9260.h>
-+#include <asm/arch/at91sam9260_matrix.h>
-+#include <asm/arch/at91sam9_smc.h>
-+#include <asm/arch/at91_pmc.h>
-+#include <asm/arch/at91_rstc.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/io.h>
-+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-+#include <net.h>
-+#endif
-+#include <netdev.h>
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+/* ------------------------------------------------------------------------- */
-+/*
-+ * Miscelaneous platform dependent initialisations
-+ */
-+
-+static void at91sam9g20ek_serial_hw_init(void)
-+{
-+#ifdef CONFIG_USART0
-+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
-+ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
-+#endif
-+
-+#ifdef CONFIG_USART1
-+ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
-+ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
-+#endif
-+
-+#ifdef CONFIG_USART2
-+ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
-+ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
-+#endif
-+
-+#ifdef CONFIG_USART3 /* DBGU */
-+ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
-+ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-+#endif
-+}
-+
-+#ifdef CONFIG_CMD_NAND
-+static void at91sam9g20ek_nand_hw_init(void)
-+{
-+ unsigned long csa;
-+
-+ /* Enable CS3 */
-+ csa = at91_sys_read(AT91_MATRIX_EBICSA);
-+ at91_sys_write(AT91_MATRIX_EBICSA,
-+ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
-+
-+ /* Configure SMC CS3 for NAND/SmartMedia */
-+ at91_sys_write(AT91_SMC_SETUP(3),
-+ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
-+ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-+ at91_sys_write(AT91_SMC_PULSE(3),
-+ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
-+ AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(3));
-+ at91_sys_write(AT91_SMC_CYCLE(3),
-+ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
-+ at91_sys_write(AT91_SMC_MODE(3),
-+ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-+ AT91_SMC_EXNWMODE_DISABLE |
-+#ifdef CONFIG_SYS_NAND_DBW_16
-+ AT91_SMC_DBW_16 |
-+#else /* CONFIG_SYS_NAND_DBW_8 */
-+ AT91_SMC_DBW_8 |
-+#endif
-+ AT91_SMC_TDF_(3));
-+
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
-+
-+ /* Configure RDY/BSY */
-+ at91_set_gpio_input(AT91_PIN_PC13, 1);
-+
-+ /* Enable NandFlash */
-+ at91_set_gpio_output(AT91_PIN_PC14, 1);
-+}
-+#endif
-+
-+#ifdef CONFIG_HAS_DATAFLASH
-+static void at91sam9g20ek_spi_hw_init(void)
-+{
-+ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
-+ at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
-+
-+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
-+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
-+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
-+
-+ /* Enable clock */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
-+}
-+#endif
-+
-+#ifdef CONFIG_MACB
-+static void at91sam9g20ek_macb_hw_init(void)
-+{
-+ /* Enable clock */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
-+
-+ /*
-+ * Disable pull-up on:
-+ * RXDV (PA17) => PHY normal mode (not Test mode)
-+ * ERX0 (PA14) => PHY ADDR0
-+ * ERX1 (PA15) => PHY ADDR1
-+ * ERX2 (PA25) => PHY ADDR2
-+ * ERX3 (PA26) => PHY ADDR3
-+ * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
-+ *
-+ * PHY has internal pull-down
-+ */
-+ writel(pin_to_mask(AT91_PIN_PA14) |
-+ pin_to_mask(AT91_PIN_PA15) |
-+ pin_to_mask(AT91_PIN_PA17) |
-+ pin_to_mask(AT91_PIN_PA25) |
-+ pin_to_mask(AT91_PIN_PA26) |
-+ pin_to_mask(AT91_PIN_PA28),
-+ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
-+
-+ /* Need to reset PHY -> 500ms reset */
-+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
-+ AT91_RSTC_URSTEN);
-+
-+ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-+
-+ /* Wait for end hardware reset */
-+ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-+
-+ /* Restore NRST value */
-+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-+ (AT91_RSTC_ERSTL & (0x0 << 8)) |
-+ AT91_RSTC_URSTEN);
-+
-+ /* Re-enable pull-up */
-+ writel(pin_to_mask(AT91_PIN_PA14) |
-+ pin_to_mask(AT91_PIN_PA15) |
-+ pin_to_mask(AT91_PIN_PA17) |
-+ pin_to_mask(AT91_PIN_PA25) |
-+ pin_to_mask(AT91_PIN_PA26) |
-+ pin_to_mask(AT91_PIN_PA28),
-+ pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
-+
-+ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
-+ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
-+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
-+ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
-+ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
-+ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
-+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
-+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
-+ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
-+ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
-+
-+#ifndef CONFIG_RMII
-+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
-+ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
-+ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
-+ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
-+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
-+#if defined(CONFIG_AT91SAM9G20EK)
-+ /*
-+ * use PA10, PA11 for ETX2, ETX3.
-+ * PA23 and PA24 are for TWI EEPROM
-+ */
-+ at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
-+ at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
-+#else
-+ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
-+ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
-+#endif
-+ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
-+#endif
-+
-+}
-+#endif
-+
-+int board_init(void)
-+{
-+ /* Enable Ctrlc */
-+ console_init_f();
-+
-+ /* arch number of AT91SAM9G20EK-Board */
-+ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
-+ /* adress of boot parameters */
-+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-+
-+ at91sam9g20ek_serial_hw_init();
-+#ifdef CONFIG_CMD_NAND
-+ at91sam9g20ek_nand_hw_init();
-+#endif
-+#ifdef CONFIG_HAS_DATAFLASH
-+ at91sam9g20ek_spi_hw_init();
-+#endif
-+#ifdef CONFIG_MACB
-+ at91sam9g20ek_macb_hw_init();
-+#endif
-+
-+ return 0;
-+}
-+
-+int dram_init(void)
-+{
-+ gd->bd->bi_dram[0].start = PHYS_SDRAM;
-+ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-+ return 0;
-+}
-+
-+#ifdef CONFIG_RESET_PHY_R
-+void reset_phy(void)
-+{
-+#ifdef CONFIG_MACB
-+ /*
-+ * Initialize ethernet HW addr prior to starting Linux,
-+ * needed for nfsroot
-+ */
-+ eth_init(gd->bd);
-+#endif
-+}
-+#endif
-Index: board/atmel/at91sam9g20ek/led.c
-===================================================================
---- a/board/atmel/at91sam9g20ek/led.c (.../u-boot-1.3.4) (revision 0)
-+++ b/board/atmel/at91sam9g20ek/led.c (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1,64 @@
-+/*
-+ * (C) Copyright 2007-2008
-+ * Stelian Pop <stelian.pop@leadtechdesign.com>
-+ * Lead Tech Design <www.leadtechdesign.com>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <asm/arch/at91sam9260.h>
-+#include <asm/arch/at91_pmc.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/io.h>
-+
-+#define RED_LED AT91_PIN_PA9 /* this is the power led */
-+#define GREEN_LED AT91_PIN_PA6 /* this is the user led */
-+
-+void red_LED_on(void)
-+{
-+ at91_set_gpio_value(RED_LED, 1);
-+}
-+
-+void red_LED_off(void)
-+{
-+ at91_set_gpio_value(RED_LED, 0);
-+}
-+
-+void green_LED_on(void)
-+{
-+ at91_set_gpio_value(GREEN_LED, 0);
-+}
-+
-+void green_LED_off(void)
-+{
-+ at91_set_gpio_value(GREEN_LED, 1);
-+}
-+
-+void coloured_LED_init(void)
-+{
-+ /* Enable clock */
-+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
-+
-+ at91_set_gpio_output(RED_LED, 1);
-+ at91_set_gpio_output(GREEN_LED, 1);
-+
-+ at91_set_gpio_value(RED_LED, 0);
-+ at91_set_gpio_value(GREEN_LED, 1);
-+}
-Index: board/atmel/at91sam9g20ek/partition.c
-===================================================================
---- a/board/atmel/at91sam9g20ek/partition.c (.../u-boot-1.3.4) (revision 0)
-+++ b/board/atmel/at91sam9g20ek/partition.c (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1,40 @@
-+/*
-+ * (C) Copyright 2008
-+ * Ulf Samuelsson <ulf@atmel.com>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+#include <common.h>
-+#include <config.h>
-+#include <asm/hardware.h>
-+#include <dataflash.h>
-+
-+AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-+
-+struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-+ {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
-+ {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1}
-+};
-+
-+/*define the area offsets*/
-+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-+ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
-+ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-+ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
-+ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
-+ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
-+};
-Index: board/atmel/at91sam9g20ek/config.mk
-===================================================================
---- a/board/atmel/at91sam9g20ek/config.mk (.../u-boot-1.3.4) (revision 0)
-+++ b/board/atmel/at91sam9g20ek/config.mk (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1 @@
-+TEXT_BASE = 0x23f00000
-Index: board/atmel/at91sam9g20ek/Makefile
-===================================================================
---- a/board/atmel/at91sam9g20ek/Makefile (.../u-boot-1.3.4) (revision 0)
-+++ b/board/atmel/at91sam9g20ek/Makefile (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -0,0 +1,57 @@
-+#
-+# (C) Copyright 2003-2008
-+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+#
-+# (C) Copyright 2008
-+# Stelian Pop <stelian.pop@leadtechdesign.com>
-+# Lead Tech Design <www.leadtechdesign.com>
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB = $(obj)lib$(BOARD).a
-+
-+COBJS-y += at91sam9g20ek.o
-+COBJS-y += led.o
-+COBJS-y += partition.o
-+COBJS-$(CONFIG_CMD_NAND) += nand.o
-+
-+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-+OBJS := $(addprefix $(obj),$(COBJS-y))
-+SOBJS := $(addprefix $(obj),$(SOBJS))
-+
-+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
-+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-+
-+clean:
-+ rm -f $(SOBJS) $(OBJS)
-+
-+distclean: clean
-+ rm -f $(LIB) core *.bak $(obj).depend
-+
-+#########################################################################
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-Index: include/asm-arm/arch-at91/hardware.h
-===================================================================
---- a/include/asm-arm/arch-at91/hardware.h (.../u-boot-1.3.4) (revision 8417)
-+++ b/include/asm-arm/arch-at91/hardware.h (.../u-boot-1.3.4-exp) (revision 8417)
-@@ -18,7 +18,7 @@
-
- #if defined(CONFIG_AT91RM9200)
- #include <asm/arch/at91rm9200.h>
--#elif defined(CONFIG_AT91SAM9260)
-+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
- #include <asm/arch/at91sam9260.h>
- #define AT91_BASE_EMAC AT91SAM9260_BASE_EMAC
- #define AT91_BASE_SPI AT91SAM9260_BASE_SPI0
-diff -urN u-boot-2008.10-0rig/include/asm-arm/mach-types.h u-boot-2008.10/include/asm-arm/mach-types.h
---- u-boot-2008.10-0rig/include/asm-arm/mach-types.h 2008-10-18 21:30:31.000000000 +0200
-+++ u-boot-2008.10/include/asm-arm/mach-types.h 2008-12-28 23:40:55.000000000 +0100
-@@ -23998,6 +23998,18 @@
- # define machine_is_geneva() (0)
- #endif
-
-+#ifdef CONFIG_MACH_AT91SAM9G20EK
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_AT91SAM9G20EK
-+# endif
-+# define machine_is_at91sam9g20ek() (machine_arch_type == MACH_TYPE_AT91SAM9G20EK)
-+#else
-+# define machine_is_at91sam9g20ek() (0)
-+#endif
-+
- /*
- * These have not yet been registered
- */
-diff -urN u-boot-2008.10-0rig/board/atmel/at91sam9g20ek/at91sam9g20ek.c u-boot-2008.10/board/atmel/at91sam9g20ek/at91sam9g20ek.c
---- u-boot-2008.10-0rig/board/atmel/at91sam9g20ek/at91sam9g20ek.c 2008-12-28 14:09:52.000000000 +0100
-+++ u-boot-2008.10/board/atmel/at91sam9g20ek/at91sam9g20ek.c 2008-12-28 23:56:09.000000000 +0100
-@@ -248,3 +248,13 @@
- #endif
- }
- #endif
-+
-+int board_eth_init(bd_t *bis)
-+{
-+ int rc = 0;
-+#ifdef CONFIG_MACB
-+ rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
-+#endif
-+ return rc;
-+}
-+
+++ /dev/null
-diff -urN u-boot-2008.10-0rig/drivers/net/macb.c u-boot-2008.10/drivers/net/macb.c
---- u-boot-2008.10-0rig/drivers/net/macb.c 2008-10-18 21:30:31.000000000 +0200
-+++ u-boot-2008.10/drivers/net/macb.c 2008-12-28 23:44:11.000000000 +0100
-@@ -415,18 +415,16 @@
-
- /* choose RMII or MII mode. This depends on the board */
- #ifdef CONFIG_RMII
--#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-- defined(CONFIG_AT91SAM9263)
-- macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
--#else
-+#if defined(CONFIG_AVR32)
- macb_writel(macb, USRIO, 0);
--#endif
- #else
--#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-- defined(CONFIG_AT91SAM9263)
-- macb_writel(macb, USRIO, MACB_BIT(CLKEN));
-+ macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
-+#endif
- #else
-+#if defined(CONFIG_AVR32)
- macb_writel(macb, USRIO, MACB_BIT(MII));
-+#else
-+ macb_writel(macb, USRIO, MACB_BIT(CLKEN));
- #endif
- #endif /* CONFIG_RMII */
-
+++ /dev/null
-diff -urN u-boot-2008.10-0rig//tools/Makefile u-boot-2008.10/tools/Makefile
---- u-boot-2008.10-0rig//tools/Makefile 2008-12-31 17:51:29.000000000 +0100
-+++ u-boot-2008.10/tools/Makefile 2008-12-31 19:38:15.000000000 +0100
-@@ -37,6 +37,11 @@
- #OBJ_FILES += mpc86x_clk.o
- #endif
-
-+ifeq ($(VENDOR),atmel)
-+BINS+= raw-at91$(SFX) sx-at91$(SFX)
-+OBJS+= raw-at91.o sx-at91.o
-+endif
-+
- LIBFDT_OBJ_FILES = $(obj)fdt.o $(obj)fdt_ro.o $(obj)fdt_rw.o $(obj)fdt_strerror.o $(obj)fdt_wip.o
-
- LOGO_H = $(OBJTREE)/include/bmp_logo.h
-@@ -175,6 +180,14 @@
- $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
- $(STRIP) $@
-
-+$(obj)raw-at91$(SFX): $(obj)raw-at91.o
-+ $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
-+ $(STRIP) $@
-+
-+$(obj)sx-at91$(SFX): $(obj)sx-at91.o
-+ $(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
-+ $(STRIP) $@
-+
- $(obj)envcrc.o: $(src)envcrc.c
- $(CC) -g $(CFLAGS) -c -o $@ $<
-
-@@ -223,6 +236,12 @@
- $(obj)fdt_wip.o: $(obj)fdt_wip.c
- $(CC) -g $(FIT_CFLAGS) -c -o $@ $<
-
-+$(obj)sx-at91.o: $(src)sx-at91.c
-+ $(CC) -g $(CFLAGS) -c -o $@ $<
-+
-+$(obj)raw-at91.o: $(src)raw-at91.c
-+ $(CC) -g $(CFLAGS) -c -o $@ $<
-+
- subdirs:
- ifeq ($(TOOLSUBDIRS),)
- @:
-diff -urN u-boot-2008.10-0rig//tools/raw-at91.c u-boot-2008.10/tools/raw-at91.c
---- u-boot-2008.10-0rig//tools/raw-at91.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2008.10/tools/raw-at91.c 2008-12-31 19:26:23.000000000 +0100
-@@ -0,0 +1,225 @@
-+/*
-+ * xmodem-at91.c
-+ *
-+ * A simple program using xmodem/1kxmode upload file to at91rm9200 based board.
-+ * Created by (C) Copyright 2004
-+ * Linhang.Zhang, Jilin University of PR.China, linxing@jlu.edu.cn.
-+ *
-+ *************************************************************************************
-+ *
-+ * Modified 01-Feb-2005 (C)Copyright 2005
-+ * Marco Cavallini, www.KoanSoftware.com - ITALY, m.cavallini@koansoftware.com
-+ * - edited indentations and changed break usage in switch statement.
-+ * - added "\r" to printf
-+ *
-+ * - build with
-+ * gcc sx-at91.c -o sx-at91
-+ *
-+ * - Howto use this program with minicom/xminicom and AT91
-+ * start minicom or xminicom
-+ * edit Options / File transfer protocol,
-+ * add a name (for example J) like the following example
-+ *
-+ * | Name Program Name U/D FullScr IO-Red. Multi |
-+ * | A zmodem /usr/bin/sz -vv -b Y U N Y Y |
-+ * | B ymodem /usr/bin/sb -vv Y U N Y Y |
-+ * | C xmodem /usr/bin/sx -vv Y U N Y N |
-+ * | D zmodem /usr/bin/rz -vv -b -E N D N Y Y |
-+ * | E ymodem /usr/bin/rb -vv N D N Y Y |
-+ * | F xmodem /usr/bin/rx -vv Y D N Y N |
-+ * | G kermit /usr/bin/kermit -i -l %l -s Y U Y N N |
-+ * | H kermit /usr/bin/kermit -i -l %l -r N D Y N N |
-+ * | I ascii /usr/bin/ascii-xfr -dsv Y U N Y N |
-+ * | J at91 /home/koan/xmodem/xs-at91 Y U Y N N |
-+ * | K - |
-+ * | L - |
-+ *
-+ * save and use it selecting at91 protocol when you start an Xmodem upload to AT91
-+ *
-+ *************************************************************************************
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <stdio.h>
-+#include <stdlib.h>
-+#include <string.h>
-+#include <unistd.h>
-+#include <sys/types.h>
-+#include <sys/stat.h>
-+#include <fcntl.h>
-+#include <termios.h>
-+#include <errno.h>
-+#include <time.h>
-+
-+#define TRUE 1
-+#define FALSE 0
-+#define LINESIZE 1024
-+
-+/*********/
-+
-+#define SERIAL_DEVICE "/dev/ttyS0"
-+#define MYBAUDRATE B115200
-+
-+/***************SUB PROGRAM*******/
-+
-+int Initial_SerialPort(void)
-+{
-+ int fd;
-+ struct termios options;
-+
-+ fd = open( SERIAL_DEVICE , O_RDWR | O_NOCTTY | O_NDELAY );
-+ if ( fd == -1 )
-+ {
-+ /*open error!*/
-+ perror("Can't open serial port!");
-+ return -1;
-+ }
-+
-+ /*Get the current options for the port...*/
-+ tcgetattr(fd, &options);
-+
-+ /*Set the baud rates to BAUDRATE...*/
-+ cfsetispeed(&options,MYBAUDRATE);
-+ cfsetospeed(&options,MYBAUDRATE);
-+ tcsetattr(fd, TCSANOW, &options);
-+ if (0 != tcgetattr(fd, &options))
-+ {
-+ perror("SetupSerial 1");
-+ return -1;
-+ }
-+
-+ /*
-+ * 8bit Data,no partity,1 stop bit...
-+ */
-+ options.c_cflag &= ~PARENB;
-+ options.c_cflag &= ~CSTOPB;
-+ options.c_cflag &= ~CSIZE;
-+ options.c_cflag |= CS8;
-+ tcflush(fd,TCIFLUSH);
-+
-+ /***Choosing Raw Input*/
-+ options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
-+ options.c_oflag &= ~OPOST;
-+
-+ /*
-+ * Set the new options for the port...
-+ */
-+ if (0 != tcsetattr(fd, TCSANOW, &options))
-+ {
-+ perror("SetupSerial error");
-+ return -1 ;
-+ }
-+
-+ return fd ;
-+}
-+
-+/******************************/
-+void ClearReceiveBuffer(int fd)
-+{
-+ unsigned char tmp;
-+ while ((read(fd,&tmp,1))>0);
-+
-+ return;
-+}
-+unsigned char filebuf[ LINESIZE+2 ];
-+unsigned char outbuf[ LINESIZE+2 ];
-+FILE *datafile;
-+int fd;
-+
-+static unsigned int ChCnt=0;
-+static unsigned int ChIx;
-+unsigned char GetChar(unsigned char *ch)
-+/*
-+ * SUCCESS: Return TRUE
-+ * FAILURE: Return FALSE
-+ */
-+{
-+
-+ if(ChCnt == 0) {
-+ ChCnt = fread( filebuf, sizeof(char), LINESIZE, datafile);
-+ ChIx = 0;
-+ }
-+ if(ChCnt > 0) {
-+ *ch = filebuf[ChIx++];
-+ ChCnt--;
-+ return TRUE;
-+ } else {
-+ return FALSE; /* Reached End of File */
-+ }
-+}
-+
-+/********************************/
-+void delay()
-+{
-+}
-+
-+int main(int argc,char *argv[])
-+{
-+ char *data_file_name;
-+ int len;
-+ unsigned char c;
-+ int complete,i,sts;
-+
-+ printf("raw-at91 started...\r\n");
-+
-+ /* open serial port1 */
-+ if ( (fd = Initial_SerialPort()) == -1)
-+ return -1 ;
-+
-+ data_file_name = argv[1];
-+
-+ if((datafile=fopen(data_file_name,"rb"))==NULL)
-+ {
-+ perror ("Can't open file!");
-+ return -1 ;
-+ }
-+
-+ /*******************************/
-+
-+ complete = 0;
-+ /* ClearReceiveBuffer(fd); */
-+
-+ /* while((read(fd,&ack_id,1))<=0);*/
-+
-+ /* printf("%c\r\n",ack_id); */
-+ while(!complete)
-+ {
-+ for(i=0;i < LINESIZE; i++) { /* A line more than 1024 characters will have problems...*/
-+ if((sts = GetChar(&outbuf[i]))) {
-+ /* Sts = Success */
-+ if((c = outbuf[i]) == '\n') { /* Found end of Line - Start Processing*/
-+ outbuf[i+1] = '\0'; /* Terminate String*/
-+ break;
-+ }
-+ } else {
-+ /* Sts = Failure - End of File */
-+ outbuf[i] = '\n';
-+ outbuf[i+1] = '\0';
-+ complete = 1;
-+ }
-+ }
-+ printf("%s",outbuf); /* Inform user */
-+ len = strlen((char *)outbuf);
-+ write(fd,outbuf,strlen((char *)outbuf));
-+ for(i = 0; i < 500000000; i++ ) delay();
-+ while((read(fd,&c,1))<=0) putchar(c);
-+ printf(" ");
-+ }
-+ fclose(datafile);
-+ close(fd);
-+ return 0;
-+}
-diff -urN u-boot-2008.10-0rig//tools/sx-at91.c u-boot-2008.10/tools/sx-at91.c
---- u-boot-2008.10-0rig//tools/sx-at91.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2008.10/tools/sx-at91.c 2008-12-31 19:26:23.000000000 +0100
-@@ -0,0 +1,300 @@
-+/*
-+ * xmodem-at91.c
-+ *
-+ * A simple program using xmodem/1kxmode upload file to at91rm9200 based board.
-+ * Created by (C) Copyright 2004
-+ * Linhang.Zhang, Jilin University of PR.China, linxing@jlu.edu.cn.
-+ *
-+ *************************************************************************************
-+ *
-+ * Modified 01-Feb-2005 (C)Copyright 2005
-+ * Marco Cavallini, www.KoanSoftware.com - ITALY, m.cavallini@koansoftware.com
-+ * - edited indentations and changed break usage in switch statement.
-+ * - added "\r" to printf
-+ *
-+ * - build with
-+ * gcc sx-at91.c -o sx-at91
-+ *
-+ * - Howto use this program with minicom/xminicom and AT91
-+ * start minicom or xminicom
-+ * edit Options / File transfer protocol,
-+ * add a name (for example J) like the following example
-+ *
-+ * | Name Program Name U/D FullScr IO-Red. Multi |
-+ * | A zmodem /usr/bin/sz -vv -b Y U N Y Y |
-+ * | B ymodem /usr/bin/sb -vv Y U N Y Y |
-+ * | C xmodem /usr/bin/sx -vv Y U N Y N |
-+ * | D zmodem /usr/bin/rz -vv -b -E N D N Y Y |
-+ * | E ymodem /usr/bin/rb -vv N D N Y Y |
-+ * | F xmodem /usr/bin/rx -vv Y D N Y N |
-+ * | G kermit /usr/bin/kermit -i -l %l -s Y U Y N N |
-+ * | H kermit /usr/bin/kermit -i -l %l -r N D Y N N |
-+ * | I ascii /usr/bin/ascii-xfr -dsv Y U N Y N |
-+ * | J at91 /home/koan/xmodem/xs-at91 Y U Y N N |
-+ * | K - |
-+ * | L - |
-+ *
-+ * save and use it selecting at91 protocol when you start an Xmodem upload to AT91
-+ *
-+ *************************************************************************************
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <stdio.h>
-+#include <stdlib.h>
-+#include <unistd.h>
-+#include <sys/types.h>
-+#include <sys/stat.h>
-+#include <fcntl.h>
-+#include <termios.h>
-+#include <errno.h>
-+#include <time.h>
-+
-+/*
-+Xmodem Frame form: <SOH><blk #><255-blk #><--128 data bytes--><CRC hi><CRC lo>
-+*/
-+
-+#define XMODEM_SOH 0x01
-+#define XMODEM_STX 0x02
-+#define XMODEM_EOT 0x04
-+#define XMODEM_ACK 0x06
-+#define XMODEM_NAK 0x15
-+#define XMODEM_CRC_CHR 'C'
-+#define XMODEM_CRC_SIZE 2 /* Crc_High Byte + Crc_Low Byte */
-+#define XMODEM_FRAME_ID_SIZE 2 /* Frame_Id + 255-Frame_Id */
-+#define XMODEM_DATA_SIZE_SOH 128 /* for Xmodem protocol */
-+#define XMODEM_DATA_SIZE_STX 1024 /* for 1K xmodem protocol */
-+#define USE_1K_XMODEM 0 /* 1 for use 1k_xmodem 0 for xmodem */
-+
-+#if (USE_1K_XMODEM)
-+ #define XMODEM_DATA_SIZE XMODEM_DATA_SIZE_STX
-+ #define XMODEM_HEAD XMODEM_STX
-+#else
-+ #define XMODEM_DATA_SIZE XMODEM_DATA_SIZE_SOH
-+ #define XMODEM_HEAD XMODEM_SOH
-+#endif
-+/*********/
-+
-+#define SERIAL_DEVICE "/dev/ttyS0"
-+#define MYBAUDRATE B115200
-+
-+/***************SUB PROGRAM*******/
-+unsigned short GetCrc16 ( char *ptr, unsigned short count )
-+{
-+ unsigned short crc, i;
-+
-+ crc = 0;
-+ while(count--)
-+ {
-+ crc = crc ^ (int) *ptr++ << 8;
-+
-+ for(i = 0; i < 8; i++)
-+ {
-+ if(crc & 0x8000)
-+ crc = crc << 1 ^ 0x1021;
-+ else
-+ crc = crc << 1;
-+ }
-+ }
-+
-+ return (crc & 0xFFFF);
-+}
-+
-+/*******************************/
-+int Initial_SerialPort(void)
-+{
-+ int fd;
-+ struct termios options;
-+
-+ fd = open( SERIAL_DEVICE , O_RDWR | O_NOCTTY | O_NDELAY );
-+ if ( fd == -1 )
-+ {
-+ /*open error!*/
-+ perror("Can't open serial port!");
-+ return -1;
-+ }
-+
-+ /*Get the current options for the port...*/
-+ tcgetattr(fd, &options);
-+
-+ /*Set the baud rates to BAUDRATE...*/
-+ cfsetispeed(&options,MYBAUDRATE);
-+ cfsetospeed(&options,MYBAUDRATE);
-+ tcsetattr(fd, TCSANOW, &options);
-+ if (0 != tcgetattr(fd, &options))
-+ {
-+ perror("SetupSerial 1");
-+ return -1;
-+ }
-+
-+ /*
-+ * 8bit Data,no partity,1 stop bit...
-+ */
-+ options.c_cflag &= ~PARENB;
-+ options.c_cflag &= ~CSTOPB;
-+ options.c_cflag &= ~CSIZE;
-+ options.c_cflag |= CS8;
-+ tcflush(fd,TCIFLUSH);
-+
-+ /***Choosing Raw Input*/
-+ options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
-+ options.c_oflag &= ~OPOST;
-+
-+ /*
-+ * Set the new options for the port...
-+ */
-+ if (0 != tcsetattr(fd, TCSANOW, &options))
-+ {
-+ perror("SetupSerial error");
-+ return -1 ;
-+ }
-+
-+ return fd ;
-+}
-+
-+/******************************/
-+void ClearReceiveBuffer(int fd)
-+{
-+ unsigned char tmp;
-+ while ((read(fd,&tmp,1))>0);
-+
-+ return;
-+}
-+
-+/********************************/
-+int main(int argc,char *argv[])
-+{
-+ int fd;
-+ char *data_file_name;
-+ char packet_data[ XMODEM_DATA_SIZE ];
-+ char frame_data[ XMODEM_DATA_SIZE + XMODEM_CRC_SIZE + XMODEM_FRAME_ID_SIZE + 1 ];
-+ FILE *datafile;
-+ int complete,retry_num,pack_counter,read_number,write_number,i;
-+ unsigned short crc_value;
-+ unsigned char ack_id;
-+
-+ printf("sx-at91 started...\r\n");
-+
-+ /* open serial port1 */
-+ if ( (fd = Initial_SerialPort()) == -1)
-+ return -1 ;
-+
-+ data_file_name = argv[1];
-+
-+ if((datafile=fopen(data_file_name,"rb"))==NULL)
-+ {
-+ perror ("Can't open file!");
-+ return -1 ;
-+ }
-+
-+ /*******************************/
-+
-+ pack_counter = 0;
-+ complete = 0;
-+ retry_num = 0;
-+ ClearReceiveBuffer(fd);
-+
-+ while((read(fd,&ack_id,1))<=0);
-+
-+ printf("%c\r\n",ack_id);
-+ ack_id=XMODEM_ACK;
-+ while(!complete)
-+ {
-+ switch(ack_id)
-+ {
-+ case XMODEM_ACK:
-+ retry_num = 0;
-+ pack_counter++;
-+ read_number = fread( packet_data, sizeof(char), XMODEM_DATA_SIZE, datafile);
-+ if(read_number>0)
-+ {
-+ if(read_number<XMODEM_DATA_SIZE_SOH)
-+ {
-+
-+ printf("Start filling the last frame!\r\n");
-+ for(;read_number<XMODEM_DATA_SIZE;read_number++)
-+ packet_data[read_number] = 0x00;
-+ }
-+ frame_data[0] = XMODEM_HEAD;
-+ frame_data[1] = (char)pack_counter;
-+ frame_data[2] = (char)(255-frame_data[1]);
-+
-+ for(i=0;i<XMODEM_DATA_SIZE;i++)
-+ frame_data[i+3]=packet_data[i];
-+
-+ crc_value = GetCrc16(packet_data,XMODEM_DATA_SIZE);
-+ frame_data[XMODEM_DATA_SIZE_SOH+3]=(unsigned char)(crc_value >> 8);
-+ frame_data[XMODEM_DATA_SIZE_SOH+4]=(unsigned char)(crc_value);
-+ write_number = write( fd, frame_data, XMODEM_DATA_SIZE_SOH + 5);
-+ printf("waiting for ACK,%d,%d,...",pack_counter,write_number);
-+ while((read(fd,&ack_id,1))<=0);
-+
-+ if(ack_id == XMODEM_ACK)
-+ printf("Ok!\r\n");
-+ else
-+ printf("Error!\r\n");
-+ }
-+ else
-+ {
-+ ack_id = XMODEM_EOT;
-+ complete = 1;
-+ printf("Waiting for complete ACK ...");
-+
-+ while(ack_id != XMODEM_ACK)
-+ {
-+ ack_id = XMODEM_EOT;
-+ write_number=write(fd,&ack_id,1);
-+ while((read(fd,&ack_id,1))<=0);
-+ }
-+ printf("OK\r\n");
-+
-+ printf("Sending file complete\r\n");
-+ }
-+ break;
-+
-+ case XMODEM_NAK:
-+ if( retry_num++ > 10)
-+ {
-+ printf("Retry too many times,Quit!\r\n");
-+ complete = 1;
-+ }
-+ else
-+ {
-+ write_number = write(fd,frame_data,XMODEM_DATA_SIZE + 5);
-+ printf("Retry for ACK,%d,%d...",pack_counter,write_number);
-+ while((read(fd,&ack_id,1))<=0);
-+
-+ if( ack_id == XMODEM_ACK )
-+ printf("OK\r\n");
-+ else
-+ printf("Error!\r\n");
-+ }
-+ break;
-+
-+ default:
-+ printf("Fatal Error!\r\n");
-+ complete = 1;
-+ break;
-+ }
-+
-+ }
-+
-+ fclose(datafile);
-+ close(fd);
-+
-+ return 0;
-+}
+++ /dev/null
-diff -urN u-boot-2008.10-0rig//Makefile u-boot-2008.10/Makefile
---- u-boot-2008.10-0rig//Makefile 2008-12-31 18:11:18.000000000 +0100
-+++ u-boot-2008.10/Makefile 2008-12-31 18:39:58.000000000 +0100
-@@ -20,6 +20,7 @@
- # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- # MA 02111-1307 USA
- #
-+BUILD_DATE= $(shell date +%F)
-
- VERSION = 2008
- PATCHLEVEL = 10
-@@ -294,6 +295,22 @@
- ALL += $(obj)u-boot.ldr
- endif
-
-+ifneq ($(BOARDNAME),)
-+BINARY := $(BOARDNAME)-u-boot-$(U_BOOT_VERSION)-$(BUILD_DATE)
-+BINARY_BIN := $(obj)$(BINARY).bin
-+BINARY_GZ := $(obj)$(BINARY).gz
-+ALL += $(BINARY_BIN)
-+ALL += $(BINARY_GZ)
-+else
-+BINARY := u-boot
-+BINARY_BIN := $(obj)$(BINARY).bin
-+BINARY_GZ := $(obj)$(BINARY).gz
-+endif
-+
-+ifeq ($(DESTDIR),)
-+DESTDIR=binaries
-+endif
-+
- all: $(ALL)
-
- $(obj)u-boot.hex: $(obj)u-boot
-@@ -302,9 +319,20 @@
- $(obj)u-boot.srec: $(obj)u-boot
- $(OBJCOPY) -O srec $< $@
-
--$(obj)u-boot.bin: $(obj)u-boot
-+$(BINARY_BIN): $(obj)u-boot
- $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-
-+$(BINARY_GZ): $(BINARY_BIN)
-+ gzip -c $(BINARY_BIN) > $(BINARY_GZ)
-+
-+install: all
-+ -install -d $(DESTDIR)
-+ install $(BINARY_BIN) $(DESTDIR)
-+
-+tftp: install
-+ cp $(BINARY_GZ) $(TFTPBOOT)/$(BINARY).gz
-+ cp $(BINARY_BIN) $(TFTPBOOT)/$(BINARY).bin
-+
- $(obj)u-boot.ldr: $(obj)u-boot
- $(LDR) -T $(CONFIG_BFIN_CPU) -f -c $@ $< $(LDR_FLAGS)
-
-@@ -3295,6 +3324,7 @@
- -o -name '*.srec' -o -name '*.bin' -o -name u-boot.img \) \
- -print0 \
- | xargs -0 rm -f
-+ @rm -f $(obj)u-boot-*.gz
- @rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
- $(obj)cscope.* $(obj)*.*~
- @rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
+++ /dev/null
-diff -urN u-boot-2009.01-0rig//common/cmd_factory.c u-boot-2009.01/common/cmd_factory.c
---- u-boot-2009.01-0rig//common/cmd_factory.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/common/cmd_factory.c 2009-01-02 19:32:07.000000000 +0100
-@@ -0,0 +1,308 @@
-+/*
-+ * (C) Copyright 2000
-+ * Ulf Samuelsson <ulf.samuelsson@atmelcom>.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+/*
-+ * Boot support
-+ */
-+#include <config.h>
-+#include <common.h>
-+#include <command.h>
-+#include <dataflash.h>
-+
-+/*
-+ *
-+ * The typical use of this file, is to update config.h
-+ * from an external build system
-+ *
-+ */
-+
-+
-+/*
-+ * Macros to transform values
-+ * into environment strings.
-+ */
-+#define XMK_STR(x) #x
-+#define MK_STR(x) XMK_STR(x)
-+
-+void setargs(void);
-+
-+int do_factory_defaults (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-+{
-+#if defined(CONFIG_ETHADDR)
-+ setenv("ethaddr", MK_STR(CONFIG_ETHADDR));
-+#endif
-+#if defined(CONFIG_ETH1ADDR)
-+ setenv("eth1addr", MK_STR(CONFIG_ETH1ADDR));
-+#endif
-+#if defined(CONFIG_HOSTNAME)
-+ setenv("hostname", MK_STR(CONFIG_HOSTNAME));
-+#endif
-+#if defined(CONFIG_IPADDR)
-+ setenv("ipaddr", MK_STR(CONFIG_IPADDR));
-+#endif
-+#if defined(CONFIG_SERVERIP)
-+ setenv("serverip", MK_STR(CONFIG_SERVERIP));
-+#endif
-+#if defined(CONFIG_GATEWAY)
-+ setenv("gatewayip", MK_STR(CONFIG_GATEWAY));
-+#endif
-+#if defined(CONFIG_NETMASK)
-+ setenv("netmask", MK_STR(CONFIG_NETMASK));
-+#endif
-+#if defined(KERNEL_START)
-+ setenv("kernel", MK_STR(KERNEL_START));
-+#endif
-+#if defined(KERNEL_LOCATION)
-+ setenv("OS", MK_STR(KERNEL_LOCATION));
-+#endif
-+#if defined(FILESYSTEM_START)
-+ setenv("ramdisk", MK_STR(FILESYSTEM_START));
-+ setenv("initrd", MK_STR(FILESYSTEM_START)","MK_STR(FILESYSTEM_SIZE));
-+#endif
-+#if defined(FILESYSTEM_LOCATION)
-+ setenv("FS", MK_STR(FS_LOCATION));
-+#endif
-+#if defined(END_OF_FLASH)
-+ setenv("endflash", MK_STR(END_OF_FLASH));
-+#endif
-+#if defined(CONFIG_LOAD_SCRIPTS)
-+ /* By updating the "fs-date" environment variable and running "fs"
-+ You set "rd-1" and "rd-2"
-+ */
-+ setenv("rd-1", "rootfs.arm-"MK_STR(DATE)".ext2");
-+ setenv("rd-2", "rootfs.arm-"MK_STR(DATE)".jffs2");
-+ setenv("rd-3", "rootfs.arm-linux.ext2");
-+ setenv("rd-4", "rootfs.arm-linux.jffs2");
-+ setenv("ver", "1");
-+
-+ setenv("config", "tftp ${ramdisk} autoscript.${hostname} ; autoscr ${ramdisk} ");
-+
-+#if defined(KERNEL_VERSION)
-+ setenv("kernel-version",MK_STR(KERNEL_VERSION));
-+#endif
-+#if defined(DATE)
-+ setenv("kernel-date", MK_STR(DATE));
-+ setenv("fs-date", MK_STR(DATE));
-+ setenv("rd", "rootfs.arm-"MK_STR(DATE)".ext2");
-+#endif
-+#if defined(KERNEL_VERSION)
-+ setenv("linux", MK_STR(BOARD_NAME)"-linux-"MK_STR(KERNEL_VERSION)"-"MK_STR(DATE)".gz");
-+#endif
-+ setenv("get-ramdisk", "tftp ${ramdisk} ${rd}; setenv rd-size ${filesize}");
-+ setenv("store-ramdisk", "cp.b ${ramdisk} ${FS} ${rd-size}");
-+ setenv("load-ramdisk", "cp.b ${FS} ${ramdisk} ${rd-size}");
-+ setenv("flash-ramdisk", "run get-ramdisk; run store-ramdisk");
-+
-+ setenv("get-kernel", "tftp ${kernel} ${linux}; setenv kernel-size ${filesize}");
-+ setenv("store-kernel", "cp.b ${kernel} ${OS} ${kernel-size}; saveenv");
-+ setenv("load-kernel", "cp.b ${OS} ${kernel} ${kernel-size}; saveenv");
-+ setenv("flash-kernel", "run get-kernel; run store-kernel");
-+
-+ setenv("get", "run get-kernel ; run get-ramdisk");
-+ setenv("flash", "run flash-kernel ; run flash-ramdisk ; saveenv");
-+ setenv("load", "run load-kernel ; run load-ramdisk");
-+
-+ setenv("bootcmd", "run load ; bootm "MK_STR(KERNEL_START));
-+
-+ setenv("fstype", "ram");
-+ setenv("flashfs", "/dev/mtdblock2");
-+ setenv("ramfs", "/dev/ram");
-+
-+ setenv("rootfstype", "jffs2");
-+ setenv("access", "rw");
-+ setenv("ramdisk_size", "15360");
-+ setenv("console", "ttyS0,115200");
-+
-+
-+#if defined(MEMORY_SIZE)
-+ setenv("mem", MK_STR(MEMORY_SIZE));
-+#else
-+ setenv("mem", "32M"); /* Cautious default */
-+#endif
-+
-+ setenv("update", "os; fs; setargs");
-+ setenv("cmpk", "run flash-kernel; cp.b ${OS} ${ramdisk} ${kernel-size}; cmp ${kernel} ${ramdisk} ${kernel-size}");
-+#endif /* CONFIG_LOAD_SCRIPTS */
-+#if defined(CONFIG_AT91RM9200)
-+ setenv("machid24", "0x0fb");
-+ setenv("machid26", "0x2c1");
-+ setenv("machid", "0x2c1");
-+ setenv("k24", "setenv machid ${machid24}; os");
-+ setenv("k26", "setenv machid ${machid26}; os");
-+#endif
-+ AT91F_DataflashSetEnv ();
-+#if defined(CONFIG_LOAD_SCRIPTS)
-+ setargs();
-+#endif
-+ return (saveenv() ? 1 : 0);
-+}
-+
-+
-+
-+U_BOOT_CMD(
-+ factory, 1, 1, do_factory_defaults,
-+ "factory\t- Create a default environment\n",
-+ "\n"
-+);
-+
-+#if defined(CONFIG_LOAD_SCRIPTS)
-+void setargs(void)
-+{
-+ char cmd[512];
-+ char fstype[512];
-+
-+ sprintf(fstype,getenv("fstype"));
-+ if((fstype[0] != 'f') && (fstype[0] != 'r')) {
-+ fstype[0] = 'r';
-+ }
-+
-+ if(fstype[0] == 'f') {
-+ sprintf(cmd,"root=%s rootfstype=%s ip=%s:%s:%s:%s console=%s,mem=%s",
-+ getenv("flashfs"),
-+ getenv("rootfstype"),
-+ getenv("ipaddr"),
-+ getenv("serverip"),
-+ getenv("gatewayip"),
-+ getenv("netmask"),
-+ getenv("console"),
-+ getenv("mem")
-+ );
-+ cmd[511] = '\0';
-+ printf("len=%d: %s\n",strlen(cmd),cmd);
-+ if(strlen(cmd) > 500) {
-+ printf("Error: Environment too large during 'setargs'\n");
-+ } else {
-+ setenv("bootargs",cmd);
-+ setenv("bootcmd", "run load-kernel ; bootm 21000000");
-+ }
-+ } else if(fstype[0] == 'r') {
-+ sprintf(cmd,"root=%s %s initrd=%s ramdisk_size=%s ip=%s:%s:%s:%s console=%s,mem=%s",
-+ getenv("ramfs"),
-+ getenv("access"),
-+ getenv("initrd"),
-+ getenv("ramdisk_size"),
-+ getenv("ipaddr"),
-+ getenv("serverip"),
-+ getenv("gatewayip"),
-+ getenv("netmask"),
-+ getenv("console"),
-+ getenv("mem")
-+ );
-+ printf("len=%d: %s\n",strlen(cmd),cmd);
-+ cmd[511] = '\0';
-+ if(strlen(cmd) > 500) {
-+ printf("Error: Environment too large during 'setargs'\n");
-+ } else {
-+ setenv("bootargs",cmd);
-+ setenv("bootcmd", "run load ; bootm 21000000");
-+ }
-+ } else {
-+ setenv("bootargs","no args");
-+ }
-+}
-+
-+int do_setargs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-+{
-+ setargs();
-+ return 0;
-+}
-+
-+U_BOOT_CMD(
-+ setargs, 1, 1, do_setargs,
-+ "setargs\t- Create a bootargs from:"
-+ "fstype=flash: (${flash} ${access} ${initrd} ${ramdisk_size}) "
-+ "fstype=ram: (${ram} ${access} ${initrd} ${ramdisk_size}) "
-+ "${ipaddr} ${serverip} ${gatewayip} ${netmask} "
-+ "${console} ${mem}\n"
-+ , "\n"
-+);
-+
-+int do_os (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-+{
-+ char *kchip;
-+ char *kdate;
-+ char *kver;
-+ char cmd[512];
-+ kchip = getenv("hostname");
-+ kdate = getenv("kernel-date");
-+ kver = getenv("kernel-version");
-+ if((strlen(kdate) + strlen(kver) + 32) > 500) {
-+ printf("Error: Environment too large during 'os': ");
-+ printf("len=%d\n", strlen(kdate) + strlen(kver) + 32);
-+ } else if(kver != NULL) {
-+ if(kdate != NULL) {
-+ sprintf(cmd,"%s-linux-%s-%s.gz",kchip,kver,kdate);
-+ } else {
-+ sprintf(cmd,"%s-linux-%s.gz",kchip,kver);
-+ }
-+ printf("Setting kernel to %s\n",cmd);
-+ setenv("linux",cmd);
-+ return 0;
-+ }
-+ return 1;
-+}
-+
-+U_BOOT_CMD(
-+ os, 1, 1, do_os,
-+ "os\t- Select linux version ${hostname}-linux-${kernel-name}-${kernel-date}\n"
-+ , "\n"
-+);
-+
-+
-+int do_fs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-+{
-+ char *ver;
-+ char *fsdate;
-+ char *hostname;
-+ char cmd[512];
-+ fsdate = getenv("fs-date");
-+ hostname = getenv("hostname");
-+
-+ if(fsdate != NULL) {
-+ sprintf(cmd,"rootfs.arm-%s.ext2",fsdate);
-+ setenv("rd-1",cmd);
-+ sprintf(cmd,"rootfs.arm-%s.jffs2",fsdate);
-+ setenv("rd-2",cmd);
-+ }
-+ ver = getenv("ver"); /* Find out which version we are using*/
-+ if(cmd==NULL) {
-+ setenv("ver","1");
-+ }
-+ ver = getenv("ver"); /* Find out which version we are using*/
-+ sprintf(cmd,"rd-%s",ver); /* create rd${ver}*/
-+ ver=getenv(cmd);
-+ sprintf(cmd,"%s",ver);
-+ printf("Setting ramdisk to %s\n",cmd);
-+ setenv("rd",cmd);
-+ return 0;
-+}
-+
-+
-+U_BOOT_CMD(
-+ fs, 1, 1, do_fs,
-+ "fs\t- Select ramdisk version == rd-${ver}\n"
-+ , "\n"
-+);
-+#endif /* #if defined(CONFIG_LOAD_SCRIPTS) */
-+
-+
-diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
---- u-boot-2009.01-0rig//common/Makefile 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/common/Makefile 2009-01-02 19:17:16.000000000 +0100
-@@ -84,6 +84,7 @@
- COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
- COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o
- COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o
-+COBJS-$(CONFIG_CMD_FACTORY) += cmd_factory.o
- COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o
- COBJS-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o
- COBJS-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
+++ /dev/null
-diff -urN u-boot-2009.01-0rig//common/cmd_led.c u-boot-2009.01/common/cmd_led.c
---- u-boot-2009.01-0rig//common/cmd_led.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/common/cmd_led.c 2009-01-03 23:39:57.000000000 +0100
-@@ -0,0 +1,84 @@
-+/*
-+ * (C) Copyright 2008
-+ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+/*
-+ * This file provides a shell like 'test' function to return
-+ * true/false from an integer or string compare of two memory
-+ * locations or a location and a scalar/literal.
-+ * A few parts were lifted from bash 'test' command
-+ */
-+
-+#include <common.h>
-+#include <config.h>
-+#include <command.h>
-+#include <coloured_led.h>
-+
-+int do_led ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
-+{
-+ int led;
-+ /* Validate arguments */
-+ if ((argc != 3)){
-+ printf("Usage:\n%s\n", cmdtp->usage);
-+ return 1;
-+ }
-+ if (strcmp(argv[1], "1") == 0) {
-+ led = (1 << 0);
-+ } else if (strcmp(argv[1], "2") == 0) {
-+ led = (1 << 1);
-+ } else if (strcmp(argv[1], "3") == 0) {
-+ led = (1 << 2);
-+ } else if (strcmp(argv[1], "green") == 0) {
-+ led = (1 << 0);
-+ } else if (strcmp(argv[1], "yellow") == 0) {
-+ led = (1 << 1);
-+ } else if (strcmp(argv[1], "red") == 0) {
-+ led = (1 << 2);
-+ } else if (strcmp(argv[1], "all") == 0) {
-+ led = 7;
-+ } else {
-+ printf ("Usage:\n%s\n", cmdtp->usage);
-+ return 1;
-+ }
-+
-+ if (strcmp(argv[2], "off") == 0) {
-+ if(led & 1) green_LED_off();
-+ if(led & 2) yellow_LED_off();
-+ if(led & 4) red_LED_off();
-+ } else if (strcmp(argv[2], "on") == 0) {
-+ if(led & 1) green_LED_on();
-+ if(led & 2) yellow_LED_on();
-+ if(led & 4) red_LED_on();
-+ } else {
-+ printf ("Usage:\n%s\n", cmdtp->usage);
-+ return 1;
-+ }
-+
-+ return 0;
-+}
-+
-+U_BOOT_CMD(
-+ led, 3, 1, do_led,
-+ "led\t- [1|2|3|green|yellow|red|all] [on|off]\n",
-+ "led [1|2|3|green|yellow|red|all] [on|off] sets /clears led 1,2,3\n"
-+);
-+
-diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
---- u-boot-2009.01-0rig//common/Makefile 2009-01-02 21:18:24.000000000 +0100
-+++ u-boot-2009.01/common/Makefile 2009-01-03 23:41:53.000000000 +0100
-@@ -99,6 +99,7 @@
- COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o
- COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o
- COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o
-+COBJS-$(CONFIG_CMD_LED) += cmd_led.o
- COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o
- COBJS-y += cmd_load.o
- COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
-diff -urN u-boot-2009.01-0rig//include/coloured_led.h u-boot-2009.01/include/coloured_led.h
---- u-boot-2009.01-0rig//include/coloured_led.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/include/coloured_led.h 2009-01-03 23:39:19.000000000 +0100
-@@ -0,0 +1,62 @@
-+/*
-+ * (C) Copyright 2008
-+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+/*
-+ * The purpose of this code is to signal the operational status of a
-+ * target which usually boots over the network; while running in
-+ * PCBoot, a status LED is blinking. As soon as a valid BOOTP reply
-+ * message has been received, the LED is turned off. The Linux
-+ * kernel, once it is running, will start blinking the LED again,
-+ * with another frequency.
-+ */
-+
-+#ifndef _COLOURED_LED_H_
-+#define _COLOURED_LED_H_
-+
-+#ifdef CONFIG_COLOURED_LED
-+
-+/*
-+ * Coloured LEDs API
-+ */
-+#ifndef __ASSEMBLY__
-+extern void coloured_LED_init (void);
-+extern void red_LED_on(void);
-+extern void red_LED_off(void);
-+extern void green_LED_on(void);
-+extern void green_LED_off(void);
-+extern void yellow_LED_on(void);
-+extern void yellow_LED_off(void);
-+#else
-+ .extern LED_init
-+ .extern red_LED_on
-+ .extern red_LED_off
-+ .extern yellow_LED_on
-+ .extern yellow_LED_off
-+ .extern green_LED_on
-+ .extern green_LED_off
-+#endif
-+
-+#endif /* CONFIG_COLOURED_LED */
-+
-+#endif /* _STATUS_COLOURED_H_ */
-+
-diff -urN u-boot-2009.01-0rig//include/status_led.h u-boot-2009.01/include/status_led.h
---- u-boot-2009.01-0rig//include/status_led.h 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/include/status_led.h 2009-01-03 23:44:40.000000000 +0100
-@@ -383,27 +383,6 @@
- # include <asm/status_led.h>
- #endif
-
--/*
-- * Coloured LEDs API
-- */
--#ifndef __ASSEMBLY__
--extern void coloured_LED_init (void);
--extern void red_LED_on(void);
--extern void red_LED_off(void);
--extern void green_LED_on(void);
--extern void green_LED_off(void);
--extern void yellow_LED_on(void);
--extern void yellow_LED_off(void);
--#else
-- .extern LED_init
-- .extern red_LED_on
-- .extern red_LED_off
-- .extern yellow_LED_on
-- .extern yellow_LED_off
-- .extern green_LED_on
-- .extern green_LED_off
--#endif
--
- #endif /* CONFIG_STATUS_LED */
-
- #endif /* _STATUS_LED_H_ */
+++ /dev/null
-diff -urN u-boot-2009.01-0rig//common/cmd_mux.c u-boot-2009.01/common/cmd_mux.c
---- u-boot-2009.01-0rig//common/cmd_mux.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/common/cmd_mux.c 2009-01-04 00:17:19.000000000 +0100
-@@ -0,0 +1,78 @@
-+/*
-+ * (C) Copyright 2008
-+ * Ulf Samuelsson <ulf.samuelsson@atmel.com>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <command.h>
-+#if (defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF))
-+
-+#include <asm/arch/AT91RM9200.h>
-+#include <dataflash.h>
-+#include <at45.h>
-+
-+
-+static int mmc_nspi (const char *s)
-+{
-+ if (strcmp(s, "mmc") == 0) {
-+ return (1);
-+ } else if (strcmp(s, "spi") == 0) {
-+ return (0);
-+ }
-+ return (-1);
-+}
-+
-+int do_mux ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-+{
-+ switch (argc) {
-+ case 2: /* on / off */
-+ switch (mmc_nspi(argv[1])) {
-+#if 0 /* prevented by varargs handling; FALLTROUGH is harmless, too */
-+ default: printf ("Usage:\n%s\n", cmdtp->usage);
-+ return;
-+#endif
-+ case 0: AT91F_SelectSPI ();
-+ break;
-+ case 1: AT91F_SelectMMC ();
-+ break;
-+ }
-+ /* FALL TROUGH */
-+ case 1: /* get status */
-+ printf ("Mux is configured to be %s\n",
-+ AT91F_GetMuxStatus() ? "MMC" : "SPI");
-+ return 0;
-+ default:
-+ printf ("Usage:\n%s\n", cmdtp->usage);
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+
-+U_BOOT_CMD(
-+ mux, 2, 1, do_mux,
-+ "mux\t- enable or disable MMC or SPI\n",
-+ "[mmc, spi]\n"
-+ " - enable or disable MMC or SPI\n"
-+);
-+
-+#endif /* CONFIG_CMD_MUX */
-+
-diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
---- u-boot-2009.01-0rig//common/Makefile 2009-01-04 00:10:28.000000000 +0100
-+++ u-boot-2009.01/common/Makefile 2009-01-04 00:20:39.000000000 +0100
-@@ -112,6 +112,7 @@
- COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o
- COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
- COBJS-$(CONFIG_MP) += cmd_mp.o
-+COBJS-$(CONFIG_CMD_AT91_SPIMUX) += cmd_mux.o
- COBJS-y += cmd_nand.o
- COBJS-$(CONFIG_CMD_NET) += cmd_net.o
- COBJS-$(CONFIG_CMD_ONENAND) += cmd_onenand.o
+++ /dev/null
-diff -urN u-boot-2009.01-0rig//common/cmd_ethinit.c u-boot-2009.01/common/cmd_ethinit.c
---- u-boot-2009.01-0rig//common/cmd_ethinit.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2009.01/common/cmd_ethinit.c 2009-01-04 00:28:39.000000000 +0100
-@@ -0,0 +1,62 @@
-+/*
-+ * (C) Copyright 2000
-+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+/*
-+ * Boot support
-+ */
-+#include <common.h>
-+#include <command.h>
-+#include <net.h>
-+#ifdef CONFIG_CMD_ETHINIT
-+extern int eth_init (bd_t * bd);
-+
-+static void delay(void)
-+{
-+}
-+/*
-+ * This command allows you to delay booting until you have a
-+ * valid Ethernet connection.
-+ * Neccessary if you want to NFS mount a rootfs etc.
-+ * When both this target and the NFS server
-+ * are powered on at the same time, then the NFS
-+ * server can take a long time to boot.
-+ */
-+int do_ethinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-+{
-+ int i;
-+ DECLARE_GLOBAL_DATA_PTR;
-+ while(eth_init (gd->bd) == 0) {
-+ for(i = 0; i < 10000000; i ++) {
-+ delay();
-+ }
-+ }
-+ return 0;
-+}
-+
-+U_BOOT_CMD(
-+ ethinit, 1, 1, do_ethinit,
-+ "ethinit\t- Initialize Ethernet controller\n",
-+ "\n"
-+);
-+
-+#endif /* CONFIG_CMD_ETHINIT */
-diff -urN u-boot-2009.01-0rig//common/Makefile u-boot-2009.01/common/Makefile
---- u-boot-2009.01-0rig//common/Makefile 2009-01-04 00:22:06.000000000 +0100
-+++ u-boot-2009.01/common/Makefile 2009-01-04 00:29:46.000000000 +0100
-@@ -83,6 +83,7 @@
- COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
- COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
- COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o
-+COBJS-$(CONFIG_CMD_ETHINIT) += cmd_ethinit.o
- COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o
- COBJS-$(CONFIG_CMD_FACTORY) += cmd_factory.o
- COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o
+++ /dev/null
-diff -urN u-boot-2009.01-0rig//include/configs/at91cap9adk.h u-boot-2009.01/include/configs/at91cap9adk.h
---- u-boot-2009.01-0rig//include/configs/at91cap9adk.h 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91cap9adk.h 2009-01-04 00:43:58.000000000 +0100
-@@ -69,7 +69,9 @@
- #define CONFIG_ATMEL_LCD 1
- #define CONFIG_ATMEL_LCD_BGR555 1
- #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
--
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
- #define CONFIG_BOOTDELAY 3
-
- /*
-diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200df.h u-boot-2009.01/include/configs/at91rm9200df.h
---- u-boot-2009.01-0rig//include/configs/at91rm9200df.h 2009-01-02 17:37:43.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200df.h 2009-01-04 00:43:33.000000000 +0100
-@@ -123,6 +123,9 @@
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_MII
- #define CONFIG_CMD_NAND
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
- #define CONFIG_CMD_AT91_SPIMUX
- #define CONFIG_CMD_ETHINIT
-
-diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200dk_df.h u-boot-2009.01/include/configs/at91rm9200dk_df.h
---- u-boot-2009.01-0rig//include/configs/at91rm9200dk_df.h 2009-01-02 10:03:11.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200dk_df.h 2009-01-04 00:42:52.000000000 +0100
-@@ -122,7 +122,11 @@
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_MII
- #define CONFIG_CMD_NAND
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
- #define CONFIG_CMD_AT91_SPIMUX
-+#define CONFIG_CMD_ETHINIT
-
- #define CONFIG_NAND_LEGACY
-
-diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200dk.h u-boot-2009.01/include/configs/at91rm9200dk.h
---- u-boot-2009.01-0rig//include/configs/at91rm9200dk.h 2009-01-02 10:03:11.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200dk.h 2009-01-04 00:43:15.000000000 +0100
-@@ -120,7 +120,11 @@
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_MII
- #define CONFIG_CMD_NAND
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
- #define CONFIG_CMD_AT91_SPIMUX
-+#define CONFIG_CMD_ETHINIT
-
- #define CONFIG_NAND_LEGACY
-
-diff -urN u-boot-2009.01-0rig//include/configs/at91rm9200ek.h u-boot-2009.01/include/configs/at91rm9200ek.h
---- u-boot-2009.01-0rig//include/configs/at91rm9200ek.h 2009-01-02 17:37:43.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91rm9200ek.h 2009-01-04 00:42:35.000000000 +0100
-@@ -121,9 +121,11 @@
- #define CONFIG_CMD_DHCP
- #define CONFIG_CMD_MII
- #define CONFIG_CMD_NAND
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
- #define CONFIG_CMD_AT91_SPIMUX
- #define CONFIG_CMD_ETHINIT
--
- #define CONFIG_NAND_LEGACY
-
- #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-diff -urN u-boot-2009.01-0rig//include/configs/at91sam9260ek.h u-boot-2009.01/include/configs/at91sam9260ek.h
---- u-boot-2009.01-0rig//include/configs/at91sam9260ek.h 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91sam9260ek.h 2009-01-04 00:41:56.000000000 +0100
-@@ -74,10 +74,13 @@
- #include <config_cmd_default.h>
- #undef CONFIG_CMD_BDI
- #undef CONFIG_CMD_IMI
--#undef CONFIG_CMD_AUTOSCRIPT
-+#define CONFIG_CMD_AUTOSCRIPT
- #undef CONFIG_CMD_FPGA
- #undef CONFIG_CMD_LOADS
- #undef CONFIG_CMD_IMLS
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
-
- #define CONFIG_CMD_PING 1
- #define CONFIG_CMD_DHCP 1
-diff -urN u-boot-2009.01-0rig//include/configs/at91sam9261ek.h u-boot-2009.01/include/configs/at91sam9261ek.h
---- u-boot-2009.01-0rig//include/configs/at91sam9261ek.h 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91sam9261ek.h 2009-01-04 00:44:11.000000000 +0100
-@@ -68,6 +68,9 @@
- #define CONFIG_ATMEL_LCD 1
- #define CONFIG_ATMEL_LCD_BGR555 1
- #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
-
- #define CONFIG_BOOTDELAY 3
-
-diff -urN u-boot-2009.01-0rig//include/configs/at91sam9263ek.h u-boot-2009.01/include/configs/at91sam9263ek.h
---- u-boot-2009.01-0rig//include/configs/at91sam9263ek.h 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91sam9263ek.h 2009-01-04 00:44:34.000000000 +0100
-@@ -69,6 +69,9 @@
- #define CONFIG_ATMEL_LCD 1
- #define CONFIG_ATMEL_LCD_BGR555 1
- #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
-
- #define CONFIG_BOOTDELAY 3
-
-diff -urN u-boot-2009.01-0rig//include/configs/at91sam9rlek.h u-boot-2009.01/include/configs/at91sam9rlek.h
---- u-boot-2009.01-0rig//include/configs/at91sam9rlek.h 2008-12-16 23:48:27.000000000 +0100
-+++ u-boot-2009.01/include/configs/at91sam9rlek.h 2009-01-04 00:44:54.000000000 +0100
-@@ -68,6 +68,9 @@
- #define CONFIG_ATMEL_LCD 1
- #define CONFIG_ATMEL_LCD_RGB565 1
- #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-+#define CONFIG_CMD_FACTORY
-+#define CONFIG_CMD_LED
-+#define CONFIG_COLOURED_LED
-
- #define CONFIG_BOOTDELAY 3
-
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