S/390: Support vector alignment hints

This patch adds the vector alignment hints to the vector load and
store instructions as documented in the IBM z14 Principles of
Operations manual:

http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr011.pdf

opcodes/ChangeLog:

2018-10-23  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-opc.txt: Add vector load/store instructions with additional
	alignment parameter.

gas/ChangeLog:

2018-10-23  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/tc-s390.c (md_gather_operands): Fix for optional operands
	following memory addresses.
	* testsuite/gas/s390/zarch-arch12.d: Add regexp checks for new
	instruction variants.
	* testsuite/gas/s390/zarch-arch12.s: Emit new instruction
	variants.

diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index b53e33af3db7b1098f0baf2c184002cd90876207..5a485e0dac0a9c1b6f844563a75a2f364b78ff21 100644 (file)
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -1510,6 +1510,21 @@ md_gather_operands (char *str,
          if (*str++ != ')')
            as_bad (_("syntax error; missing ')' after base register"));
          skip_optional = 0;
+
+         if ((opcode->flags & (S390_INSTR_FLAG_OPTPARM
+                               | S390_INSTR_FLAG_OPTPARM2))
+             && opindex_ptr[1] != '\0'
+             && opindex_ptr[2] == '\0'
+             && *str == '\0')
+           continue;
+
+         if ((opcode->flags & S390_INSTR_FLAG_OPTPARM2)
+             && opindex_ptr[1] != '\0'
+             && opindex_ptr[2] != '\0'
+             && opindex_ptr[3] == '\0'
+             && *str == '\0')
+           continue;
+
          /* If there is a next operand it must be separated by a comma.  */
          if (opindex_ptr[1] != '\0')
            {

diff --git a/gas/testsuite/gas/s390/zarch-arch12.d b/gas/testsuite/gas/s390/zarch-arch12.d
index 0a6796b560febaf048429302516fd1ac5ad417aa..ac016482b5a9a9da180c6b2e250388811028be9c 100644 (file)
--- a/gas/testsuite/gas/s390/zarch-arch12.d
+++ b/gas/testsuite/gas/s390/zarch-arch12.d
@@ -201,3 +201,11 @@ Disassembly of section .text:
 .*:    b9 3c 00 69 [    ]*prno %r6,%r9
 .*:    b9 a1 00 69 [    ]*tpei %r6,%r9
 .*:    b9 ac 00 69 [    ]*irbm %r6,%r9
+.*:    e7 f6 9f a0 00 06 [      ]*vl   %v15,4000\(%r6,%r9\)
+.*:    e7 f6 9f a0 d0 06 [      ]*vl   %v15,4000\(%r6,%r9\),13
+.*:    e7 f1 6f a0 04 36 [      ]*vlm  %v15,%v17,4000\(%r6\)
+.*:    e7 f1 6f a0 d4 36 [      ]*vlm  %v15,%v17,4000\(%r6\),13
+.*:    e7 f6 9f a0 00 0e [      ]*vst  %v15,4000\(%r6,%r9\)
+.*:    e7 f6 9f a0 d0 0e [      ]*vst  %v15,4000\(%r6,%r9\),13
+.*:    e7 f1 6f a0 04 3e [      ]*vstm %v15,%v17,4000\(%r6\)
+.*:    e7 f1 6f a0 d4 3e [      ]*vstm %v15,%v17,4000\(%r6\),13

diff --git a/gas/testsuite/gas/s390/zarch-arch12.s b/gas/testsuite/gas/s390/zarch-arch12.s
index 1dd7434d18c2d681bd0c39ac8f6a1ef64aed40b2..51b1690e42afe40636fc7f99fad07c2b59a7d209 100644 (file)
--- a/gas/testsuite/gas/s390/zarch-arch12.s
+++ b/gas/testsuite/gas/s390/zarch-arch12.s
@@ -195,3 +195,11 @@ foo:
        prno    %r6,%r9
        tpei    %r6,%r9
        irbm    %r6,%r9
+       vl      %v15,4000(%r6,%r9)
+       vl      %v15,4000(%r6,%r9),13
+       vlm     %v15,%v17,4000(%r6)
+       vlm     %v15,%v17,4000(%r6),13
+       vst     %v15,4000(%r6,%r9)
+       vst     %v15,4000(%r6,%r9),13
+       vstm    %v15,%v17,4000(%r6)
+       vstm    %v15,%v17,4000(%r6),13

diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index d8a9cce1e27bd58c84b0833909156752f2b54ef4..c782aa9e82f9882ddbceee342513cd5410472f58 100644 (file)
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1880,3 +1880,10 @@ b929 kma RRF_R0RR "cipher message with galois counter mode" arch12 zarch
 b93c prno RRE_RR "perform pseudorandom number operation" arch12 zarch
 b9a1 tpei RRE_RR "test pending external interruption" arch12 zarch
 b9ac irbm RRE_RR "insert reference bits multiple" arch12 zarch
+
+# Aligned vector store hints
+
+e70000000006 vl VRX_VRRDU "vector memory load" arch12 zarch optparm
+e70000000036 vlm VRS_VVRDU "vector load multiple" arch12 zarch optparm
+e7000000000e vst VRX_VRRDU "vector store" arch12 zarch optparm
+e7000000003e vstm VRS_VVRDU "vector store multiple" arch12 zarch optparm