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radeonsi: revert a wrong DB bug workaround for VI
author
Marek Olšák
<marek.olsak@amd.com>
Mon, 10 Aug 2015 14:23:53 +0000
(16:23 +0200)
committer
Marek Olšák
<marek.olsak@amd.com>
Fri, 14 Aug 2015 13:02:31 +0000
(15:02 +0200)
The bug was misunderstood. Besides that, the bug affects a DB feature we
don't use yet.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_state.c
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diff --git
a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 21689e71b8b38c9b49613b0cc65b20383dfc0baa..c923ea7e1541d7e90b8afd3bde1270f2383ab673 100644
(file)
--- a/
src/gallium/drivers/radeonsi/si_state.c
+++ b/
src/gallium/drivers/radeonsi/si_state.c
@@
-1994,10
+1994,6
@@
static void si_init_depth_surface(struct si_context *sctx,
db_htile_surface = 0;
}
- /* Bug workaround. */
- if (sctx->b.chip_class >= VI)
- s_info |= S_028044_TILE_STENCIL_DISABLE(1);
-
assert(levelinfo->nblk_x % 8 == 0 && levelinfo->nblk_y % 8 == 0);
surf->db_depth_view = S_028008_SLICE_START(surf->base.u.tex.first_layer) |