alter rv_sr to take bitwidth arg

diff --git a/riscv/insns/sraw.h b/riscv/insns/sraw.h
index ee7c69c51d973cc4f978a0fd323be8bc559b7da2..99d3e21f5669a3de0e68339f873df253675b7fd6 100644 (file)
--- a/riscv/insns/sraw.h
+++ b/riscv/insns/sraw.h
@@ -1,2 +1,2 @@
 require_rv64;
-WRITE_RD(sext32(rv_sr(sv_reg_int32(RS1), rv_and(RS2, sv_reg_t(0x1FU)))));
+WRITE_RD(sext32(rv_sr(sv_reg_int32(RS1), RS2, 0x1FU)));

diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index 5b410c55698c4aa8c7d881050eafa6cd0cb5bf73..7b799f128266a966aa76975aaa7ad48896ea40cb 100644 (file)
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -552,14 +552,20 @@ sv_reg_t sv_proc_t::rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs)
 }
 
 sv_reg_t sv_proc_t::rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs)
+{
+    return rv_sr(lhs, rhs, xlen);
+}
+
+sv_reg_t sv_proc_t::rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs,
+                          unsigned int dflt_bitwidth)
 {
     uint8_t bitwidth = _insn->src_bitwidth;
     uint64_t vlhs = 0;
     uint64_t vrhs = 0;
     if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) {
-        return lhs >> rhs;
+        return lhs >> rv_and(rhs, sv_reg_t(dflt_bitwidth-1U));
     }
-    uint64_t result = vlhs >> vrhs;
+    uint64_t result = vlhs >> (vrhs & (bitwidth-1));
     return rv_int_op_finish(lhs, rhs, result, bitwidth);
 }
 

diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index 5f6bf6fb71c5535b3f61534ec709d3daaa95bcc9..a39ba85bb05cb198ef3791fa6dfa90e6b8360c24 100644 (file)
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -135,6 +135,8 @@ public:
     sv_reg_t rv_xor(sv_reg_t const & lhs, sv_reg_t const & rhs);
     sv_reg_t rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs);
     sv_reg_t rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs);
+    sv_reg_t rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs,
+                   unsigned int dflt_bitwidth);
     bool rv_lt(sv_reg_t const & lhs, sv_reg_t const & rhs);
     bool rv_lt(sv_sreg_t const & lhs, sv_sreg_t const & rhs);
     bool rv_gt(sv_reg_t const & lhs, sv_reg_t const & rhs);