add i2s libre-riscv bug link
authorLuke Leighton <lkcl@lkcl.net>
Sun, 25 Feb 2018 10:17:13 +0000 (10:17 +0000)
committerLuke Leighton <lkcl@lkcl.net>
Sun, 25 Feb 2018 10:17:13 +0000 (10:17 +0000)
shakti/m_class.mdwn
shakti/m_class/I2S.mdwn [new file with mode: 0644]

index e380475d7c41ca65c56278b35fc56396b568c665..eff8d8740011fd9a058b5b85a12981073b4fea1e 100644 (file)
@@ -199,7 +199,7 @@ TBD
 * 8080-style AT/XT/ATI MCU Bus Interface, with multiple (8x CS#) lines
 * 3x PWM-capable GPIO
 * 32x EINT-cable GPIO with full edge-triggered and low/high IRQ capability
-* 1x I2S audio with 4-wire output and 1-wire input.
+* 1x [[I2S]] audio with 4-wire output and 1-wire input.
 * 3x USB2 (ULPI for reduced pincount) each capable of USB-OTG support
 * DDR3/DDR3L/LPDDR3 32-bit-wide memory controller
 
@@ -217,7 +217,7 @@ At its own page [[I2C]]
 
 ## I2S
 
-<https://github.com/skristiansson/i2s>
+At its own page [[I2S]]
 
 ## FlexBus
 
diff --git a/shakti/m_class/I2S.mdwn b/shakti/m_class/I2S.mdwn
new file mode 100644 (file)
index 0000000..36a68f3
--- /dev/null
@@ -0,0 +1,5 @@
+# I2S
+
+* <http://bugs.libre-riscv.org/show_bug.cgi?id=3>
+* <https://github.com/skristiansson/i2s>
+