gallium/radeon: add r600_resource::vram_usage and gart_usage
authorMarek Olšák <marek.olsak@amd.com>
Fri, 29 Jul 2016 13:48:18 +0000 (15:48 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 6 Aug 2016 11:56:14 +0000 (13:56 +0200)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeon/r600_buffer_common.c
src/gallium/drivers/radeon/r600_pipe_common.c
src/gallium/drivers/radeon/r600_pipe_common.h

index 9c7eac57970e7383be303279606fce11795e9b08..4480293245f015cdfaf7932631a9335bd77386de 100644 (file)
@@ -197,6 +197,16 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
        util_range_set_empty(&res->valid_buffer_range);
        res->TC_L2_dirty = false;
 
+       /* Set expected VRAM and GART usage for the buffer. */
+       res->vram_usage = 0;
+       res->gart_usage = 0;
+
+       if (res->domains & RADEON_DOMAIN_VRAM)
+               res->vram_usage = size;
+       else if (res->domains & RADEON_DOMAIN_GTT)
+               res->gart_usage = size;
+
+       /* Print debug information. */
        if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) {
                fprintf(stderr, "VM start=0x%"PRIX64"  end=0x%"PRIX64" | Buffer %"PRIu64" bytes\n",
                        res->gpu_address, res->gpu_address + res->buf->size,
index 6f4fc98271b42134941552e089716bf8c759af2d..8fae74d7add197cefab931bbb68ea03c6e712fc0 100644 (file)
@@ -144,16 +144,12 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
        uint64_t vram = 0, gtt = 0;
 
        if (dst) {
-               if (dst->domains & RADEON_DOMAIN_VRAM)
-                       vram += dst->buf->size;
-               else if (dst->domains & RADEON_DOMAIN_GTT)
-                       gtt += dst->buf->size;
+               vram += dst->vram_usage;
+               gtt += dst->gart_usage;
        }
        if (src) {
-               if (src->domains & RADEON_DOMAIN_VRAM)
-                       vram += src->buf->size;
-               else if (src->domains & RADEON_DOMAIN_GTT)
-                       gtt += src->buf->size;
+               vram += src->vram_usage;
+               gtt += src->gart_usage;
        }
 
        /* Flush the GFX IB if DMA depends on it. */
@@ -530,10 +526,8 @@ void r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resour
         * In practice this gave very good estimate (+/- 10% of the target
         * memory limit).
         */
-       if (rr->domains & RADEON_DOMAIN_VRAM)
-               rctx->vram += rr->buf->size;
-       else if (rr->domains & RADEON_DOMAIN_GTT)
-               rctx->gtt += rr->buf->size;
+       rctx->vram += rr->vram_usage;
+       rctx->gtt += rr->gart_usage;
 }
 
 /*
index 3bebd00a56ab11f65bc5225ad9a591deed493ade..1f665d47dcf375fbbf086e09cb6456db398f5e35 100644 (file)
@@ -170,6 +170,9 @@ struct r600_resource {
        /* Winsys objects. */
        struct pb_buffer                *buf;
        uint64_t                        gpu_address;
+       /* Memory usage if the buffer placement is optimal. */
+       uint64_t                        vram_usage;
+       uint64_t                        gart_usage;
 
        /* Resource state. */
        enum radeon_bo_domain           domains;