(no commit message)

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 9354957b8c0f13df33492c093548d059c0cb5d5f..1d56ac9a4f107ae33e89cd2c237a45b07855bcd0 100644 (file)
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -20,8 +20,7 @@ basis may be found to be no different from RISC Scalar equivalents.
 
 The resource savings from Vector LD/ST are significant and stem from
 the fact that one single instruction can trigger a dozen (or in some
-microarchitectures such as Cray or NEC SX Aurora) hundreds of element
-level Memory accesses.
+microarchitectures such as Cray or NEC SX Aurora) hundreds of element-level Memory accesses.
 
 Additionally, and simply: if the Arithmetic side of an ISA supports
 Vector Operations, then in order to keep the ALUs 100% occupied the