+2020-01-24 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
+ gcn_fp_compare_operator.
+ (vec_cmpu<mode>di): Use gcn_compare_operator.
+ (vec_cmp<u>v64qidi): Use gcn_compare_operator.
+ (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
+ (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
+ (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
+ (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
+ (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
+ (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
+ gcn_fp_compare_operator.
+ (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
+ gcn_fp_compare_operator.
+ (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
+ gcn_fp_compare_operator.
+ (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
+ gcn_fp_compare_operator.
+
2020-01-24 Maciej W. Rozycki <macro@wdc.com>
* doc/install.texi (Cross-Compiler-Specific Options): Document
(define_insn "vec_cmp<mode>di"
[(set (match_operand:DI 0 "register_operand" "=cV,cV, e, e,Sg,Sg")
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_fp_compare_operator"
[(match_operand:VCMP_MODE 2 "gcn_alu_operand"
"vSv, B,vSv, B, v,vA")
(match_operand:VCMP_MODE 3 "gcn_vop3_operand"
(define_expand "vec_cmpu<mode>di"
[(match_operand:DI 0 "register_operand")
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_compare_operator"
[(match_operand:VCMP_MODE_INT 2 "gcn_alu_operand")
(match_operand:VCMP_MODE_INT 3 "gcn_vop3_operand")])]
""
; There's no instruction for 8-bit vector comparison, so we need to extend.
(define_expand "vec_cmp<u>v64qidi"
[(match_operand:DI 0 "register_operand")
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_compare_operator"
[(any_extend:V64SI (match_operand:V64QI 2 "gcn_alu_operand"))
(any_extend:V64SI (match_operand:V64QI 3 "gcn_vop3_operand"))])]
"can_create_pseudo_p ()"
(define_insn "vec_cmp<mode>di_exec"
[(set (match_operand:DI 0 "register_operand" "=cV,cV, e, e,Sg,Sg")
(and:DI
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_fp_compare_operator"
[(match_operand:VCMP_MODE 2 "gcn_alu_operand"
"vSv, B,vSv, B, v,vA")
(match_operand:VCMP_MODE 3 "gcn_vop3_operand"
(define_expand "vec_cmpu<mode>di_exec"
[(match_operand:DI 0 "register_operand")
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_compare_operator"
[(match_operand:VCMP_MODE_INT 2 "gcn_alu_operand")
(match_operand:VCMP_MODE_INT 3 "gcn_vop3_operand")])
(match_operand:DI 4 "gcn_exec_reg_operand")]
(define_expand "vec_cmp<u>v64qidi_exec"
[(match_operand:DI 0 "register_operand")
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_compare_operator"
[(any_extend:V64SI (match_operand:V64QI 2 "gcn_alu_operand"))
(any_extend:V64SI (match_operand:V64QI 3 "gcn_vop3_operand"))])
(match_operand:DI 4 "gcn_exec_reg_operand")]
(define_insn "vec_cmp<mode>di_dup"
[(set (match_operand:DI 0 "register_operand" "=cV,cV, e,e,Sg")
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_fp_compare_operator"
[(vec_duplicate:VCMP_MODE
(match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
" Sv, B,Sv,B, A"))
(define_insn "vec_cmp<mode>di_dup_exec"
[(set (match_operand:DI 0 "register_operand" "=cV,cV, e,e,Sg")
(and:DI
- (match_operator 1 "comparison_operator"
+ (match_operator 1 "gcn_fp_compare_operator"
[(vec_duplicate:VCMP_MODE
(match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
" Sv, B,Sv,B, A"))
[(match_operand:VEC_ALLREG_MODE 0 "register_operand")
(match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
(match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
- (match_operator 3 "comparison_operator"
+ (match_operator 3 "gcn_fp_compare_operator"
[(match_operand:VEC_ALLREG_ALT 4 "gcn_alu_operand")
(match_operand:VEC_ALLREG_ALT 5 "gcn_vop3_operand")])]
""
[(match_operand:VEC_ALLREG_MODE 0 "register_operand")
(match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
(match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
- (match_operator 3 "comparison_operator"
+ (match_operator 3 "gcn_fp_compare_operator"
[(match_operand:VEC_ALLREG_ALT 4 "gcn_alu_operand")
(match_operand:VEC_ALLREG_ALT 5 "gcn_vop3_operand")])
(match_operand:DI 6 "gcn_exec_reg_operand" "e")]
[(match_operand:VEC_ALLREG_MODE 0 "register_operand")
(match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
(match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
- (match_operator 3 "comparison_operator"
+ (match_operator 3 "gcn_fp_compare_operator"
[(match_operand:VEC_ALLREG_INT_MODE 4 "gcn_alu_operand")
(match_operand:VEC_ALLREG_INT_MODE 5 "gcn_vop3_operand")])]
""
[(match_operand:VEC_ALLREG_MODE 0 "register_operand")
(match_operand:VEC_ALLREG_MODE 1 "gcn_vop3_operand")
(match_operand:VEC_ALLREG_MODE 2 "gcn_alu_operand")
- (match_operator 3 "comparison_operator"
+ (match_operator 3 "gcn_fp_compare_operator"
[(match_operand:VEC_ALLREG_INT_MODE 4 "gcn_alu_operand")
(match_operand:VEC_ALLREG_INT_MODE 5 "gcn_vop3_operand")])
(match_operand:DI 6 "gcn_exec_reg_operand" "e")]