Added support for non-standard """ macro bodies

diff --git a/README b/README
index 0c8425f379d31d82969faf31d9bbbc070e012526..1ecaa07df4f3be264ce16c9377eba7fc72e4b793 100644 (file)
--- a/README
+++ b/README
@@ -281,6 +281,15 @@ Verilog Attributes and non-standard features
   to simply declare a module port as 'input' or 'output' in the module
   body.
 
+- When defining a macro with `define, all text between tripple double quotes
+  is interpreted as macro body, even if it contains unescaped newlines. The
+  tripple double quotes are removed from the macro body. For example:
+
+      `define MY_MACRO(a, b) """
+         assign a = 23;
+         assign b = 42;
+      """
+
 - Sized constants (the syntax <size>'s?[bodh]<value>) support constant
   expressions as <size>. If the expresion is not a simple identifier, it
   must be put in parentheses. Examples: WIDTH'd42, (4+2)'b101010

diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc
index 8efd4d7c32945078cc3560b668426ccebd70f9a5..7935fbc34c8d5beec58b2d5e5ef38dcaee8c82df 100644 (file)
--- a/frontends/verilog/preproc.cc
+++ b/frontends/verilog/preproc.cc
@@ -131,6 +131,12 @@ static std::string next_token(bool pass_newline = false)
                                        token += ch;
                        }
                }
+               if (token == "\"\"" && (ch = next_char()) != 0) {
+                       if (ch == '"')
+                               token += ch;
+                       else
+                               return_char(ch);
+               }
        }
        else if (ch == '/')
        {
@@ -311,12 +317,17 @@ std::string frontend_verilog_preproc(FILE *f, std::string filename, const std::m
                        std::map<std::string, int> args;
                        skip_spaces();
                        name = next_token(true);
+                       bool here_doc_mode = false;
                        int newline_count = 0;
                        int state = 0;
                        if (skip_spaces() != "")
                                state = 3;
                        while (!tok.empty()) {
                                tok = next_token();
+                               if (tok == "\"\"\"") {
+                                       here_doc_mode = !here_doc_mode;
+                                       continue;
+                               }
                                if (state == 0 && tok == "(") {
                                        state = 1;
                                        skip_spaces();
@@ -332,7 +343,7 @@ std::string frontend_verilog_preproc(FILE *f, std::string filename, const std::m
                                } else {
                                        if (state != 2)
                                                state = 3;
-                                       if (tok == "\n") {
+                                       if (tok == "\n" && !here_doc_mode) {
                                                return_char('\n');
                                                break;
                                        }