* gdbarch.sh (NUM_REGS): Replace by gdbarch_num_regs.
* i386-tdep.c (i386_dbx_reg_to_regnum)
(i386_svr4_reg_to_regnum): Likewise.
* inf-ptrace.c (inf_ptrace_fetch_registers)
(inf_ptrace_store_registers): Likewise.
* corelow.c (get_core_registers): Likewise.
* i386-linux-nat.c (supply_gregset, fill_gregset)
(i386_linux_fetch_inferior_registers)
(i386_linux_store_inferior_registers): Likewise.
* remote.c (init_remote_state,packet_reg_from_regnum)
(packet_reg_from_pnum,process_g_packet,remote_fetch_registers)
(remote_prepare_to_store,store_registers_using_G)
(remote_store_registers,remote_arch_state): Likewise.
* tracepoint.c (encode_actions): Likewise.
* mi/mi-main.c (mi_cmd_data_list_register_names)
(mi_cmd_data_list_changed_registers,mi_cmd_data_list_register_values)
(mi_cmd_data_write_register_values): Likewise.
* tui/tui-regs.c (tui_show_register_group)
(tui_show_register_group): Likewise.
* xtensa-tdep.h (FP_ALIAS): Likewise.
* xtensa-tdep.c (xtensa_register_name,xtensa_register_type)
(xtensa_reg_to_regnum,xtensa_pseudo_register_read)
(xtensa_pseudo_register_write,xtensa_register_reggroup_p): Likewise.
* win32-nat.c (do_win32_fetch_inferior_registers)
(do_win32_store_inferior_registers,fetch_elf_core_registers
* user-regs.h: Likewise (comment).
* user-regs.c (user_reg, user_reg_map_name_to_regnum): Likewise.
* trad-frame.c (trad_frame_alloc_saved_regs): Likewise.
* target-descriptions.h: Likewise (comment).
* target-descriptions.c (tdesc_use_registers): Likewise (comment).
* target.c (debug_print_register): Likewise.
* stack.c (frame_info): Likewise.
* stabsread.c (define_symbol): Likewise.
* sh64-tdep.c (sh64_do_pseudo_register,sh64_print_register)
(sh64_media_print_registers_info)
(sh64_compact_print_registers_info): Likewise.
* rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
* rs6000-nat.c (fetch_register,store_register): Likewise.
* remote-sim.c (one2one_register_sim_regno,gdbsim_fetch_register)
(gdbsim_fetch_register,gdbsim_store_register): Likewise.
* remote-mips.c (mips_fetch_registers,mips_store_registers): Likewise.
* remote-m32r-sdi.c (m32r_fetch_registers)
(m32r_store_registers): Likewise.
* reggroups.c (default_register_reggroup_p): Likewise.
* regcache.c (init_regcache_descr,register_size,regcache,regcache_save)
(regcache_restore,regcache_dump): Likewise.
* monitor.c (monitor_fetch_registers,monitor_store_registers): Likewise.
* mips-tdep.c (mips_xfer_register,mips_register_name)
(mips_register_reggroup_p,mips_pseudo_register_read)
(mips_pseudo_register_write,mips_convert_register_p,mips_register_type)
(mips_unwind_pc,mips_unwind_sp,mips_unwind_dummy_id,set_reg_offset)
(mips16_scan_prologue,mips_insn16_frame_cache,reset_saved_regs)
(mips32_scan_prologue,mips_insn32_frame_cache,read_next_frame_reg)
(mips_n32n64_return_value,mips_o32_return_value,mips_o64_return_value)
(print_gp_register_row,mips_print_registers_info)
(mips_stab_reg_to_regnum,mips_dwarf_dwarf2_ecoff_reg_to_regnum)
(mips_register_sim_regno): Likewise.
* mips-linux-tdep.c (mips_linux_o32_sigframe_init)
(mips_linux_n32n64_sigframe_init): Likewise.
* mips-linux-nat.c (mips_linux_register_addr)
(mips64_linux_register_addr): Likewise.
* findvar.c (value_of_register): Likewise.
* infcmd.c (default_print_registers_info,registers_info)
(print_vector_info,print_float_info): Likewise.
* mips64obsd-tdep.c (mips64obsd_sigframe_init): Likewise.
* inf-child.c (inf_child_fetch_inferior_registers): Likewise.
* m68k-tdep.c (m68k_dwarf_reg_to_regnum): Likewise.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache(: Likewise.
* m32r-tdep.c (m32r_frame_unwind_cache): Likewise.
* ia64-linux-nat.c (ia64_register_addr,ia64_cannot_fetch_register)
(ia64_cannot_store_register,ia64_linux_fetch_registers)
(ia64_linux_store_registers): Likewise.
* hpux-thread.c (hpux_thread_fetch_registers)
(hpux_thread_store_registers): Likewise.
* h8300-tdep.c (E_PSEUDO_CCR_REGNUM,E_PSEUDO_EXR_REGNUM)
(h8300_init_frame_cache,h8300_frame_cache,h8300_frame_prev_register)
(h8300_register_type): Likewise.
* dwarf2-frame.c (dwarf2_frame_cache)
(dwarf2_frame_state_alloc_regs): Likewise.
* cris-tdep.c (cris_register_size,cris_cannot_fetch_register)
(cris_cannot_store_register,crisv32_cannot_fetch_register)
(crisv32_cannot_store_register,cris_register_name): Likewise.
* avr-tdep.c (avr_frame_unwind_cache): Likewise.
* arch-utils.c (legacy_register_sim_regno)
(legacy_virtual_frame_pointer): Likewise.
* arm-tdep.c (arm_make_prologue_cache,arm_register_sim_regno):Likewise.
* arm-tdep.h: Likewise (comment).
* frv-tdep.c (frv_register_sim_regno): Likewise.
* m68klinux-nat.c (old_fetch_inferior_registers)
(old_store_inferior_registers): Likewise.
* m32c-tdep.c (m32c_virtual_frame_pointer): Likewise.
* irix5-nat.c (fetch_core_registers): Likewise.
* hppa-tdep.c (hppa_frame_cache): Likewise.
* hppa-linux-nat.c (hppa_linux_register_addr)
(hppa_linux_fetch_inferior_registers)
(hppa_linux_store_inferior_registers): Likewise.
* hppa-hpux-nat.c (hppa_hpux_fetch_inferior_registers)
(hppa_hpux_store_inferior_registers): Likewise.
* amd64-nat.c (amd64_native_gregset_reg_offset)
(amd64_supply_native_gregset,amd64_collect_native_gregset): Likewise.
* dbug-rom.c (dbug_regname): Likewise.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache)
(HARD_PAGE_REGNUM (comment)): Likewise.
* gdbarch.sh (NUM_PSEUDO_REGS): Replace by gdbarch_num_pseudo_regs.
* i386-tdep.c (i386_dbx_reg_to_regnum)
(i386_svr4_reg_to_regnum): Likewise.
* mi/mi-main.c (mi_cmd_data_list_register_names)
(mi_cmd_data_list_changed_registers,mi_cmd_data_list_register_values)
(mi_cmd_data_write_register_values): Likewise.
* gdbarch.c, gdbarch.h: Regenerate.
* tui/tui-regs.c (tui_show_register_group): Likewise.
* xtensa-tdep.h (FP_ALIAS): Likewise.
* user-regs.h: Likewise (comment).
* user-regs.c (user_reg, user_reg_map_name_to_regnum): Likewise.
* trad-frame.c (trad_frame_alloc_saved_regs): Likewise.
* target-descriptions.h: Likewise (comment).
* target.c (debug_print_register): Likewise.
* stack.c (frame_info): Likewise.
* stabsread.c (define_symbol): Likewise.
* sh64-tdep.c (sh64_print_register,sh64_media_print_registers_info)
(sh64_compact_print_registers_info): Likewise.
* rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
* regcache.c (init_regcache_descr,register_size,regcache,regcache_save
(regcache_restore,regcache_dump): Likewise.
* mips-tdep.c (print_gp_register_row,mips_print_registers_info)
(mips_dwarf_dwarf2_ecoff_reg_to_regnum)
(mips_stab_reg_to_regnum): Likewise.
* findvar.c (value_of_register): Likewise.
* infcmd.c (default_print_registers_info,registers_info)
(print_vector_info,print_float_info): Likewise.
* m68k-tdep.c (m68k_dwarf_reg_to_regnum): Likewise.
* h8300-tdep.c (h8300_register_type): Likewise.
* dwarf2-frame.c (dwarf2_frame_cache): Likewise.
* frame.h (SIZEOF_FRAME_SAVED_REGS): Likewise.
* xtensa-tdep.c (xtensa_register_type,xtensa_reg_to_regnum)
(xtensa_pseudo_register_read,xtensa_pseudo_register_write): Likewise.
* parse.c: Remove comment.
* gdbarch.c, gdbarch.h: Regenerate
+2007-05-31 Markus Deuling <deuling@de.ibm.com>
+
+ * gdbarch.sh (NUM_REGS): Replace by gdbarch_num_regs.
+ * i386-tdep.c (i386_dbx_reg_to_regnum)
+ (i386_svr4_reg_to_regnum): Likewise.
+ * inf-ptrace.c (inf_ptrace_fetch_registers)
+ (inf_ptrace_store_registers): Likewise.
+ * corelow.c (get_core_registers): Likewise.
+ * i386-linux-nat.c (supply_gregset, fill_gregset)
+ (i386_linux_fetch_inferior_registers)
+ (i386_linux_store_inferior_registers): Likewise.
+ * remote.c (init_remote_state,packet_reg_from_regnum)
+ (packet_reg_from_pnum,process_g_packet,remote_fetch_registers)
+ (remote_prepare_to_store,store_registers_using_G)
+ (remote_store_registers,remote_arch_state): Likewise.
+ * tracepoint.c (encode_actions): Likewise.
+ * mi/mi-main.c (mi_cmd_data_list_register_names)
+ (mi_cmd_data_list_changed_registers,mi_cmd_data_list_register_values)
+ (mi_cmd_data_write_register_values): Likewise.
+ * tui/tui-regs.c (tui_show_register_group)
+ (tui_show_register_group): Likewise.
+ * xtensa-tdep.h (FP_ALIAS): Likewise.
+ * xtensa-tdep.c (xtensa_register_name,xtensa_register_type)
+ (xtensa_reg_to_regnum,xtensa_pseudo_register_read)
+ (xtensa_pseudo_register_write,xtensa_register_reggroup_p): Likewise.
+ * win32-nat.c (do_win32_fetch_inferior_registers)
+ (do_win32_store_inferior_registers,fetch_elf_core_registers
+ * user-regs.h: Likewise (comment).
+ * user-regs.c (user_reg, user_reg_map_name_to_regnum): Likewise.
+ * trad-frame.c (trad_frame_alloc_saved_regs): Likewise.
+ * target-descriptions.h: Likewise (comment).
+ * target-descriptions.c (tdesc_use_registers): Likewise (comment).
+ * target.c (debug_print_register): Likewise.
+ * stack.c (frame_info): Likewise.
+ * stabsread.c (define_symbol): Likewise.
+ * sh64-tdep.c (sh64_do_pseudo_register,sh64_print_register)
+ (sh64_media_print_registers_info)
+ (sh64_compact_print_registers_info): Likewise.
+ * rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
+ * rs6000-nat.c (fetch_register,store_register): Likewise.
+ * remote-sim.c (one2one_register_sim_regno,gdbsim_fetch_register)
+ (gdbsim_fetch_register,gdbsim_store_register): Likewise.
+ * remote-mips.c (mips_fetch_registers,mips_store_registers): Likewise.
+ * remote-m32r-sdi.c (m32r_fetch_registers)
+ (m32r_store_registers): Likewise.
+ * reggroups.c (default_register_reggroup_p): Likewise.
+ * regcache.c (init_regcache_descr,register_size,regcache,regcache_save)
+ (regcache_restore,regcache_dump): Likewise.
+ * monitor.c (monitor_fetch_registers,monitor_store_registers): Likewise.
+ * mips-tdep.c (mips_xfer_register,mips_register_name)
+ (mips_register_reggroup_p,mips_pseudo_register_read)
+ (mips_pseudo_register_write,mips_convert_register_p,mips_register_type)
+ (mips_unwind_pc,mips_unwind_sp,mips_unwind_dummy_id,set_reg_offset)
+ (mips16_scan_prologue,mips_insn16_frame_cache,reset_saved_regs)
+ (mips32_scan_prologue,mips_insn32_frame_cache,read_next_frame_reg)
+ (mips_n32n64_return_value,mips_o32_return_value,mips_o64_return_value)
+ (print_gp_register_row,mips_print_registers_info)
+ (mips_stab_reg_to_regnum,mips_dwarf_dwarf2_ecoff_reg_to_regnum)
+ (mips_register_sim_regno): Likewise.
+ * mips-linux-tdep.c (mips_linux_o32_sigframe_init)
+ (mips_linux_n32n64_sigframe_init): Likewise.
+ * mips-linux-nat.c (mips_linux_register_addr)
+ (mips64_linux_register_addr): Likewise.
+ * findvar.c (value_of_register): Likewise.
+ * infcmd.c (default_print_registers_info,registers_info)
+ (print_vector_info,print_float_info): Likewise.
+ * mips64obsd-tdep.c (mips64obsd_sigframe_init): Likewise.
+ * inf-child.c (inf_child_fetch_inferior_registers): Likewise.
+ * m68k-tdep.c (m68k_dwarf_reg_to_regnum): Likewise.
+ * m68hc11-tdep.c (m68hc11_frame_unwind_cache(: Likewise.
+ * m32r-tdep.c (m32r_frame_unwind_cache): Likewise.
+ * ia64-linux-nat.c (ia64_register_addr,ia64_cannot_fetch_register)
+ (ia64_cannot_store_register,ia64_linux_fetch_registers)
+ (ia64_linux_store_registers): Likewise.
+ * hpux-thread.c (hpux_thread_fetch_registers)
+ (hpux_thread_store_registers): Likewise.
+ * h8300-tdep.c (E_PSEUDO_CCR_REGNUM,E_PSEUDO_EXR_REGNUM)
+ (h8300_init_frame_cache,h8300_frame_cache,h8300_frame_prev_register)
+ (h8300_register_type): Likewise.
+ * dwarf2-frame.c (dwarf2_frame_cache)
+ (dwarf2_frame_state_alloc_regs): Likewise.
+ * cris-tdep.c (cris_register_size,cris_cannot_fetch_register)
+ (cris_cannot_store_register,crisv32_cannot_fetch_register)
+ (crisv32_cannot_store_register,cris_register_name): Likewise.
+ * avr-tdep.c (avr_frame_unwind_cache): Likewise.
+ * arch-utils.c (legacy_register_sim_regno)
+ (legacy_virtual_frame_pointer): Likewise.
+ * arm-tdep.c (arm_make_prologue_cache,arm_register_sim_regno):Likewise.
+ * arm-tdep.h: Likewise (comment).
+ * frv-tdep.c (frv_register_sim_regno): Likewise.
+ * m68klinux-nat.c (old_fetch_inferior_registers)
+ (old_store_inferior_registers): Likewise.
+ * m32c-tdep.c (m32c_virtual_frame_pointer): Likewise.
+ * irix5-nat.c (fetch_core_registers): Likewise.
+ * hppa-tdep.c (hppa_frame_cache): Likewise.
+ * hppa-linux-nat.c (hppa_linux_register_addr)
+ (hppa_linux_fetch_inferior_registers)
+ (hppa_linux_store_inferior_registers): Likewise.
+ * hppa-hpux-nat.c (hppa_hpux_fetch_inferior_registers)
+ (hppa_hpux_store_inferior_registers): Likewise.
+ * amd64-nat.c (amd64_native_gregset_reg_offset)
+ (amd64_supply_native_gregset,amd64_collect_native_gregset): Likewise.
+ * dbug-rom.c (dbug_regname): Likewise.
+ * m68hc11-tdep.c (m68hc11_frame_unwind_cache)
+ (HARD_PAGE_REGNUM (comment)): Likewise.
+ * gdbarch.sh (NUM_PSEUDO_REGS): Replace by gdbarch_num_pseudo_regs.
+ * i386-tdep.c (i386_dbx_reg_to_regnum)
+ (i386_svr4_reg_to_regnum): Likewise.
+ * mi/mi-main.c (mi_cmd_data_list_register_names)
+ (mi_cmd_data_list_changed_registers,mi_cmd_data_list_register_values)
+ (mi_cmd_data_write_register_values): Likewise.
+ * gdbarch.c, gdbarch.h: Regenerate.
+ * tui/tui-regs.c (tui_show_register_group): Likewise.
+ * xtensa-tdep.h (FP_ALIAS): Likewise.
+ * user-regs.h: Likewise (comment).
+ * user-regs.c (user_reg, user_reg_map_name_to_regnum): Likewise.
+ * trad-frame.c (trad_frame_alloc_saved_regs): Likewise.
+ * target-descriptions.h: Likewise (comment).
+ * target.c (debug_print_register): Likewise.
+ * stack.c (frame_info): Likewise.
+ * stabsread.c (define_symbol): Likewise.
+ * sh64-tdep.c (sh64_print_register,sh64_media_print_registers_info)
+ (sh64_compact_print_registers_info): Likewise.
+ * rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
+ * regcache.c (init_regcache_descr,register_size,regcache,regcache_save
+ (regcache_restore,regcache_dump): Likewise.
+ * mips-tdep.c (print_gp_register_row,mips_print_registers_info)
+ (mips_dwarf_dwarf2_ecoff_reg_to_regnum)
+ (mips_stab_reg_to_regnum): Likewise.
+ * findvar.c (value_of_register): Likewise.
+ * infcmd.c (default_print_registers_info,registers_info)
+ (print_vector_info,print_float_info): Likewise.
+ * m68k-tdep.c (m68k_dwarf_reg_to_regnum): Likewise.
+ * h8300-tdep.c (h8300_register_type): Likewise.
+ * dwarf2-frame.c (dwarf2_frame_cache): Likewise.
+ * frame.h (SIZEOF_FRAME_SAVED_REGS): Likewise.
+ * xtensa-tdep.c (xtensa_register_type,xtensa_reg_to_regnum)
+ (xtensa_pseudo_register_read,xtensa_pseudo_register_write): Likewise.
+ * parse.c: Remove comment.
+ * gdbarch.c, gdbarch.h: Regenerate
+
2007-05-31 Markus Deuling <deuling@de.ibm.com>
* gdbarch.sh (CANNOT_FETCH_REGISTER): Replace by
num_regs = amd64_native_gregset32_num_regs;
}
- if (num_regs > NUM_REGS)
- num_regs = NUM_REGS;
+ if (num_regs > gdbarch_num_regs (current_gdbarch))
+ num_regs = gdbarch_num_regs (current_gdbarch);
- if (regnum < num_regs && regnum < NUM_REGS)
+ if (regnum < num_regs && regnum < gdbarch_num_regs (current_gdbarch))
return reg_offset[regnum];
return -1;
if (gdbarch_ptr_bit (gdbarch) == 32)
num_regs = amd64_native_gregset32_num_regs;
- if (num_regs > NUM_REGS)
- num_regs = NUM_REGS;
+ if (num_regs > gdbarch_num_regs (current_gdbarch))
+ num_regs = gdbarch_num_regs (current_gdbarch);
for (i = 0; i < num_regs; i++)
{
}
}
- if (num_regs > NUM_REGS)
- num_regs = NUM_REGS;
+ if (num_regs > gdbarch_num_regs (current_gdbarch))
+ num_regs = gdbarch_num_regs (current_gdbarch);
for (i = 0; i < num_regs; i++)
{
legacy_register_sim_regno (int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < NUM_REGS);
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
/* NOTE: cagney/2002-05-13: The old code did it this way and it is
suspected that some GDB/SIM combinations may rely on this
behavour. The default should be one2one_register_sim_regno
register and an offset can determine this. I think it should
instead generate a byte code expression as that would work better
with things like Dwarf2's CFI. */
- if (DEPRECATED_FP_REGNUM >= 0 && DEPRECATED_FP_REGNUM < NUM_REGS)
+ if (DEPRECATED_FP_REGNUM >= 0
+ && DEPRECATED_FP_REGNUM < gdbarch_num_regs (current_gdbarch))
*frame_regnum = DEPRECATED_FP_REGNUM;
- else if (SP_REGNUM >= 0 && SP_REGNUM < NUM_REGS)
+ else if (SP_REGNUM >= 0 && SP_REGNUM < gdbarch_num_regs (current_gdbarch))
*frame_regnum = SP_REGNUM;
else
/* Should this be an internal error? I guess so, it is reflecting
/* Calculate actual addresses of saved registers using offsets
determined by arm_scan_prologue. */
- for (reg = 0; reg < NUM_REGS; reg++)
+ for (reg = 0; reg < gdbarch_num_regs (current_gdbarch); reg++)
if (trad_frame_addr_p (cache->saved_regs, reg))
cache->saved_regs[reg].addr += cache->prev_sp;
arm_register_sim_regno (int regnum)
{
int reg = regnum;
- gdb_assert (reg >= 0 && reg < NUM_REGS);
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
if (regnum >= ARM_WR0_REGNUM && regnum <= ARM_WR15_REGNUM)
return regnum - ARM_WR0_REGNUM + SIM_ARM_IWMMXT_COP0R0_REGNUM;
#define STATUS_REGISTER_SIZE 4
/* Number of machine registers. The only define actually required
- is NUM_REGS. The other definitions are used for documentation
+ is gdbarch_num_regs. The other definitions are used for documentation
purposes and code readability. */
/* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
(and called PS for processor status) so the status bits can be cleared
/* Adjust all the saved registers so that they contain addresses and not
offsets. */
- for (i = 0; i < NUM_REGS - 1; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch) - 1; i++)
if (info->saved_regs[i].addr)
{
info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr);
".reg-xfp", 3, "extended floating-point", 0);
/* Supply dummy value for all registers not found in the core. */
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (!regcache_valid_p (regcache, i))
regcache_raw_supply (regcache, i, NULL);
}
/* Special register not applicable to this CRIS version. */
return 0;
}
- else if (regno >= PC_REGNUM && regno < NUM_REGS)
+ else if (regno >= PC_REGNUM && regno < gdbarch_num_regs (current_gdbarch))
{
/* This will apply to CRISv32 only where there are additional registers
after the special registers (pseudo PC and support registers). */
static int
cris_cannot_fetch_register (int regno)
{
- return ((regno < 0 || regno >= NUM_REGS)
+ return ((regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
|| (cris_register_size (regno) == 0));
}
3. Those registers to which a write has no effect.
*/
- if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
+ if (regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || cris_register_size (regno) == 0)
/* Not implemented. */
return 1;
static int
crisv32_cannot_fetch_register (int regno)
{
- return ((regno < 0 || regno >= NUM_REGS)
+ return ((regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
|| (cris_register_size (regno) == 0));
}
3. Those registers to which a write has no effect.
*/
- if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
+ if (regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || cris_register_size (regno) == 0)
/* Not implemented. */
return 1;
/* General register. */
return cris_genreg_names[regno];
}
- else if (regno >= NUM_GENREGS && regno < NUM_REGS)
+ else if (regno >= NUM_GENREGS && regno < gdbarch_num_regs (current_gdbarch))
{
return cris_special_register_name (regno);
}
};
if ((index >= (sizeof (regnames) / sizeof (regnames[0])))
- || (index < 0) || (index >= NUM_REGS))
+ || (index < 0) || (index >= gdbarch_num_regs (current_gdbarch)))
return NULL;
else
return regnames[index];
which is unused in that case. */
#define cfa_exp_len cfa_reg
-/* Assert that the register set RS is large enough to store NUM_REGS
+/* Assert that the register set RS is large enough to store gdbarch_num_regs
columns. If necessary, enlarge the register set. */
static void
{
struct cleanup *old_chain;
struct gdbarch *gdbarch = get_frame_arch (next_frame);
- const int num_regs = NUM_REGS + NUM_PSEUDO_REGS;
+ const int num_regs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
struct dwarf2_frame_cache *cache;
struct dwarf2_frame_state *fs;
struct dwarf2_fde *fde;
correspond to a real register. If it doesn't correspond to a
real register, or if we shouldn't treat it as such,
DWARF2_REG_TO_REGNUM should be defined to return a number outside
- the range [0, NUM_REGS). */
+ the range [0, gdbarch_num_regs). */
{
int column; /* CFI speak for "register number". */
/* User registers lie completely outside of the range of normal
registers. Catch them early so that the target never sees them. */
- if (regnum >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (regnum >= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
return value_of_user_reg (regnum, frame);
frame_register (frame, regnum, &optim, &lval, &addr, &realnum, raw_buffer);
#error "SIZEOF_FRAME_SAVED_REGS can not be re-defined"
#endif
#define SIZEOF_FRAME_SAVED_REGS \
- (sizeof (CORE_ADDR) * (NUM_REGS+NUM_PSEUDO_REGS))
+ (sizeof (CORE_ADDR) * (gdbarch_num_regs (current_gdbarch)\
+ + gdbarch_num_pseudo_regs (current_gdbarch)))
/* Allocate zero initialized memory from the frame cache obstack.
Appendices to the frame info (such as the unwind cache) should
H_SPR_FNER1, /* fner1_regnum */
};
- gdb_assert (reg >= 0 && reg < NUM_REGS);
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
fprintf_unfiltered (file,
"gdbarch_dump: name_of_malloc = %s\n",
NAME_OF_MALLOC);
-#ifdef NUM_PSEUDO_REGS
- fprintf_unfiltered (file,
- "gdbarch_dump: NUM_PSEUDO_REGS # %s\n",
- XSTRING (NUM_PSEUDO_REGS));
-#endif
fprintf_unfiltered (file,
"gdbarch_dump: num_pseudo_regs = %s\n",
paddr_d (current_gdbarch->num_pseudo_regs));
-#ifdef NUM_REGS
- fprintf_unfiltered (file,
- "gdbarch_dump: NUM_REGS # %s\n",
- XSTRING (NUM_REGS));
-#endif
fprintf_unfiltered (file,
"gdbarch_dump: num_regs = %s\n",
paddr_d (current_gdbarch->num_regs));
extern int gdbarch_num_regs (struct gdbarch *gdbarch);
extern void set_gdbarch_num_regs (struct gdbarch *gdbarch, int num_regs);
-#if !defined (GDB_TM_FILE) && defined (NUM_REGS)
-#error "Non multi-arch definition of NUM_REGS"
-#endif
-#if !defined (NUM_REGS)
-#define NUM_REGS (gdbarch_num_regs (current_gdbarch))
-#endif
/* This macro gives the number of pseudo-registers that live in the
register namespace but do not get fetched or stored on the target.
extern int gdbarch_num_pseudo_regs (struct gdbarch *gdbarch);
extern void set_gdbarch_num_pseudo_regs (struct gdbarch *gdbarch, int num_pseudo_regs);
-#if !defined (GDB_TM_FILE) && defined (NUM_PSEUDO_REGS)
-#error "Non multi-arch definition of NUM_PSEUDO_REGS"
-#endif
-#if !defined (NUM_PSEUDO_REGS)
-#define NUM_PSEUDO_REGS (gdbarch_num_pseudo_regs (current_gdbarch))
-#endif
/* GDB's standard (or well known) register numbers. These can map onto
a real register or a pseudo (computed) register or not be defined at
M::void:pseudo_register_read:struct regcache *regcache, int cookednum, gdb_byte *buf:regcache, cookednum, buf
M::void:pseudo_register_write:struct regcache *regcache, int cookednum, const gdb_byte *buf:regcache, cookednum, buf
#
-v:=:int:num_regs:::0:-1
+v::int:num_regs:::0:-1
# This macro gives the number of pseudo-registers that live in the
# register namespace but do not get fetched or stored on the target.
# These pseudo-registers may be aliases for other registers,
# combinations of other registers, or they may be computed by GDB.
-v:=:int:num_pseudo_regs:::0:0::0
+v::int:num_pseudo_regs:::0:0::0
# GDB's standard (or well known) register numbers. These can map onto
# a real register or a pseudo (computed) register or not be defined at
#define H8300_MAX_NUM_REGS 18
-#define E_PSEUDO_CCR_REGNUM (NUM_REGS)
-#define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
+#define E_PSEUDO_CCR_REGNUM (gdbarch_num_regs (current_gdbarch))
+#define E_PSEUDO_EXR_REGNUM (gdbarch_num_regs (current_gdbarch)+1)
struct h8300_frame_cache
{
/* Saved registers. We initialize these to -1 since zero is a valid
offset (that's where %fp is supposed to be stored). */
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
cache->saved_regs[i] = -1;
}
/* Adjust all the saved registers such that they contain addresses
instead of offsets. */
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (cache->saved_regs[i] != -1)
cache->saved_regs[i] = cache->base - cache->saved_regs[i];
return;
}
- if (regnum < NUM_REGS && cache->saved_regs[regnum] != -1)
+ if (regnum < gdbarch_num_regs (current_gdbarch)
+ && cache->saved_regs[regnum] != -1)
{
*optimizedp = 0;
*lvalp = lval_memory;
static struct type *
h8300_register_type (struct gdbarch *gdbarch, int regno)
{
- if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
internal_error (__FILE__, __LINE__,
"h8300_register_type: illegal register number %d", regno);
else
hppa_hpux_fetch_inferior_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
hppa_hpux_fetch_register (regcache, regnum);
else
hppa_hpux_fetch_register (regcache, regnum);
hppa_hpux_store_inferior_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
hppa_hpux_store_register (regcache, regnum);
else
hppa_hpux_store_register (regcache, regnum);
{
CORE_ADDR addr;
- if ((unsigned) regno >= NUM_REGS)
+ if ((unsigned) regno >= gdbarch_num_regs (current_gdbarch))
error (_("Invalid register number %d."), regno);
if (u_offsets[regno] == -1)
{
if (-1 == regno)
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
fetch_register (regcache, regno);
}
else
{
if (-1 == regno)
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
store_register (regcache, regno);
}
else
{
/* Convert all the offsets into addresses. */
int reg;
- for (reg = 0; reg < NUM_REGS; reg++)
+ for (reg = 0; reg < gdbarch_num_regs (current_gdbarch); reg++)
{
if (trad_frame_addr_p (cache->saved_regs, reg))
cache->saved_regs[reg].addr += cache->base;
if (regno == -1)
{
first_regno = 0;
- last_regno = NUM_REGS - 1;
+ last_regno = gdbarch_num_regs (current_gdbarch) - 1;
}
else
{
if (regno == -1)
{
first_regno = 0;
- last_regno = NUM_REGS - 1;
+ last_regno = gdbarch_num_regs (current_gdbarch) - 1;
}
else
{
for (i = 0; i < I386_NUM_GREGS; i++)
regcache_raw_supply (regcache, i, regp + regmap[i]);
- if (I386_LINUX_ORIG_EAX_REGNUM < NUM_REGS)
+ if (I386_LINUX_ORIG_EAX_REGNUM < gdbarch_num_regs (current_gdbarch))
regcache_raw_supply (regcache, I386_LINUX_ORIG_EAX_REGNUM,
regp + ORIG_EAX);
}
regcache_raw_collect (regcache, i, regp + regmap[i]);
if ((regno == -1 || regno == I386_LINUX_ORIG_EAX_REGNUM)
- && I386_LINUX_ORIG_EAX_REGNUM < NUM_REGS)
+ && I386_LINUX_ORIG_EAX_REGNUM < gdbarch_num_regs (current_gdbarch))
regcache_raw_collect (regcache, I386_LINUX_ORIG_EAX_REGNUM,
regp + ORIG_EAX);
}
{
int i;
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (regno == -1 || regno == i)
fetch_register (regcache, i);
{
int i;
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (regno == -1 || regno == i)
store_register (regcache, i);
}
/* This will hopefully provoke a warning. */
- return NUM_REGS + NUM_PSEUDO_REGS;
+ return gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
}
/* Convert SVR4 register number REG to the appropriate register number
}
/* This will hopefully provoke a warning. */
- return NUM_REGS + NUM_PSEUDO_REGS;
+ return gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
}
#undef I387_ST0_REGNUM
{
CORE_ADDR addr;
- if (regno < 0 || regno >= NUM_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
error (_("Invalid register number %d."), regno);
if (u_offsets[regno] == -1)
static int
ia64_cannot_fetch_register (int regno)
{
- return regno < 0 || regno >= NUM_REGS || u_offsets[regno] == -1;
+ return regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || u_offsets[regno] == -1;
}
static int
were previously read from the inferior process to be written
back.) */
- return regno < 0 || regno >= NUM_REGS || u_offsets[regno] == -1
+ return regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || u_offsets[regno] == -1
|| regno == IA64_BSPSTORE_REGNUM;
}
ia64_linux_fetch_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
ia64_linux_fetch_register (regcache, regnum);
else
ia64_linux_fetch_register (regcache, regnum);
ia64_linux_store_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
ia64_linux_store_register (regcache, regnum);
else
ia64_linux_store_register (regcache, regnum);
{
if (regnum == -1)
{
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
regcache_raw_supply (regcache, regnum, NULL);
}
else
inf_ptrace_fetch_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
inf_ptrace_fetch_register (regcache, regnum);
else
inf_ptrace_fetch_register (regcache, regnum);
inf_ptrace_store_registers (struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
inf_ptrace_store_register (regcache, regnum);
else
inf_ptrace_store_register (regcache, regnum);
int regnum, int print_all)
{
int i;
- const int numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ const int numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
gdb_byte buffer[MAX_REGISTER_SIZE];
for (i = 0; i < numregs; i++)
int regnum = strtol (start, &endptr, 0);
if (endptr == end
&& regnum >= 0
- && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
gdbarch_print_registers_info (current_gdbarch, gdb_stdout,
frame, regnum, fpregs);
if (group != NULL)
{
int regnum;
- for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
if (gdbarch_register_reggroup_p (current_gdbarch, regnum,
group))
int regnum;
int printed_something = 0;
- for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
if (gdbarch_register_reggroup_p (gdbarch, regnum, vector_reggroup))
{
int regnum;
int printed_something = 0;
- for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
if (gdbarch_register_reggroup_p (gdbarch, regnum, float_reggroup))
{
/* If regsize is 8, this is a N32 or N64 core file.
If regsize is 4, this is an O32 core file. */
- if (core_reg_size != regsize * NUM_REGS)
+ if (core_reg_size != regsize * gdbarch_num_regs (current_gdbarch))
{
warning (_("wrong size gregset struct in core file"));
return;
}
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
{
regcache_raw_supply (regcache, regno, srcp);
srcp += regsize;
break;
}
/* Sanity check */
- if (*frame_regnum > NUM_REGS)
+ if (*frame_regnum > gdbarch_num_regs (current_gdbarch))
internal_error (__FILE__, __LINE__, _("No virtual frame pointer available"));
}
/* Adjust all the saved registers so that they contain addresses and
not offsets. */
- for (i = 0; i < NUM_REGS - 1; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch) - 1; i++)
if (trad_frame_addr_p (info->saved_regs, i))
info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
/* 68HC12 page number register.
Note: to keep a compatibility with gcc register naming, we must
not have to rename FP and other soft registers. The page register
- is a real hard register and must therefore be counted by NUM_REGS.
+ is a real hard register and must therefore be counted by gdbarch_num_regs.
For this it has the same number as Z register (which is not used). */
#define HARD_PAGE_REGNUM 8
#define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
/* Adjust all the saved registers so that they contain addresses and not
offsets. */
- for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS - 1; i++)
+ for (i = 0;
+ i < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch) - 1;
+ i++)
if (trad_frame_addr_p (info->saved_regs, i))
{
info->saved_regs[i].addr += this_base;
/* pc */
return M68K_PC_REGNUM;
else
- return NUM_REGS + NUM_PSEUDO_REGS;
+ return gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
}
\f
}
else
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
{
fetch_register (regcache, regno);
}
}
else
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
{
store_register (regcache, regno);
}
struct cleanup *cleanup;
/* Note that the test for a valid register must include checking the
- REGISTER_NAME because NUM_REGS may be allocated for the union of
+ REGISTER_NAME because gdbarch_num_regs may be allocated for the union of
the register sets within a family of related processors. In this
case, some entries of REGISTER_NAME will change depending upon
the particular processor being debugged. */
- numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
cleanup = make_cleanup_ui_out_list_begin_end (uiout, "register-names");
cleanup = make_cleanup_regcache_xfree (prev_regs);
/* Note that the test for a valid register must include checking the
- REGISTER_NAME because NUM_REGS may be allocated for the union of
+ REGISTER_NAME because gdbarch_num_regs may be allocated for the union of
the register sets within a family of related processors. In this
case, some entries of REGISTER_NAME will change depending upon
the particular processor being debugged. */
- numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
make_cleanup_ui_out_list_begin_end (uiout, "changed-registers");
struct cleanup *list_cleanup, *tuple_cleanup;
/* Note that the test for a valid register must include checking the
- REGISTER_NAME because NUM_REGS may be allocated for the union of
+ REGISTER_NAME because gdbarch_num_regs may be allocated for the union of
the register sets within a family of related processors. In this
case, some entries of REGISTER_NAME will change depending upon
the particular processor being debugged. */
- numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
if (argc == 0)
{
char format;
/* Note that the test for a valid register must include checking the
- REGISTER_NAME because NUM_REGS may be allocated for the union of
+ REGISTER_NAME because gdbarch_num_regs may be allocated for the union of
the register sets within a family of related processors. In this
case, some entries of REGISTER_NAME will change depending upon
the particular processor being debugged. */
- numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
if (argc == 0)
{
{
CORE_ADDR regaddr;
- if (regno < 0 || regno >= NUM_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
error (_("Bogon register number %d."), regno);
if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
{
CORE_ADDR regaddr;
- if (regno < 0 || regno >= NUM_REGS)
+ if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
error (_("Bogon register number %d."), regno);
if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
regs_base = sigcontext_base;
#if 0
- trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM
+ + gdbarch_num_regs (current_gdbarch),
regs_base + SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
trad_frame_set_reg_addr (this_cache,
- ireg + MIPS_ZERO_REGNUM + NUM_REGS,
+ ireg + MIPS_ZERO_REGNUM
+ + gdbarch_num_regs (current_gdbarch),
regs_base + SIGCONTEXT_REGS
+ ireg * SIGCONTEXT_REG_SIZE);
the "high" bits depends on endianness. */
for (ireg = 0; ireg < 32; ireg++)
if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
- trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ ireg + regs->fp0 +
+ gdbarch_num_regs (current_gdbarch),
sigcontext_base + SIGCONTEXT_FPREGS + 4
+ (ireg & ~1) * SIGCONTEXT_REG_SIZE);
else
- trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ ireg + regs->fp0
+ + gdbarch_num_regs (current_gdbarch),
sigcontext_base + SIGCONTEXT_FPREGS
+ (ireg & ~1) * SIGCONTEXT_REG_SIZE);
- trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->pc + gdbarch_num_regs (current_gdbarch),
regs_base + SIGCONTEXT_PC);
trad_frame_set_reg_addr (this_cache,
- regs->fp_control_status + NUM_REGS,
+ regs->fp_control_status
+ + gdbarch_num_regs (current_gdbarch),
sigcontext_base + SIGCONTEXT_FPCSR);
- trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->hi + gdbarch_num_regs (current_gdbarch),
regs_base + SIGCONTEXT_HI);
- trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->lo + gdbarch_num_regs (current_gdbarch),
regs_base + SIGCONTEXT_LO);
- trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->cause + gdbarch_num_regs (current_gdbarch),
sigcontext_base + SIGCONTEXT_CAUSE);
- trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->badvaddr + gdbarch_num_regs (current_gdbarch),
sigcontext_base + SIGCONTEXT_BADVADDR);
/* Choice of the bottom of the sigframe is somewhat arbitrary. */
sigcontext_base += N64_SIGFRAME_SIGCONTEXT_OFFSET;
#if 0
- trad_frame_set_reg_addr (this_cache, ORIG_ZERO_REGNUM + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ ORIG_ZERO_REGNUM
+ + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_REGS);
#endif
for (ireg = 1; ireg < 32; ireg++)
trad_frame_set_reg_addr (this_cache,
- ireg + MIPS_ZERO_REGNUM + NUM_REGS,
+ ireg + MIPS_ZERO_REGNUM
+ + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_REGS
+ ireg * N64_SIGCONTEXT_REG_SIZE);
for (ireg = 0; ireg < 32; ireg++)
- trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ ireg + regs->fp0
+ + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_FPREGS
+ ireg * N64_SIGCONTEXT_REG_SIZE);
- trad_frame_set_reg_addr (this_cache, regs->pc + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->pc + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_PC);
trad_frame_set_reg_addr (this_cache,
- regs->fp_control_status + NUM_REGS,
+ regs->fp_control_status
+ + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_FPCSR);
- trad_frame_set_reg_addr (this_cache, regs->hi + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->hi + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_HI);
- trad_frame_set_reg_addr (this_cache, regs->lo + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->lo + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_LO);
- trad_frame_set_reg_addr (this_cache, regs->cause + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->cause + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_CAUSE);
- trad_frame_set_reg_addr (this_cache, regs->badvaddr + NUM_REGS,
+ trad_frame_set_reg_addr (this_cache,
+ regs->badvaddr + gdbarch_num_regs (current_gdbarch),
sigcontext_base + N64_SIGCONTEXT_BADVADDR);
/* Choice of the bottom of the sigframe is somewhat arbitrary. */
const gdb_byte *out, int buf_offset)
{
int reg_offset = 0;
- gdb_assert (reg_num >= NUM_REGS);
+ gdb_assert (reg_num >= gdbarch_num_regs (current_gdbarch));
/* Need to transfer the left or right part of the register, based on
the targets byte order. */
switch (endian)
enum mips_abi abi = mips_abi (current_gdbarch);
- /* Map [NUM_REGS .. 2*NUM_REGS) onto the raw registers, but then
- don't make the raw register names visible. */
- int rawnum = regno % NUM_REGS;
- if (regno < NUM_REGS)
+ /* Map [gdbarch_num_regs .. 2*gdbarch_num_regs) onto the raw registers,
+ but then don't make the raw register names visible. */
+ int rawnum = regno % gdbarch_num_regs (current_gdbarch);
+ if (regno < gdbarch_num_regs (current_gdbarch))
return "";
/* The MIPS integer registers are always mapped from 0 to 31. The
else
return mips_gpr_names[rawnum];
}
- else if (32 <= rawnum && rawnum < NUM_REGS)
+ else if (32 <= rawnum && rawnum < gdbarch_num_regs (current_gdbarch))
{
gdb_assert (rawnum - 32 < NUM_MIPS_PROCESSOR_REGS);
return tdep->mips_processor_reg_names[rawnum - 32];
int vector_p;
int float_p;
int raw_p;
- int rawnum = regnum % NUM_REGS;
- int pseudo = regnum / NUM_REGS;
+ int rawnum = regnum % gdbarch_num_regs (current_gdbarch);
+ int pseudo = regnum / gdbarch_num_regs (current_gdbarch);
if (reggroup == all_reggroup)
return pseudo;
vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
/* FIXME: cagney/2003-04-13: Can't yet use gdbarch_num_regs
(gdbarch), as not all architectures are multi-arch. */
- raw_p = rawnum < NUM_REGS;
+ raw_p = rawnum < gdbarch_num_regs (current_gdbarch);
if (REGISTER_NAME (regnum) == NULL || REGISTER_NAME (regnum)[0] == '\0')
return 0;
if (reggroup == float_reggroup)
}
/* Map the symbol table registers which live in the range [1 *
- NUM_REGS .. 2 * NUM_REGS) back onto the corresponding raw
+ gdbarch_num_regs .. 2 * gdbarch_num_regs) back onto the corresponding raw
registers. Take care of alignment and size problems. */
static void
mips_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
int cookednum, gdb_byte *buf)
{
- int rawnum = cookednum % NUM_REGS;
- gdb_assert (cookednum >= NUM_REGS && cookednum < 2 * NUM_REGS);
+ int rawnum = cookednum % gdbarch_num_regs (current_gdbarch);
+ gdb_assert (cookednum >= gdbarch_num_regs (current_gdbarch)
+ && cookednum < 2 * gdbarch_num_regs (current_gdbarch));
if (register_size (gdbarch, rawnum) == register_size (gdbarch, cookednum))
regcache_raw_read (regcache, rawnum, buf);
else if (register_size (gdbarch, rawnum) >
struct regcache *regcache, int cookednum,
const gdb_byte *buf)
{
- int rawnum = cookednum % NUM_REGS;
- gdb_assert (cookednum >= NUM_REGS && cookednum < 2 * NUM_REGS);
+ int rawnum = cookednum % gdbarch_num_regs (current_gdbarch);
+ gdb_assert (cookednum >= gdbarch_num_regs (current_gdbarch)
+ && cookednum < 2 * gdbarch_num_regs (current_gdbarch));
if (register_size (gdbarch, rawnum) == register_size (gdbarch, cookednum))
regcache_raw_write (regcache, rawnum, buf);
else if (register_size (gdbarch, rawnum) >
{
return (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, regnum) == 4
- && (regnum % NUM_REGS) >= mips_regnum (current_gdbarch)->fp0
- && (regnum % NUM_REGS) < mips_regnum (current_gdbarch)->fp0 + 32
+ && (regnum % gdbarch_num_regs (current_gdbarch))
+ >= mips_regnum (current_gdbarch)->fp0
+ && (regnum % gdbarch_num_regs (current_gdbarch))
+ < mips_regnum (current_gdbarch)->fp0 + 32
&& TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8);
}
static struct type *
mips_register_type (struct gdbarch *gdbarch, int regnum)
{
- gdb_assert (regnum >= 0 && regnum < 2 * NUM_REGS);
- if ((regnum % NUM_REGS) >= mips_regnum (current_gdbarch)->fp0
- && (regnum % NUM_REGS) < mips_regnum (current_gdbarch)->fp0 + 32)
+ gdb_assert (regnum >= 0 && regnum < 2 * gdbarch_num_regs (current_gdbarch));
+ if ((regnum % gdbarch_num_regs (current_gdbarch))
+ >= mips_regnum (current_gdbarch)->fp0
+ && (regnum % gdbarch_num_regs (current_gdbarch))
+ < mips_regnum (current_gdbarch)->fp0 + 32)
{
/* The floating-point registers raw, or cooked, always match
mips_isa_regsize(), and also map 1:1, byte for byte. */
else
return builtin_type_ieee_double;
}
- else if (regnum < NUM_REGS)
+ else if (regnum < gdbarch_num_regs (current_gdbarch))
{
/* The raw or ISA registers. These are all sized according to
the ISA regsize. */
{
/* The cooked or ABI registers. These are sized according to
the ABI (with a few complications). */
- if (regnum >= (NUM_REGS
+ if (regnum >= (gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp_control_status)
- && regnum <= NUM_REGS + MIPS_LAST_EMBED_REGNUM)
+ && regnum <= gdbarch_num_regs (current_gdbarch)
+ + MIPS_LAST_EMBED_REGNUM)
/* The pseudo/cooked view of the embedded registers is always
32-bit. The raw view is handled below. */
return builtin_type_int32;
mips_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
return frame_unwind_register_signed (next_frame,
- NUM_REGS + mips_regnum (gdbarch)->pc);
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (gdbarch)->pc);
}
static CORE_ADDR
mips_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_unwind_register_signed (next_frame, NUM_REGS + MIPS_SP_REGNUM);
+ return frame_unwind_register_signed (next_frame,
+ gdbarch_num_regs (current_gdbarch)
+ + MIPS_SP_REGNUM);
}
/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
static struct frame_id
mips_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_id_build (frame_unwind_register_signed (next_frame, NUM_REGS + MIPS_SP_REGNUM),
- frame_pc_unwind (next_frame));
+ return frame_id_build
+ (frame_unwind_register_signed (next_frame,
+ gdbarch_num_regs (current_gdbarch)
+ + MIPS_SP_REGNUM),
+ frame_pc_unwind (next_frame));
}
static void
way we will only recognize the first save of a given register in a
function prologue.
- For simplicity, save the address in both [0 .. NUM_REGS) and
- [NUM_REGS .. 2*NUM_REGS). Strictly speaking, only the second range
- is used as it is only second range (the ABI instead of ISA
- registers) that comes into play when finding saved registers in a
- frame. */
+ For simplicity, save the address in both [0 .. gdbarch_num_regs) and
+ [gdbarch_num_regs .. 2*gdbarch_num_regs).
+ Strictly speaking, only the second range is used as it is only second
+ range (the ABI instead of ISA registers) that comes into play when finding
+ saved registers in a frame. */
static void
set_reg_offset (struct mips_frame_cache *this_cache, int regnum,
if (this_cache != NULL
&& this_cache->saved_regs[regnum].addr == -1)
{
- this_cache->saved_regs[regnum + 0 * NUM_REGS].addr = offset;
- this_cache->saved_regs[regnum + 1 * NUM_REGS].addr = offset;
+ this_cache->saved_regs[regnum
+ + 0 * gdbarch_num_regs (current_gdbarch)].addr
+ = offset;
+ this_cache->saved_regs[regnum
+ + 1 * gdbarch_num_regs (current_gdbarch)].addr
+ = offset;
}
}
/* Can be called when there's no process, and hence when there's no
NEXT_FRAME. */
if (next_frame != NULL)
- sp = read_next_frame_reg (next_frame, NUM_REGS + MIPS_SP_REGNUM);
+ sp = read_next_frame_reg (next_frame, gdbarch_num_regs (current_gdbarch)
+ + MIPS_SP_REGNUM);
else
sp = 0;
if (this_cache != NULL)
{
this_cache->base =
- (frame_unwind_register_signed (next_frame, NUM_REGS + frame_reg)
+ (frame_unwind_register_signed (next_frame,
+ gdbarch_num_regs (current_gdbarch)
+ + frame_reg)
+ frame_offset - frame_adjust);
/* FIXME: brobecker/2004-10-10: Just as in the mips32 case, we should
be able to get rid of the assignment below, evetually. But it's
still needed for now. */
- this_cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc]
- = this_cache->saved_regs[NUM_REGS + MIPS_RA_REGNUM];
+ this_cache->saved_regs[gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->pc]
+ = this_cache->saved_regs[gdbarch_num_regs (current_gdbarch)
+ + MIPS_RA_REGNUM];
}
/* If we didn't reach the end of the prologue when scanning the function
}
/* SP_REGNUM, contains the value and not the address. */
- trad_frame_set_value (cache->saved_regs, NUM_REGS + MIPS_SP_REGNUM, cache->base);
+ trad_frame_set_value (cache->saved_regs, gdbarch_num_regs (current_gdbarch)
+ + MIPS_SP_REGNUM, cache->base);
return (*this_cache);
}
return;
{
- const int num_regs = NUM_REGS;
+ const int num_regs = gdbarch_num_regs (current_gdbarch);
int i;
for (i = 0; i < num_regs; i++)
/* Can be called when there's no process, and hence when there's no
NEXT_FRAME. */
if (next_frame != NULL)
- sp = read_next_frame_reg (next_frame, NUM_REGS + MIPS_SP_REGNUM);
+ sp = read_next_frame_reg (next_frame, gdbarch_num_regs (current_gdbarch)
+ + MIPS_SP_REGNUM);
else
sp = 0;
unsigned alloca_adjust;
frame_reg = 30;
- frame_addr = read_next_frame_reg (next_frame, NUM_REGS + 30);
+ frame_addr = read_next_frame_reg (next_frame,
+ gdbarch_num_regs
+ (current_gdbarch) + 30);
alloca_adjust = (unsigned) (frame_addr - (sp + low_word));
if (alloca_adjust > 0)
{
unsigned alloca_adjust;
frame_reg = 30;
- frame_addr = read_next_frame_reg (next_frame, NUM_REGS + 30);
+ frame_addr = read_next_frame_reg (next_frame,
+ gdbarch_num_regs
+ (current_gdbarch) + 30);
alloca_adjust = (unsigned) (frame_addr - sp);
if (alloca_adjust > 0)
{
if (this_cache != NULL)
{
this_cache->base =
- (frame_unwind_register_signed (next_frame, NUM_REGS + frame_reg)
+ (frame_unwind_register_signed (next_frame,
+ gdbarch_num_regs (current_gdbarch)
+ + frame_reg)
+ frame_offset);
/* FIXME: brobecker/2004-09-15: We should be able to get rid of
this assignment below, eventually. But it's still needed
for now. */
- this_cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc]
- = this_cache->saved_regs[NUM_REGS + MIPS_RA_REGNUM];
+ this_cache->saved_regs[gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->pc]
+ = this_cache->saved_regs[gdbarch_num_regs (current_gdbarch)
+ + MIPS_RA_REGNUM];
}
/* If we didn't reach the end of the prologue when scanning the function
}
/* SP_REGNUM, contains the value and not the address. */
- trad_frame_set_value (cache->saved_regs, NUM_REGS + MIPS_SP_REGNUM, cache->base);
+ trad_frame_set_value (cache->saved_regs,
+ gdbarch_num_regs (current_gdbarch) + MIPS_SP_REGNUM,
+ cache->base);
return (*this_cache);
}
read_next_frame_reg (struct frame_info *fi, int regno)
{
/* Always a pseudo. */
- gdb_assert (regno >= NUM_REGS);
+ gdb_assert (regno >= gdbarch_num_regs (current_gdbarch));
if (fi == NULL)
{
LONGEST val;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $f0 and $f2\n");
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0,
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0,
8, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 2,
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0 + 2,
8, TARGET_BYTE_ORDER, readbuf ? readbuf + 8 : readbuf,
writebuf ? writebuf + 8 : writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $fp0\n");
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0,
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0,
TYPE_LENGTH (type),
TARGET_BYTE_ORDER, readbuf, writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float struct+%d\n",
offset);
- mips_xfer_register (regcache, NUM_REGS + regnum,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum,
TYPE_LENGTH (TYPE_FIELD_TYPE (type, field)),
TARGET_BYTE_ORDER, readbuf, writebuf, offset);
}
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return struct+%d:%d in $%d\n",
offset, xfer, regnum);
- mips_xfer_register (regcache, NUM_REGS + regnum, xfer,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum, xfer,
BFD_ENDIAN_UNKNOWN, readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return scalar+%d:%d in $%d\n",
offset, xfer, regnum);
- mips_xfer_register (regcache, NUM_REGS + regnum, xfer,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum, xfer,
TARGET_BYTE_ORDER, readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $fp0\n");
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0,
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0,
TYPE_LENGTH (type),
TARGET_BYTE_ORDER, readbuf, writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
{
case BFD_ENDIAN_LITTLE:
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0 +
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0 +
0, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0 +
- 1, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0 + 1,
+ 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
break;
case BFD_ENDIAN_BIG:
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0 +
- 1, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0 + 1,
+ 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0 +
- 0, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0 + 0,
+ 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
break;
default:
internal_error (__FILE__, __LINE__, _("bad switch"));
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float struct+%d\n",
offset);
- mips_xfer_register (regcache, NUM_REGS + regnum,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum,
TYPE_LENGTH (TYPE_FIELD_TYPE (type, field)),
TARGET_BYTE_ORDER, readbuf, writebuf, offset);
}
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return struct+%d:%d in $%d\n",
offset, xfer, regnum);
- mips_xfer_register (regcache, NUM_REGS + regnum, xfer,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum, xfer,
BFD_ENDIAN_UNKNOWN, readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return scalar+%d:%d in $%d\n",
offset, xfer, regnum);
- mips_xfer_register (regcache, NUM_REGS + regnum, xfer,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum, xfer,
TARGET_BYTE_ORDER, readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $fp0\n");
mips_xfer_register (regcache,
- NUM_REGS + mips_regnum (current_gdbarch)->fp0,
+ gdbarch_num_regs (current_gdbarch)
+ + mips_regnum (current_gdbarch)->fp0,
TYPE_LENGTH (type),
TARGET_BYTE_ORDER, readbuf, writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return scalar+%d:%d in $%d\n",
offset, xfer, regnum);
- mips_xfer_register (regcache, NUM_REGS + regnum, xfer,
+ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ + regnum, xfer,
TARGET_BYTE_ORDER, readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
/* For GP registers, we print a separate row of names above the vals */
for (col = 0, regnum = start_regnum;
- col < ncols && regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ col < ncols && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
if (*REGISTER_NAME (regnum) == '\0')
continue; /* unused register */
return regnum;
/* print the R0 to R31 names */
- if ((start_regnum % NUM_REGS) < MIPS_NUMREGS)
- fprintf_filtered (file, "\n R%-4d", start_regnum % NUM_REGS);
+ if ((start_regnum % gdbarch_num_regs (current_gdbarch)) < MIPS_NUMREGS)
+ fprintf_filtered (file, "\n R%-4d",
+ start_regnum % gdbarch_num_regs (current_gdbarch));
else
fprintf_filtered (file, "\n ");
/* now print the values in hex, 4 or 8 to the row */
for (col = 0, regnum = start_regnum;
- col < ncols && regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ col < ncols && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
if (*REGISTER_NAME (regnum) == '\0')
continue; /* unused register */
{
if (regnum != -1) /* do one specified register */
{
- gdb_assert (regnum >= NUM_REGS);
+ gdb_assert (regnum >= gdbarch_num_regs (current_gdbarch));
if (*(REGISTER_NAME (regnum)) == '\0')
error (_("Not a valid register for the current processor type"));
else
/* do all (or most) registers */
{
- regnum = NUM_REGS;
- while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ regnum = gdbarch_num_regs (current_gdbarch);
+ while (regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
if (TYPE_CODE (register_type (gdbarch, regnum)) ==
TYPE_CODE_FLT)
}
/* Convert a dbx stab register number (from `r' declaration) to a GDB
- [1 * NUM_REGS .. 2 * NUM_REGS) REGNUM. */
+ [1 * gdbarch_num_regs .. 2 * gdbarch_num_regs) REGNUM. */
static int
mips_stab_reg_to_regnum (int num)
else
/* This will hopefully (eventually) provoke a warning. Should
we be calling complaint() here? */
- return NUM_REGS + NUM_PSEUDO_REGS;
- return NUM_REGS + regnum;
+ return gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ return gdbarch_num_regs (current_gdbarch) + regnum;
}
/* Convert a dwarf, dwarf2, or ecoff register number to a GDB [1 *
- NUM_REGS .. 2 * NUM_REGS) REGNUM. */
+ gdbarch_num_regs .. 2 * gdbarch_num_regs) REGNUM. */
static int
mips_dwarf_dwarf2_ecoff_reg_to_regnum (int num)
else
/* This will hopefully (eventually) provoke a warning. Should we
be calling complaint() here? */
- return NUM_REGS + NUM_PSEUDO_REGS;
- return NUM_REGS + regnum;
+ return gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ return gdbarch_num_regs (current_gdbarch) + regnum;
}
static int
mips_register_sim_regno (int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < NUM_REGS);
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
/* FIXME: cagney/2002-05-13: Need to look at the pseudo register to
decide if it is valid. Should instead define a standard sim/gdb
register numbering scheme. */
- if (REGISTER_NAME (NUM_REGS + regnum) != NULL
- && REGISTER_NAME (NUM_REGS + regnum)[0] != '\0')
+ if (REGISTER_NAME (gdbarch_num_regs (current_gdbarch) + regnum) != NULL
+ && REGISTER_NAME (gdbarch_num_regs (current_gdbarch) + regnum)[0] != '\0')
return regnum;
else
return LEGACY_SIM_REGNO_IGNORE;
/* We find the appropriate instance of `struct sigcontext' at a
fixed offset in the signal frame. */
- sp = frame_unwind_register_signed (next_frame, MIPS_SP_REGNUM + NUM_REGS);
+ sp = frame_unwind_register_signed (next_frame,
+ MIPS_SP_REGNUM
+ + gdbarch_num_regs (current_gdbarch));
sigcontext_addr = sp + 32;
/* PC. */
regnum = mips_regnum (gdbarch)->pc;
- trad_frame_set_reg_addr (cache, regnum + NUM_REGS, sigcontext_addr + 16);
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (current_gdbarch),
+ sigcontext_addr + 16);
/* GPRs. */
for (regnum = MIPS_AT_REGNUM, addr = sigcontext_addr + 32;
regnum <= MIPS_RA_REGNUM; regnum++, addr += 8)
- trad_frame_set_reg_addr (cache, regnum + NUM_REGS, addr);
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (current_gdbarch),
+ addr);
/* HI and LO. */
regnum = mips_regnum (gdbarch)->lo;
- trad_frame_set_reg_addr (cache, regnum + NUM_REGS, sigcontext_addr + 280);
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (current_gdbarch),
+ sigcontext_addr + 280);
regnum = mips_regnum (gdbarch)->hi;
- trad_frame_set_reg_addr (cache, regnum + NUM_REGS, sigcontext_addr + 288);
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (current_gdbarch),
+ sigcontext_addr + 288);
/* TODO: Handle the floating-point registers. */
return;
}
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
monitor_fetch_register (regcache, regno);
}
else
return;
}
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
monitor_store_register (regcache, regno);
}
#include "parser-defs.h"
#include "gdbcmd.h"
#include "symfile.h" /* for overlay functions */
-#include "inferior.h" /* for NUM_PSEUDO_REGS. NOTE: replace
- with "gdbarch.h" when appropriate. */
+#include "inferior.h"
#include "doublest.h"
#include "gdb_assert.h"
#include "block.h"
/* Total size of the register space. The raw registers are mapped
directly onto the raw register cache while the pseudo's are
either mapped onto raw-registers or memory. */
- descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS;
- descr->sizeof_cooked_register_valid_p = NUM_REGS + NUM_PSEUDO_REGS;
+ descr->nr_cooked_registers = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ descr->sizeof_cooked_register_valid_p = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs
+ (current_gdbarch);
/* Fill in a table of register types. */
descr->register_type
/* Construct a strictly RAW register cache. Don't allow pseudo's
into the register cache. */
- descr->nr_raw_registers = NUM_REGS;
+ descr->nr_raw_registers = gdbarch_num_regs (current_gdbarch);
/* FIXME: cagney/2002-08-13: Overallocate the register_valid_p
array. This pretects GDB from erant code that accesses elements
- of the global register_valid_p[] array in the range [NUM_REGS
- .. NUM_REGS + NUM_PSEUDO_REGS). */
+ of the global register_valid_p[] array in the range
+ [gdbarch_num_regs .. gdbarch_num_regs + gdbarch_num_pseudo_regs). */
descr->sizeof_raw_register_valid_p = descr->sizeof_cooked_register_valid_p;
/* Lay out the register cache.
{
struct regcache_descr *descr = regcache_descr (gdbarch);
int size;
- gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
+ gdb_assert (regnum >= 0
+ && regnum < (gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch)));
size = descr->sizeof_register[regnum];
return size;
}
{
struct regcache_descr *descr;
/* The register buffers. A read-only register cache can hold the
- full [0 .. NUM_REGS + NUM_PSEUDO_REGS) while a read/write
- register cache can only hold [0 .. NUM_REGS). */
+ full [0 .. gdbarch_num_regs + gdbarch_num_pseudo_regs) while a read/write
+ register cache can only hold [0 .. gdbarch_num_regs). */
gdb_byte *registers;
/* Register cache status:
register_valid_p[REG] == 0 if REG value is not in the cache
memset (dst->registers, 0, dst->descr->sizeof_cooked_registers);
memset (dst->register_valid_p, 0, dst->descr->sizeof_cooked_register_valid_p);
/* Copy over any registers (identified by their membership in the
- save_reggroup) and mark them as valid. The full [0 .. NUM_REGS +
- NUM_PSEUDO_REGS) range is checked since some architectures need
+ save_reggroup) and mark them as valid. The full [0 .. gdbarch_num_regs +
+ gdbarch_num_pseudo_regs) range is checked since some architectures need
to save/restore `cooked' registers that live in memory. */
for (regnum = 0; regnum < dst->descr->nr_cooked_registers; regnum++)
{
doesn't make much sense. */
gdb_assert (!dst->readonly_p);
/* Copy over any registers, being careful to only restore those that
- were both saved and need to be restored. The full [0 .. NUM_REGS
- + NUM_PSEUDO_REGS) range is checked since some architectures need
+ were both saved and need to be restored. The full [0 .. gdbarch_num_regs
+ + gdbarch_num_pseudo_regs) range is checked since some architectures need
to save/restore `cooked' registers that live in memory. */
for (regnum = 0; regnum < dst->descr->nr_cooked_registers; regnum++)
{
regcache->descr->sizeof_raw_registers);
fprintf_unfiltered (file, "sizeof_raw_register_valid_p %ld\n",
regcache->descr->sizeof_raw_register_valid_p);
- fprintf_unfiltered (file, "NUM_REGS %d\n", NUM_REGS);
- fprintf_unfiltered (file, "NUM_PSEUDO_REGS %d\n", NUM_PSEUDO_REGS);
+ fprintf_unfiltered (file, "gdbarch_num_regs %d\n",
+ gdbarch_num_regs (current_gdbarch));
+ fprintf_unfiltered (file, "gdbarch_num_pseudo_regs %d\n",
+ gdbarch_num_pseudo_regs (current_gdbarch));
#endif
gdb_assert (regcache->descr->nr_cooked_registers
- == (NUM_REGS + NUM_PSEUDO_REGS));
+ == (gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch)));
for (regnum = -1; regnum < regcache->descr->nr_cooked_registers; regnum++)
{
/* Relative number. */
if (regnum < 0)
fprintf_unfiltered (file, " %4s", "Rel");
- else if (regnum < NUM_REGS)
+ else if (regnum < gdbarch_num_regs (current_gdbarch))
fprintf_unfiltered (file, " %4d", regnum);
else
- fprintf_unfiltered (file, " %4d", (regnum - NUM_REGS));
+ fprintf_unfiltered (file, " %4d",
+ (regnum - gdbarch_num_regs (current_gdbarch)));
/* Offset. */
if (regnum < 0)
float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
/* FIXME: cagney/2003-04-13: Can't yet use gdbarch_num_regs
(gdbarch), as not all architectures are multi-arch. */
- raw_p = regnum < NUM_REGS;
+ raw_p = regnum < gdbarch_num_regs (current_gdbarch);
if (group == float_reggroup)
return float_p;
if (group == vector_reggroup)
{
int regno;
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
m32r_fetch_register (regcache, regno);
}
{
int regno;
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
m32r_store_register (regcache, regno);
registers_changed ();
if (regno == -1)
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
mips_fetch_registers (regcache, regno);
return;
}
if (regno == -1)
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
mips_store_registers (regcache, regno);
return;
}
one2one_register_sim_regno (int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < NUM_REGS);
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
return regnum;
}
{
if (regno == -1)
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
gdbsim_fetch_register (regcache, regno);
return;
}
static int warn_user = 1;
char buf[MAX_REGISTER_SIZE];
int nr_bytes;
- gdb_assert (regno >= 0 && regno < NUM_REGS);
+ gdb_assert (regno >= 0 && regno < gdbarch_num_regs (current_gdbarch));
memset (buf, 0, MAX_REGISTER_SIZE);
nr_bytes = sim_fetch_register (gdbsim_desc,
REGISTER_SIM_REGNO (regno),
{
if (regno == -1)
{
- for (regno = 0; regno < NUM_REGS; regno++)
+ for (regno = 0; regno < gdbarch_num_regs (current_gdbarch); regno++)
gdbsim_store_register (regcache, regno);
return;
}
long sizeof_g_packet;
/* Description of the remote protocol registers indexed by REGNUM
- (making an array NUM_REGS in size). */
+ (making an array gdbarch_num_regs in size). */
struct packet_reg *regs;
/* This is the size (in chars) of the first response to the ``g''
/* Use the architecture to build a regnum<->pnum table, which will be
1:1 unless a feature set specifies otherwise. */
- rsa->regs = GDBARCH_OBSTACK_CALLOC (gdbarch, NUM_REGS, struct packet_reg);
- for (regnum = 0; regnum < NUM_REGS; regnum++)
+ rsa->regs = GDBARCH_OBSTACK_CALLOC (gdbarch,
+ gdbarch_num_regs (current_gdbarch),
+ struct packet_reg);
+ for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
{
struct packet_reg *r = &rsa->regs[regnum];
with a remote protocol number, in order of ascending protocol
number. */
- remote_regs = alloca (NUM_REGS * sizeof (struct packet_reg *));
- for (num_remote_regs = 0, regnum = 0; regnum < NUM_REGS; regnum++)
+ remote_regs = alloca (gdbarch_num_regs (current_gdbarch)
+ * sizeof (struct packet_reg *));
+ for (num_remote_regs = 0, regnum = 0;
+ regnum < gdbarch_num_regs (current_gdbarch);
+ regnum++)
if (rsa->regs[regnum].pnum != -1)
remote_regs[num_remote_regs++] = &rsa->regs[regnum];
static struct packet_reg *
packet_reg_from_regnum (struct remote_arch_state *rsa, long regnum)
{
- if (regnum < 0 && regnum >= NUM_REGS)
+ if (regnum < 0 && regnum >= gdbarch_num_regs (current_gdbarch))
return NULL;
else
{
packet_reg_from_pnum (struct remote_arch_state *rsa, LONGEST pnum)
{
int i;
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
{
struct packet_reg *r = &rsa->regs[i];
if (r->pnum == pnum)
{
rsa->sizeof_g_packet = buf_len / 2;
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
{
if (rsa->regs[i].pnum == -1)
continue;
{
int i;
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
{
struct packet_reg *r = &rsa->regs[i];
if (r->in_g_packet)
fetch_registers_using_g (regcache);
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (!rsa->regs[i].in_g_packet)
if (!fetch_register_using_p (regcache, &rsa->regs[i]))
{
case PACKET_DISABLE:
case PACKET_SUPPORT_UNKNOWN:
/* Make sure all the necessary registers are cached. */
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (rsa->regs[i].in_g_packet)
regcache_raw_read (regcache, rsa->regs[i].regnum, buf);
break;
int i;
regs = alloca (rsa->sizeof_g_packet);
memset (regs, 0, rsa->sizeof_g_packet);
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
{
struct packet_reg *r = &rsa->regs[i];
if (r->in_g_packet)
store_registers_using_G (regcache);
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
if (!rsa->regs[i].in_g_packet)
if (!store_register_using_P (regcache, &rsa->regs[i]))
/* See above for why we do not issue an error here. */
/* Bogus register number. */
else if (nr < 0)
{
- if (regno >= NUM_REGS)
+ if (regno >= gdbarch_num_regs (current_gdbarch))
fprintf_unfiltered (gdb_stderr,
"gdb error: register no %d not implemented.\n",
regno);
/* Bogus register number. */
else if (nr < 0)
{
- if (regno >= NUM_REGS)
+ if (regno >= gdbarch_num_regs (current_gdbarch))
fprintf_unfiltered (gdb_stderr,
"gdb error: register no %d not implemented.\n",
regno);
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int sim_regno;
- gdb_assert (0 <= reg && reg <= NUM_REGS + NUM_PSEUDO_REGS);
+ gdb_assert (0 <= reg
+ && reg <= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch));
sim_regno = tdep->sim_regno[reg];
if (sim_regno >= 0)
{
/* All the sh64-compact mode registers are pseudo registers. */
- if (regnum < NUM_REGS
- || regnum >= NUM_REGS + NUM_PSEUDO_REGS_SH_MEDIA
- + NUM_PSEUDO_REGS_SH_COMPACT)
+ if (regnum < gdbarch_num_regs (current_gdbarch)
+ || regnum >= gdbarch_num_regs (current_gdbarch)
+ + NUM_PSEUDO_REGS_SH_MEDIA
+ + NUM_PSEUDO_REGS_SH_COMPACT)
internal_error (__FILE__, __LINE__,
_("Invalid pseudo register number %d\n"), regnum);
sh64_print_register (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, int regnum)
{
- if (regnum < 0 || regnum >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (regnum < 0 || regnum >= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
internal_error (__FILE__, __LINE__,
_("Invalid register number %d\n"), regnum);
- else if (regnum >= 0 && regnum < NUM_REGS)
+ else if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch))
{
if (TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT)
sh64_do_fp_register (gdbarch, file, frame, regnum); /* FP regs */
sh64_do_register (gdbarch, file, frame, regnum);
}
- else if (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
sh64_do_pseudo_register (gdbarch, file, frame, regnum);
}
/* do all (or most) registers */
{
regnum = 0;
- while (regnum < NUM_REGS)
+ while (regnum < gdbarch_num_regs (current_gdbarch))
{
/* If the register name is empty, it is undefined for this
processor, so don't display anything. */
}
if (fpregs)
- while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ while (regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
sh64_do_pseudo_register (gdbarch, file, frame, regnum);
regnum++;
/* do all compact registers */
{
regnum = R0_C_REGNUM;
- while (regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ while (regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
sh64_do_pseudo_register (gdbarch, file, frame, regnum);
regnum++;
SYMBOL_TYPE (sym) = read_type (&p, objfile);
SYMBOL_CLASS (sym) = LOC_REGPARM;
SYMBOL_VALUE (sym) = STAB_REG_TO_REGNUM (valu);
- if (SYMBOL_VALUE (sym) >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (SYMBOL_VALUE (sym) >= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
reg_value_complaint (SYMBOL_VALUE (sym),
- NUM_REGS + NUM_PSEUDO_REGS,
+ gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch),
SYMBOL_PRINT_NAME (sym));
SYMBOL_VALUE (sym) = SP_REGNUM; /* Known safe, though useless */
}
SYMBOL_TYPE (sym) = read_type (&p, objfile);
SYMBOL_CLASS (sym) = LOC_REGISTER;
SYMBOL_VALUE (sym) = STAB_REG_TO_REGNUM (valu);
- if (SYMBOL_VALUE (sym) >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (SYMBOL_VALUE (sym) >= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
reg_value_complaint (SYMBOL_VALUE (sym),
- NUM_REGS + NUM_PSEUDO_REGS,
+ gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch),
SYMBOL_PRINT_NAME (sym));
SYMBOL_VALUE (sym) = SP_REGNUM; /* Known safe, though useless */
}
SYMBOL_TYPE (sym) = read_type (&p, objfile);
SYMBOL_CLASS (sym) = LOC_REGPARM_ADDR;
SYMBOL_VALUE (sym) = STAB_REG_TO_REGNUM (valu);
- if (SYMBOL_VALUE (sym) >= NUM_REGS + NUM_PSEUDO_REGS)
+ if (SYMBOL_VALUE (sym) >= gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
reg_value_complaint (SYMBOL_VALUE (sym),
- NUM_REGS + NUM_PSEUDO_REGS,
+ gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch),
SYMBOL_PRINT_NAME (sym));
SYMBOL_VALUE (sym) = SP_REGNUM; /* Known safe, though useless */
}
}
count = 0;
- numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
for (i = 0; i < numregs; i++)
if (i != SP_REGNUM
&& gdbarch_register_reggroup_p (current_gdbarch, i, all_reggroup))
htab_remove_elt (reg_hash, reg);
/* Assign numbers to the remaining registers and add them to the
- list of registers. The new numbers are always above NUM_REGS.
+ list of registers. The new numbers are always above gdbarch_num_regs.
Iterate over the features, not the hash table, so that the order
matches that in the target description. */
const struct target_desc *target_current_description (void);
/* Record architecture-specific functions to call for pseudo-register
- support. If tdesc_use_registers is called and NUM_PSEUDO_REGS
+ support. If tdesc_use_registers is called and gdbarch_num_pseudo_regs
is greater than zero, then these should be called as well.
They are equivalent to the gdbarch methods with similar names,
except that they will only be called for pseudo registers. */
/* Update GDBARCH to use the target description for registers. Fixed
register assignments are taken from EARLY_DATA, which is freed.
All registers which have not been assigned fixed numbers are given
- numbers above the current value of NUM_REGS. NUM_REGS and various
- register-related predicates are updated to refer to the target
- description. This function should only be called from the
- architecture's gdbarch initialization routine, and only after
+ numbers above the current value of gdbarch_num_regs.
+ gdbarch_num_regs and various register-related predicates are updated to
+ refer to the target description. This function should only be called from
+ the architecture's gdbarch initialization routine, and only after
successfully validating the required registers. */
void tdesc_use_registers (struct gdbarch *gdbarch,
struct regcache *regcache, int regno)
{
fprintf_unfiltered (gdb_stdlog, "%s ", func);
- if (regno >= 0 && regno < NUM_REGS + NUM_PSEUDO_REGS
+ if (regno >= 0 && regno < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch)
&& REGISTER_NAME (regno) != NULL && REGISTER_NAME (regno)[0] != '\0')
fprintf_unfiltered (gdb_stdlog, "(%s)", REGISTER_NAME (regno));
else
if (0 == strncasecmp ("$reg", action_exp, 4))
{
- for (i = 0; i < NUM_REGS; i++)
+ for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
add_register (collect, i);
action_exp = strchr (action_exp, ','); /* more? */
}
{
int regnum;
struct gdbarch *gdbarch = get_frame_arch (next_frame);
- int numregs = NUM_REGS + NUM_PSEUDO_REGS;
+ int numregs = gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
struct trad_frame_saved_reg *this_saved_regs
= FRAME_OBSTACK_CALLOC (numregs, struct trad_frame_saved_reg);
for (regnum = 0; regnum < numregs; regnum++)
/* See how many registers must be displayed. */
nr_regs = 0;
- for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
/* Must be in the group and have a name. */
if (gdbarch_register_reggroup_p (gdbarch, regnum, group)
/* Now set the register names and values */
pos = 0;
- for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ regnum++)
{
struct tui_gen_win_info *data_item_win;
struct tui_data_element *data;
/* A table of user registers.
User registers have regnum's that live above of the range [0
- .. NUM_REGS + NUM_PSEUDO_REGS) (which is controlled by the target).
+ .. gdbarch_num_regs + gdbarch_num_pseudo_regs)
+ (which is controlled by the target).
The target should never see a user register's regnum value.
Always append, never delete. By doing this, the relative regnum
- (offset from NUM_REGS + NUM_PSEUDO_REGS) assigned to each user
- register never changes. */
+ (offset from gdbarch_num_regs + gdbarch_num_pseudo_regs)
+ assigned to each user register never changes. */
struct user_reg
{
if ((len < 0 && strcmp (reg->name, name))
|| (len == strlen (reg->name)
&& strncmp (reg->name, name, len) == 0))
- return NUM_REGS + NUM_PSEUDO_REGS + nr;
+ return gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch) + nr;
}
}
specific registers are present when the architecture is selected.
These registers are assigned register numbers outside the
- architecture's register range [0 .. NUM_REGS + NUM_PSEUDO_REGS).
+ architecture's register range
+ [0 .. gdbarch_num_regs + gdbarch_num_pseudo_regs].
Their values should be constructed using per-frame information. */
/* TODO: cagney/2003-06-27: Need to think more about how these
regcache_raw_supply (regcache, r, context_offset);
else
{
- for (r = 0; r < NUM_REGS; r++)
+ for (r = 0; r < gdbarch_num_regs (current_gdbarch); r++)
do_win32_fetch_inferior_registers (regcache, r);
}
((char *) ¤t_thread->context) + mappings[r]);
else
{
- for (r = 0; r < NUM_REGS; r++)
+ for (r = 0; r < gdbarch_num_regs (current_gdbarch); r++)
do_win32_store_inferior_registers (regcache, r);
}
}
error (_("Core file register section too small (%u bytes)."), core_reg_size);
return;
}
- for (r = 0; r < NUM_REGS; r++)
+ for (r = 0; r < gdbarch_num_regs (current_gdbarch); r++)
regcache_raw_supply (regcache, r, core_reg_sect + mappings[r]);
}
regcache_raw_supply (regcache, r, context_offset);
else
{
- for (r = 0; r < NUM_REGS; r++)
+ for (r = 0; r < gdbarch_num_regs (current_gdbarch); r++)
do_win32_fetch_inferior_registers (regcache, r);
}
((char *) ¤t_thread->context) + mappings[r]);
else
{
- for (r = 0; r < NUM_REGS; r++)
+ for (r = 0; r < gdbarch_num_regs (current_gdbarch); r++)
do_win32_store_inferior_registers (regcache, r);
}
}
error (_("Core file register section too small (%u bytes)."), core_reg_size);
return;
}
- for (r = 0; r < NUM_REGS; r++)
+ for (r = 0; r < gdbarch_num_regs (current_gdbarch); r++)
regcache_raw_supply (regcache, r, core_reg_sect + mappings[r]);
}
xtensa_register_name (int regnum)
{
/* Return the name stored in the register map. */
- if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
return REGMAP[regnum].name;
/* Invalid register number. */
return lookup_pointer_type (builtin_type_void);
/* Return the stored type for all other registers. */
- else if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
xtensa_register_t* reg = ®MAP[regnum];
if (regnum >= 0 && regnum < 16)
return A0_BASE + regnum;
- for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
+ for (i = 0;
+ i < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch);
+ i++)
if (regnum == REGMAP[i].target_number)
return i;
}
/* We can always read 'regular' registers. */
- if (regnum >= 0 && regnum < NUM_REGS)
+ if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch))
regcache_raw_read (regcache, regnum, buffer);
/* Pseudo registers. */
- else if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum >= 0
+ && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
xtensa_register_t *reg = ®MAP[regnum];
xtensa_register_type_t type = reg->type;
/* We can always write 'core' registers.
Note: We might have converted Ax->ARy. */
- if (regnum >= 0 && regnum < NUM_REGS)
+ if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch))
regcache_raw_write (regcache, regnum, buffer);
/* Pseudo registers. */
- else if (regnum >= 0 && regnum < NUM_REGS + NUM_PSEUDO_REGS)
+ else if (regnum >= 0
+ && regnum < gdbarch_num_regs (current_gdbarch)
+ + gdbarch_num_pseudo_regs (current_gdbarch))
{
xtensa_register_t *reg = ®MAP[regnum];
xtensa_register_type_t type = reg->type;
if (group == vector_reggroup || group == xtensa_vectra_reggroup)
return rg & xtRegisterGroupVectra;
if (group == save_reggroup || group == restore_reggroup)
- return (regnum < NUM_REGS
+ return (regnum < gdbarch_num_regs (current_gdbarch)
&& (reg->flags & SAVE_REST_FLAGS) == SAVE_REST_VALID);
else
return 1;
#define REGMAP_BYTES (gdbarch_tdep (current_gdbarch)->regmap_bytes)
#define A0_BASE (gdbarch_tdep (current_gdbarch)->a0_base)
#define AR_BASE (gdbarch_tdep (current_gdbarch)->ar_base)
-#define FP_ALIAS (NUM_REGS + NUM_PSEUDO_REGS)
+#define FP_ALIAS \
+ (gdbarch_num_regs (current_gdbarch) \
+ + gdbarch_num_pseudo_regs (current_gdbarch))
#define CALL_ABI (gdbarch_tdep (current_gdbarch)->call_abi)
#define NUM_CONTEXTS (gdbarch_tdep (current_gdbarch)->num_contexts)
projects / binutils-gdb.git / commitdiff