gas/testsuite/

2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: Add cmpxchg16b.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CMPXCHG8B_Fixup): New.
	(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4e8b4ff9002469c2569b763c3bdc7c54bda8b90b..cfd50e7524122784a10efd063e7913537d56f529 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/x86-64-inval.s: Add cmpxchg16b.
+       * gas/i386/x86_64.s: Likewise.
+       * gas/i386/x86-64-inval.l: Updated.
+       * gas/i386/x86_64.d: Likewise.
+
 2006-12-13  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR gas/3712

diff --git a/gas/testsuite/gas/i386/x86-64-inval.l b/gas/testsuite/gas/i386/x86-64-inval.l
index 2e45b4674c878958b3600ab26efa83739e2ac114..2cbb867cdbe7520d5e9b96355151de12506cfda2 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-inval.l
+++ b/gas/testsuite/gas/i386/x86-64-inval.l
@@ -49,6 +49,7 @@
 .*:50: Error: .*
 .*:51: Error: .*
 .*:52: Error: .*
+.*:54: Error: .*
 GAS LISTING .*
 
 
@@ -104,3 +105,5 @@ GAS LISTING .*
   50 [         ]*popfl         # can't have 32-bit stack operands
   51 [         ]*retl          # can't have 32-bit stack operands
   52 [         ]*insertq \$4,\$2,%xmm2,%ebx # The last operand must be XMM register.
+  53 [         ]*.intel_syntax noprefix
+  54 [         ]*cmpxchg16b dword ptr \[rax\] # Must be xmmword

diff --git a/gas/testsuite/gas/i386/x86-64-inval.s b/gas/testsuite/gas/i386/x86-64-inval.s
index 68f4cb5ed01ddf38ce1f037fb324233134a53773..7178edeb0bad54faa5fffab816746718db74ffa5 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-inval.s
+++ b/gas/testsuite/gas/i386/x86-64-inval.s
@@ -50,3 +50,5 @@ foo:  jcxz foo        # No prefix exists to select CX as a counter
        popfl           # can't have 32-bit stack operands
        retl            # can't have 32-bit stack operands
        insertq $4,$2,%xmm2,%ebx # The last operand must be XMM register.
+       .intel_syntax noprefix
+       cmpxchg16b dword ptr [rax] # Must be xmmword

diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index cdd49ef3431f3e5cdd627bd7526c90e5f1a943de..1289b45c4f62b92d5f97c3b43ad97886c93fc345 100644 (file)
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -156,4 +156,6 @@ Disassembly of section .text:
  2fc:  66 89 04 25 11 22 33 ff         mov[    ]+%ax,0xffffffffff332211
  304:  89 04 25 11 22 33 ff    mov[    ]+%eax,0xffffffffff332211
  30b:  48 89 04 25 11 22 33 ff         mov[    ]+%rax,0xffffffffff332211
+ 313:  48 0f c7 08[    ]+cmpxchg16b \(%rax\)
+ 317:  48 0f c7 08[    ]+cmpxchg16b \(%rax\)
 #pass

diff --git a/gas/testsuite/gas/i386/x86_64.s b/gas/testsuite/gas/i386/x86_64.s
index 3e5532ab297bafa18cd9b50f4b677c71bf1452e2..c89d3934844fb6e02964a394a14648fd77c58518 100644 (file)
--- a/gas/testsuite/gas/i386/x86_64.s
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -188,5 +188,10 @@ movw %ax,0xffffffffff332211
 movl %eax,0xffffffffff332211
 movq %rax,0xffffffffff332211
 
+cmpxchg16b (%rax)
+
+.intel_syntax noprefix
+cmpxchg16b xmmword ptr [rax]
+
 # Get a good alignment.
  .p2align      4,0

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 97fcec5168f57ac96a9b41cd1efae9b9bacba5a3..9bebc480cd23de0ac53957adec77453404e85f11 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (CMPXCHG8B_Fixup): New.
+       (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
+
 2006-12-11  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-dis.c (Eq): Replaced by ...

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 8b6f532aabe5cb93199cb9bac0e83f48a2bbbe46..009d0f6358967a34e48358733cffec970d324013 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -104,6 +104,7 @@ static void INVLPG_Fixup (int, int);
 static void BadOp (void);
 static void VMX_Fixup (int, int);
 static void REP_Fixup (int, int);
+static void CMPXCHG8B_Fixup (int, int);
 
 struct dis_private {
   /* Points to first byte not fetched.  */
@@ -1638,7 +1639,7 @@ static const struct dis386 grps[][8] = {
   /* GRP9 */
   {
     { "(bad)", XX, XX, XX, XX },
-    { "cmpxchg8b", Mq, XX, XX, XX },
+    { "cmpxchg8b", CMPXCHG8B_Fixup, q_mode, XX, XX, XX },
     { "(bad)", XX, XX, XX, XX },
     { "(bad)", XX, XX, XX, XX },
     { "(bad)", XX, XX, XX, XX },
@@ -5767,3 +5768,17 @@ REP_Fixup (int bytemode, int sizeflag)
       break;
     }
 }
+
+static void
+CMPXCHG8B_Fixup (int bytemode, int sizeflag)
+{
+  USED_REX (REX_MODE64);
+  if (rex & REX_MODE64)
+    {
+      /* Change cmpxchg8b to cmpxchg16b.  */
+      char *p = obuf + strlen (obuf) - 2;
+      strcpy (p, "16b");
+      bytemode = x_mode;
+    }
+  OP_M (bytemode, sizeflag);
+}