offset computation, thus they are best placed in EXT0xx.
-
+# Tables
+
+The original tables are available publicly as as CSV file at
+<https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/rfc/ls012/optable.csv;hb=HEAD>.
+A python program auto-generates the tables in the following sections
+by sorting into different useful priorities.
+
+The key to headings and sections are as follows:
+
+* **Area** - Target Area as described in above sections
+* **XO Cost** - the number of bits required in the XO Field. whilst not
+ the full picture it is a good indicator as to how costly in terms
+ of Opcode Allocation a given instruction will be. Lower number is
+ a higher cost for the Power ISA's precious remaining Opcode space
+* **rfc** the Libre-SOC External RFC resource,
+ <https://libre-soc.org/openpower/sv/rfc/> where advance notice of
+ upcoming RFCs in development may be found.
+ *Reading advance Draft RFCs and providing feedback strongly advised*,
+ it saves time and effort for the OPF ISA Workgroup.
+* **SVP64** - Vectoriseable (SVP64-Prefixable) - also implies that
+ SVP64Single is also permitted (required).
+* **page** - Libre-SOC wiki page at which further information can
+ be found. Again: **advance reading strongly advised due to the
+ sheer volume of information**.
+* **PO1** - the instruction is capable of being PO1-Prefixed
+ (given an EXT1xx Opcode Allocation). Bear in mind that this option
+ is **mutually exclusively incompatible** with Vectorisation.
+* **group** - the Primary Opcode Group recommended for this instruction.
+ Options are EXT0xx (EXT000-EXT063), EXT1xx and EXT2xx. A third area,
+ EXT3xx, was available in an early Draft RFC but has been made "RESERVED"
+ instead. see [[sv/po9_encoding]].
[[!inline pages="openpower/sv/rfc/ls012/areas.mdwn" raw=yes ]]
[[!inline pages="openpower/sv/rfc/ls012/xo_cost.mdwn" raw=yes ]]