More unused
authorEddie Hung <eddie@fpgeh.com>
Thu, 11 Apr 2019 23:20:43 +0000 (16:20 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 11 Apr 2019 23:20:43 +0000 (16:20 -0700)
passes/techmap/pmux2shiftx.cc

index 08cb06d5fd3239e6ac7b3540ef8a423e53af343e..f8cdf578315b2bf00b5b7e965536e56bc544571c 100644 (file)
@@ -62,7 +62,6 @@ struct Pmux2ShiftxPass : public Pass {
                                shiftx_a.append(cell->getPort("\\A"));
                                pmux_s.append(module->Not(NEW_ID, module->ReduceOr(NEW_ID, cell->getPort("\\S"))));
                        }
-                       const int width = cell->getParam("\\WIDTH").as_int();
                        const int clog2width = ceil(log2(s_width));
 
                        RTLIL::SigSpec pmux_b;