Fix arm-aout failures
authorNick Clifton <nickc@redhat.com>
Thu, 22 Aug 2002 16:10:05 +0000 (16:10 +0000)
committerNick Clifton <nickc@redhat.com>
Thu, 22 Aug 2002 16:10:05 +0000 (16:10 +0000)
14 files changed:
gas/testsuite/ChangeLog
gas/testsuite/gas/arm/arch5tej.d
gas/testsuite/gas/arm/arch5tej.s
gas/testsuite/gas/arm/arm.exp
gas/testsuite/gas/arm/arm7t.d
gas/testsuite/gas/arm/arm7t.s
gas/testsuite/gas/arm/armv1.d
gas/testsuite/gas/arm/armv1.s
gas/testsuite/gas/arm/fpa-mem.d
gas/testsuite/gas/arm/fpa-mem.s
gas/testsuite/gas/arm/vfp1.d
gas/testsuite/gas/arm/vfp1.s
gas/testsuite/gas/arm/xscale.d
gas/testsuite/gas/arm/xscale.s

index 5de9b6f0bdf91c430a27f7d7c6d1f96fc3d180b6..3c9a7c541bb0ab2435496fcb99783d505be6fe66 100644 (file)
@@ -1,3 +1,20 @@
+2002-08-22  Nick Clifton  <nickc@redhat.com>
+
+       * gas/arm/arch5tej.s: Add nops to align output.
+       * gas/arm/arch5tej.d: Expect nops.
+        * gas/arm/arm7t.s: Add nops, remove thumb instructions.
+        * gas/arm/arm7t.d: Expect nops.
+        * gas/arm/armv1.s: Add nops.
+        * gas/arm/armv1.d: Expect nops.
+        * gas/arm/fpa-mem.s: Add nops.
+        * gas/arm/fpa-mem.d: Expext nops.
+        * gas/arm/vfp1.s: Add nops.
+        * gas/arm/vfp1.d: Expect nops.
+        * gas/arm/xscale.s: Add nops.
+        * gas/arm/xscale.d: Expect nops.
+        * gas/arm/arm.exp: Do not run thumb tests for arm-aout
+       toolchain.
+
 2002-08-22  Alan Modra  <amodra@bigpond.net.au>
 
        * gas/ppc/ppc.exp: Don't run e500 test on xcoff targets.
index a4bcddeab14925f785d27838d14d9ed8ab209414..9afdc6e12a1098a70ade3b045aa441f0be65f6cf 100644 (file)
@@ -13,3 +13,5 @@ Disassembly of section .text:
 0+0c <[^>]*> 012fff20 ?        bxjeq   r0
 0+10 <[^>]*> 412fff20 ?        bxjmi   r0
 0+14 <[^>]*> 512fff27 ?        bxjpl   r7
+0+18 <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
+0+1c <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
index f4735ff3d3c3145357ab4eb24e38296cd0725934..d4f95228a4ea6b7a4bc3c4beedeb94ebfe403f43 100644 (file)
@@ -7,3 +7,8 @@ label:
        bxjeq   r0
        bxjmi   r0
        bxjpl   r7
+       
+       # Add two nop instructions to ensure that the output
+       # is aligned as will automatically be done for arm-aout.
+       nop
+       nop
index 3d0647871da2299782ecf5d389aa61659381a630..2bff85ffecc21e05ef35fdbd25e8ab35e424761f 100644 (file)
@@ -31,7 +31,10 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
 
     run_dump_test "arm7t"
 
-    gas_test "thumb.s" "-mcpu=arm7t" $stdoptlist "Thumb instructions"
+    if {! [istarget arm*-*-aout]} then {
+       # The arm-aout port does not support Thumb mode.
+       gas_test "thumb.s" "-mcpu=arm7t" $stdoptlist "Thumb instructions"
+    }
 
     gas_test "arch4t.s" "-march=armv4t" $stdoptlist "Arm architecture 4t instructions"
 
index 857a9b57cf102b2f7492dcc1314afbc7c4563a27..148e047765e9f3884531d786109e490667815412 100644 (file)
@@ -66,5 +66,5 @@ Disassembly of section .text:
 [              ]*dc:.*fred
 0+e0 <[^>]*> 0000c0de ?        .*
 0+e4 <[^>]*> 0000dead ?        .*
-0+e8 <[^>]*> 3800              sub     r0, #0
-0+ea <[^>]*> 3000              add     r0, #0
+0+e8 <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
+0+ec <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
index f3251117d1877c3bf490e31ab8b7bc60f7fa21ed..580c3f11a8ed153dbb640593e3ee407b880c1407 100644 (file)
@@ -74,9 +74,8 @@ misc:
        .word   fred
        
        .ltorg
-       .thumb
-       .global thumb_tests
-       .thumb_func
-thumb_tests:   
-       sub     r0, #0
-       add     r0, #0
+
+       # Add two nop instructions to ensure that the
+       # output is 32-byte aligned as required for arm-aout.
+       nop
+       nop
index 443264079e81d3b75cc75ca2841fba000dcb0686..f3b2c6b6c93efb4d8630f6bed57723307aa7a589 100644 (file)
@@ -68,3 +68,6 @@ Disassembly of section .text:
 0+e8 <[^>]*> e8100001 ?        ldmda   r0, {r0}
 0+ec <[^>]*> e9100001 ?        ldmdb   r0, {r0}
 0+f0 <[^>]*> e9900001 ?        ldmib   r0, {r0}
+0+f4 <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
+0+f8 <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
+0+fc <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
index b4b7b5af3b751b6ec966e2b8f3567d0e28eed8d5..bd83639dbbc719ec40be307dbbe56bb33fa7e11c 100644 (file)
@@ -68,3 +68,9 @@ entry:
        ldmfa   r0, {r0}
        ldmea   r0, {r0}
        ldmed   r0, {r0}
+
+       # Add three nop instructions to ensure that the
+       # output is 32-byte aligned as required for arm-aout.
+       nop
+       nop
+       nop
index 12ee585708497d96a882f967ac982075b942a397..b0f9e0df3db5b445846d4e0c9024d4db436d9baf 100644 (file)
@@ -30,3 +30,5 @@ Disassembly of section .text:
 0+4c <[^>]*> ed800200 ?        sfm     f0, 4, \[r0\]
 0+50 <[^>]*> ed00020c ?        sfm     f0, 4, \[r0, -#48\]
 0+54 <[^>]*> ed800200 ?        sfm     f0, 4, \[r0\]
+0+58 <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
+0+5c <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
index eb66fdb917dacf376f4b8d7f1a8c9e3c19cd4d8d..dfc9b6564c43acb06525ec16aa8687b4ea9d3b14 100644 (file)
@@ -24,3 +24,8 @@ F:
        sfm     f0, 4, [r0]
        sfmfd   f0, 4, [r0]
        sfmea   f0, 4, [r0]
+       
+       # Add two nop instructions to ensure that the
+       # output is 32-byte aligned as required for arm-aout.
+       nop
+       nop
index 0df8c54c9b270da7d0d286d9eafe304c2d41d6ca..ed4f3838ea63bbe662d0aa086acc43b0812d588f 100644 (file)
@@ -188,3 +188,6 @@ Disassembly of section .text:
 0+2c8 <[^>]*> 0e1f7b10         fmrdleq r7, d15
 0+2cc <[^>]*> 0e21fb10         fmdhreq d1, pc
 0+2d0 <[^>]*> 0e0f1b10         fmdlreq d15, r1
+0+2d4 <[^>]*> e1a00000 ?       nop[    ]+\(mov r0,r0\)
+0+2d8 <[^>]*> e1a00000 ?       nop[    ]+\(mov r0,r0\)
+0+2dc <[^>]*> e1a00000 ?       nop[    ]+\(mov r0,r0\)
index 9853baeede63355b68fd18b104277431f8df35f8..1a80877c6228441f358a1bbbe12982e98913b971 100644 (file)
@@ -276,3 +276,9 @@ F:
 
        fmdhreq d1, r15
        fmdlreq d15, r1
+
+       # Add three nop instructions to ensure that the
+       # output is 32-byte aligned as required for arm-aout.
+       nop
+       nop
+       nop
index bd4e06af09de9b46420379558376622fd91c708f..433c6c5b11ae4653273f15fc617724f3c9c0c9eb 100644 (file)
@@ -33,3 +33,5 @@ Disassembly of section .text:
 0+5c <[^>]*> e5910000  ldr     r0, \[r1\]
 0+60 <[^>]*> e5832000  str     r2, \[r3\]
 0+64 <[^>]*> e321f011  msr     CPSR_c, #17     ; 0x11
+0+68 <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
+0+6c <[^>]*> e1a00000 ?        nop[    ]+\(mov r0,r0\)
index d78d9a742400507ccc41f3330cf90ff887d99f4c..7b58c344cef084889373935b93ee05db031634f3 100644 (file)
@@ -35,3 +35,8 @@ foo:
        str     r2, [r3]
 
        msr     cpsr_ctl, #0x11
+
+       # Add two nop instructions to ensure that the
+       # output is 32-byte aligned as required for arm-aout.
+       nop
+       nop