prog_data->binding_table.image_start = bias;
}
-static struct anv_shader_bin *
-anv_pipeline_upload_kernel(struct anv_pipeline *pipeline,
- struct anv_pipeline_cache *cache,
- const void *key_data, uint32_t key_size,
- const void *kernel_data, uint32_t kernel_size,
- const void *constant_data,
- uint32_t constant_data_size,
- const struct brw_stage_prog_data *prog_data,
- uint32_t prog_data_size,
- const struct anv_pipeline_bind_map *bind_map)
-{
- if (cache) {
- return anv_pipeline_cache_upload_kernel(cache, key_data, key_size,
- kernel_data, kernel_size,
- constant_data, constant_data_size,
- prog_data, prog_data_size,
- bind_map);
- } else {
- return anv_shader_bin_create(pipeline->device, key_data, key_size,
- kernel_data, kernel_size,
- constant_data, constant_data_size,
- prog_data, prog_data_size,
- prog_data->param, bind_map);
- }
-}
-
-
static void
anv_pipeline_add_compiled_stage(struct anv_pipeline *pipeline,
gl_shader_stage stage,
anv_pipeline_hash_shader(pipeline, layout, module, entrypoint,
MESA_SHADER_VERTEX, spec_info,
&key, sizeof(key), sha1);
- if (cache)
- bin = anv_pipeline_cache_search(cache, sha1, 20);
+ bin = anv_device_search_for_kernel(pipeline->device, cache, sha1, 20);
if (bin == NULL) {
struct brw_vs_prog_data prog_data = {};
}
unsigned code_size = prog_data.base.base.program_size;
- bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20,
- shader_code, code_size,
- nir->constant_data,
- nir->constant_data_size,
- &prog_data.base.base, sizeof(prog_data),
- &map);
+ bin = anv_device_upload_kernel(pipeline->device, cache, sha1, 20,
+ shader_code, code_size,
+ nir->constant_data,
+ nir->constant_data_size,
+ &prog_data.base.base, sizeof(prog_data),
+ &map);
if (!bin) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
memcpy(&tcs_sha1[20], tes_sha1, 20);
memcpy(&tes_sha1[20], tcs_sha1, 20);
- if (cache) {
- tcs_bin = anv_pipeline_cache_search(cache, tcs_sha1, sizeof(tcs_sha1));
- tes_bin = anv_pipeline_cache_search(cache, tes_sha1, sizeof(tes_sha1));
- }
+ tcs_bin = anv_device_search_for_kernel(pipeline->device, cache,
+ tcs_sha1, sizeof(tcs_sha1));
+ tes_bin = anv_device_search_for_kernel(pipeline->device, cache,
+ tes_sha1, sizeof(tes_sha1));
if (tcs_bin == NULL || tes_bin == NULL) {
struct brw_tcs_prog_data tcs_prog_data = {};
}
unsigned code_size = tcs_prog_data.base.base.program_size;
- tcs_bin = anv_pipeline_upload_kernel(pipeline, cache,
- tcs_sha1, sizeof(tcs_sha1),
- shader_code, code_size,
- tcs_nir->constant_data,
- tcs_nir->constant_data_size,
- &tcs_prog_data.base.base,
- sizeof(tcs_prog_data),
- &tcs_map);
+ tcs_bin = anv_device_upload_kernel(pipeline->device, cache,
+ tcs_sha1, sizeof(tcs_sha1),
+ shader_code, code_size,
+ tcs_nir->constant_data,
+ tcs_nir->constant_data_size,
+ &tcs_prog_data.base.base,
+ sizeof(tcs_prog_data),
+ &tcs_map);
if (!tcs_bin) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
}
code_size = tes_prog_data.base.base.program_size;
- tes_bin = anv_pipeline_upload_kernel(pipeline, cache,
- tes_sha1, sizeof(tes_sha1),
- shader_code, code_size,
- tes_nir->constant_data,
- tes_nir->constant_data_size,
- &tes_prog_data.base.base,
- sizeof(tes_prog_data),
- &tes_map);
+ tes_bin = anv_device_upload_kernel(pipeline->device, cache,
+ tes_sha1, sizeof(tes_sha1),
+ shader_code, code_size,
+ tes_nir->constant_data,
+ tes_nir->constant_data_size,
+ &tes_prog_data.base.base,
+ sizeof(tes_prog_data),
+ &tes_map);
if (!tes_bin) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_pipeline_hash_shader(pipeline, layout, module, entrypoint,
MESA_SHADER_GEOMETRY, spec_info,
&key, sizeof(key), sha1);
- if (cache)
- bin = anv_pipeline_cache_search(cache, sha1, 20);
+ bin = anv_device_search_for_kernel(pipeline->device, cache, sha1, 20);
if (bin == NULL) {
struct brw_gs_prog_data prog_data = {};
/* TODO: SIMD8 GS */
const unsigned code_size = prog_data.base.base.program_size;
- bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20,
- shader_code, code_size,
- nir->constant_data,
- nir->constant_data_size,
- &prog_data.base.base, sizeof(prog_data),
- &map);
+ bin = anv_device_upload_kernel(pipeline->device, cache, sha1, 20,
+ shader_code, code_size,
+ nir->constant_data,
+ nir->constant_data_size,
+ &prog_data.base.base, sizeof(prog_data),
+ &map);
if (!bin) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_pipeline_hash_shader(pipeline, layout, module, entrypoint,
MESA_SHADER_FRAGMENT, spec_info,
&key, sizeof(key), sha1);
- if (cache)
- bin = anv_pipeline_cache_search(cache, sha1, 20);
+ bin = anv_device_search_for_kernel(pipeline->device, cache, sha1, 20);
if (bin == NULL) {
struct brw_wm_prog_data prog_data = {};
}
unsigned code_size = prog_data.base.program_size;
- bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20,
- shader_code, code_size,
- nir->constant_data,
- nir->constant_data_size,
- &prog_data.base, sizeof(prog_data),
- &map);
+ bin = anv_device_upload_kernel(pipeline->device, cache, sha1, 20,
+ shader_code, code_size,
+ nir->constant_data,
+ nir->constant_data_size,
+ &prog_data.base, sizeof(prog_data),
+ &map);
if (!bin) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
anv_pipeline_hash_shader(pipeline, layout, module, entrypoint,
MESA_SHADER_COMPUTE, spec_info,
&key, sizeof(key), sha1);
- if (cache)
- bin = anv_pipeline_cache_search(cache, sha1, 20);
+ bin = anv_device_search_for_kernel(pipeline->device, cache, sha1, 20);
if (bin == NULL) {
struct brw_cs_prog_data prog_data = {};
}
const unsigned code_size = prog_data.base.program_size;
- bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20,
- shader_code, code_size,
- nir->constant_data,
- nir->constant_data_size,
- &prog_data.base, sizeof(prog_data),
- &map);
+ bin = anv_device_upload_kernel(pipeline->device, cache, sha1, 20,
+ shader_code, code_size,
+ nir->constant_data,
+ nir->constant_data_size,
+ &prog_data.base, sizeof(prog_data),
+ &map);
if (!bin) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);