i965/cse: Don't eliminate instructions with side-effects

This casues problems when converting atomics to use the GRF.  Sometimes the atomic operation would get eaten by CSE when it shouldn't.

v2: Roll the has_side_effects check into is_expression

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 01790ada8b493a2837717b0e6c418a79a47f7fd6..033c09e0f850602888bb3868c10bf3486bd2d156 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -103,7 +103,7 @@ is_expression(const fs_inst *const inst)
    case SHADER_OPCODE_LOAD_PAYLOAD:
       return !is_copy_payload(inst);
    default:
-      return inst->is_send_from_grf();
+      return inst->is_send_from_grf() && !inst->has_side_effects();
    }
 }
 

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
index 29d2e026205bbcb9b98096512d4ce2d6fdd761a1..1b8c9872d7f0f6426521f7123b7643fb6f3e3f35 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
@@ -82,7 +82,7 @@ is_expression(const vec4_instruction *const inst)
    case SHADER_OPCODE_COS:
       return inst->mlen == 0;
    default:
-      return false;
+      return !inst->has_side_effects();
    }
 }