freedreno/ir3: fix legalize for vecN inputs

The wrmask is handled in regmask_get()/regmask_set(), but it wasn't
being propagated from SSA src to dst.  So for example, an SSBO read
value that is passed in as src2.y component to atomic op, wasn't
getting the (sy) flag set.  Causing lots of fail.

Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index 356e9c60deacdee3a138d80e21e30c00bae057fb..918fce833f2d29c49b1f73dfb4a99a57bfea77d1 100644 (file)
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -1076,6 +1076,7 @@ static inline struct ir3_register * __ssa_src(struct ir3_instruction *instr,
                flags |= IR3_REG_HALF;
        reg = ir3_reg_create(instr, 0, IR3_REG_SSA | flags);
        reg->instr = src;
+       reg->wrmask = src->regs[0]->wrmask;
        return reg;
 }
 

diff --git a/src/freedreno/ir3/ir3_context.c b/src/freedreno/ir3/ir3_context.c
index 1aab7396c3e11593a4f7f8fe7dd6ce459a321d7b..1fc453c15b39f8ba03ce28004fdd74371807f5d9 100644 (file)
--- a/src/freedreno/ir3/ir3_context.c
+++ b/src/freedreno/ir3/ir3_context.c
@@ -340,6 +340,8 @@ ir3_create_collect(struct ir3_context *ctx, struct ir3_instruction *const *arr,
                ir3_reg_create(collect, 0, IR3_REG_SSA | flags)->instr = elem;
        }
 
+       collect->regs[0]->wrmask = MASK(arrsz);
+
        return collect;
 }