radeonsi: bump PRIMGROUP_SIZE for some cases

Recommended by hw people.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index f5d65508340bcf3920561063dbefec240df428bd..0f700a8c9ebac57d7cbf65dabc19cbe31536da0c 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -384,13 +384,16 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
 {
        struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
        unsigned prim = info->mode;
-       unsigned primgroup_size = 64;
+       unsigned primgroup_size = 128; /* recommended without a GS */
 
        /* SWITCH_ON_EOP(0) is always preferable. */
        bool wd_switch_on_eop = false;
        bool ia_switch_on_eop = false;
        bool partial_vs_wave = false;
 
+       if (sctx->gs_shader)
+               primgroup_size = 64; /* recommended with a GS */
+
        /* This is a hardware requirement. */
        if ((rs && rs->line_stipple_enable) ||
            (sctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {