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ARM: Get rid of the Raddr operand.
author
Gabe Black
<gblack@eecs.umich.edu>
Sun, 8 Nov 2009 09:57:34 +0000
(
01:57
-0800)
committer
Gabe Black
<gblack@eecs.umich.edu>
Sun, 8 Nov 2009 09:57:34 +0000
(
01:57
-0800)
src/arch/arm/isa/operands.isa
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diff --git
a/src/arch/arm/isa/operands.isa
b/src/arch/arm/isa/operands.isa
index ac7427dad0321ab81368b0232c9b37555f7ebd99..a4c404bd55d25629e346fb67df03327d790c220f 100644
(file)
--- a/
src/arch/arm/isa/operands.isa
+++ b/
src/arch/arm/isa/operands.isa
@@
-63,7
+63,6
@@
def operands {{
'Rdo': ('IntReg', 'uw', '(RD & ~1)', 'IsInteger', 4, maybePCRead, maybePCWrite),
'Rde': ('IntReg', 'uw', '(RD | 1)', 'IsInteger', 5, maybePCRead, maybePCWrite),
- 'Raddr': ('IntReg', 'uw', '17', 'IsInteger', 6),
'Rhi': ('IntReg', 'uw', '18', 'IsInteger', 7),
'Rlo': ('IntReg', 'uw', '19', 'IsInteger', 8),
'LR': ('IntReg', 'uw', '14', 'IsInteger', 9),