+2017-09-18 Cesar Philippidis <cesar@codesourcery.com>
+
+ * omp-offload.c (oacc_xform_loop): Enable SIMD vectorization on
+ non-SIMT targets in acc vector loops.
+
2017-09-18 Claudiu Zissulescu <claziss@synopsys.com>
* configure.ac: Add arc and check if assembler supports gdwarf2.
#include "intl.h"
#include "stringpool.h"
#include "attribs.h"
+#include "cfgloop.h"
/* Describe the OpenACC looping structure of a function. The entire
function is held in a 'NULL' loop. */
break;
case IFN_GOACC_LOOP_OFFSET:
+ /* Enable vectorization on non-SIMT targets. */
+ if (!targetm.simt.vf
+ && outer_mask == GOMP_DIM_MASK (GOMP_DIM_VECTOR)
+ /* If not -fno-tree-loop-vectorize, hint that we want to vectorize
+ the loop. */
+ && (flag_tree_loop_vectorize
+ || !global_options_set.x_flag_tree_loop_vectorize))
+ {
+ basic_block bb = gsi_bb (gsi);
+ struct loop *parent = bb->loop_father;
+ struct loop *body = parent->inner;
+
+ parent->force_vectorize = true;
+ parent->safelen = INT_MAX;
+
+ /* "Chunking loops" may have inner loops. */
+ if (parent->inner)
+ {
+ body->force_vectorize = true;
+ body->safelen = INT_MAX;
+ }
+
+ cfun->has_force_vectorize_loops = true;
+ }
if (striding)
{
r = oacc_thread_numbers (true, mask, &seq);