// Setup and run
// -------------
- MemoryShareWorker(RTLIL::Design *design) :
- design(design), modwalker(design)
- {
+ MemoryShareWorker(RTLIL::Design *design) : design(design), modwalker(design) {}
}
void operator()(RTLIL::Module* module)
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE {
log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n");
extra_args(args, 1, design);
-
MemoryShareWorker msw(design);
for (auto module : design->selected_modules())
#endif
limit = config.limit;
-
modwalker.setup(module);
cells_to_remove.clear();
- recursion_state.clear();;
+ recursion_state.clear();
topo_cell_drivers.clear();
topo_bit_drivers.clear();
exclusive_ctrls.clear();