Fix a bug in the ARM emulator which would not allow 4 byte alignment for double word...

	PR 22790
	* armemu.c (Handle_Store_Double): Allow 4 byte alignment when
	running in v6 mode.

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index aa3c91bb2c47ad076ba14033325a6ba09e861982..fbd977c3722c33c0a17668e69255a1a0dc2aec8a 100644 (file)
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,9 @@
+2021-04-26  Nick Clifton  <nickc@redhat.com>
+
+       PR 22790
+       * armemu.c (Handle_Store_Double): Allow 4 byte alignment when
+       running in v6 mode.
+
 2021-04-22  Tom Tromey  <tom@tromey.com>
 
        * configure, config.in: Rebuild.

diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 922c2e498db9c3b52b048a00debd9708b85e92fe..f93ad0cee254bab55602fe515b1e01c94734ac35 100644 (file)
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -5457,7 +5457,10 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
     addr = base;
 
   /* The address must be aligned on a 8 byte boundary.  */
-  if (addr & 0x7)
+  if (state->is_v6 && (addr & 0x3) == 0)
+    /* Word alignment is enough for v6.  */
+    ;
+  else if (addr & 0x7)
     {
 #ifdef ABORTS
       ARMul_DATAABORT (addr);