* aix41.h (SUBTARGET_SWITCHES): Delete threads.
(CPP_SPEC): Change mthreads to pthread.
(LIB_SPEC): Likewise.
(STARTFILE_SPEC): Likewise.
* aix43.h (SUBTARGET_SWITCHES): Delete thread.
(CPP_SPEC): Change mthreads to pthread.
(LIB_SPEC): Likewise.
(STARTFILE_SPEC): Likewise.
* rs6000-protos.h (reg_or_arith_cint_operand): New.
* rs6000.c (reg_or_arith_cint_operand): New.
(num_insns_constant_wide): Decorate unsigned constant.
* rs6000.h (PREDICATE_CODES): Add reg_or_arith_cint_operand.
* rs6000.md (addsi3): Use new predicate.
(subsi3, adddi3, subdi3): Likewise.
From-SVN: r34502
+2000-06-12 David Edelsohn <edelsohn@gnu.org>
+
+ * aix41.h (SUBTARGET_SWITCHES): Delete threads.
+ (CPP_SPEC): Change mthreads to pthread.
+ (LIB_SPEC): Likewise.
+ (STARTFILE_SPEC): Likewise.
+ * aix43.h (SUBTARGET_SWITCHES): Delete thread.
+ (CPP_SPEC): Change mthreads to pthread.
+ (LIB_SPEC): Likewise.
+ (STARTFILE_SPEC): Likewise.
+ * rs6000-protos.h (reg_or_arith_cint_operand): New.
+ * rs6000.c (reg_or_arith_cint_operand): New.
+ (num_insns_constant_wide): Decorate unsigned constant.
+ * rs6000.h (PREDICATE_CODES): Add reg_or_arith_cint_operand.
+ * rs6000.md (addsi3): Use new predicate.
+ (subsi3, adddi3, subdi3): Likewise.
+
2000-06-12 Mark Mitchell <mark@codesourcery.com>
* c-common.c (lang_get_alias_set): Fix typo.
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
- {"threads", 0, \
- "Use the thread library and reentrant C library" }, \
- {"pe", 0, \
+ {"pe", 0, \
"Support message passing with the Parallel Environment" },
#undef ASM_SPEC
#define CPP_SPEC "%{posix: -D_POSIX_SOURCE}\
%{ansi: -D_ANSI_C_SOURCE}\
%{mpe: -I/usr/lpp/ppe.poe/include}\
- %{mthreads: -D_THREAD_SAFE}\
+ %{pthread: -D_THREAD_SAFE}\
%(cpp_cpu)"
#undef CPP_DEFAULT_SPEC
#define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
%{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}}\
%{mpe:-L/usr/lpp/ppe.poe/lib -lmpi -lvtd}\
- %{mthreads: -L/usr/lib/threads -lpthreads -lc_r /usr/lib/libc.a}\
- %{!mthreads: -lc}"
+ %{pthread: -L/usr/lib/threads -lpthreads -lc_r /usr/lib/libc.a}\
+ %{!pthread: -lc}"
#undef LINK_SPEC
#define LINK_SPEC "-bpT:0x10000000 -bpD:0x20000000 %{!r:-btextro} -bnodelcsect\
%{!pg:%{p:/usr/lpp/ppe.poe/lib/mcrt0.o}\
%{!p:/usr/lpp/ppe.poe/lib/crt0.o}}}\
%{!mpe:\
- %{mthreads:%{pg:gcrt0_r%O%s}%{!pg:%{p:mcrt0_r%O%s}%{!p:crt0_r%O%s}}}\
- %{!mthreads:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}}"
+ %{pthread:%{pg:gcrt0_r%O%s}%{!pg:%{p:mcrt0_r%O%s}%{!p:crt0_r%O%s}}}\
+ %{!pthread:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}}"
/* AIX 4 uses PowerPC nop (ori 0,0,0) instruction as call glue for PowerPC
and "cror 31,31,31" for POWER architecture. */
"Compile for 64-bit pointers" }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
"Compile for 32-bit pointers" }, \
- {"threads", 0, \
- "Use the thread library and reentrant C library" }, \
{"pe", 0, \
"Support message passing with the Parallel Environment" },
%{ansi: -D_ANSI_C_SOURCE}\
%{maix64: -D__64BIT__ -D_ARCH_PPC}\
%{mpe: -I/usr/lpp/ppe.poe/include}\
- %{mthreads: -D_THREAD_SAFE}\
+ %{pthread: -D_THREAD_SAFE}\
%(cpp_cpu)"
/* Common CPP definitions used by CPP_SPEC among the various targets
%{p:-L/lib/profiled -L/usr/lib/profiled}\
%{!maix64:%{!shared:%{g*:-lg}}}\
%{mpe:-L/usr/lpp/ppe.poe/lib -lmpi -lvtd}\
- %{mthreads:-L/usr/lib/threads -lpthreads -lc_r /usr/lib/libc.a}\
- %{!mthreads:-lc}"
+ %{pthread:-L/usr/lib/threads -lpthreads -lc_r /usr/lib/libc.a}\
+ %{!pthread:-lc}"
#undef LINK_SPEC
#define LINK_SPEC "-bpT:0x10000000 -bpD:0x20000000 %{!r:-btextro} -bnodelcsect\
%{!mpe:\
%{maix64:%{pg:gcrt0_64%O%s}%{!pg:%{p:mcrt0_64%O%s}%{!p:crt0_64%O%s}}}\
%{!maix64:\
- %{mthreads:%{pg:gcrt0_r%O%s}%{!pg:%{p:mcrt0_r%O%s}%{!p:crt0_r%O%s}}}\
- %{!mthreads:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}}}"
+ %{pthread:%{pg:gcrt0_r%O%s}%{!pg:%{p:mcrt0_r%O%s}%{!p:crt0_r%O%s}}}\
+ %{!pthread:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}}}"
/* AIX 4.3 typedefs ptrdiff_t as "long" while earlier releases used "int". */
extern int reg_or_neg_short_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_u_short_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_cint_operand PARAMS ((rtx, enum machine_mode));
+extern int reg_or_arith_cint_operand PARAMS ((rtx, enum machine_mode));
extern int reg_or_logical_cint_operand PARAMS ((rtx, enum machine_mode));
extern int got_operand PARAMS ((rtx, enum machine_mode));
extern int got_no_const_operand PARAMS ((rtx, enum machine_mode));
register rtx op;
enum machine_mode mode;
{
- return (GET_CODE (op) == CONST_INT
- || gpc_reg_operand (op, mode));
+ return (GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode));
+}
+
+/* Return 1 is the operand is either a non-special register or ANY
+ 32-bit signed constant integer. */
+
+int
+reg_or_arith_cint_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+{
+ return (gpc_reg_operand (op, mode)
+ || (GET_CODE (op) == CONST_INT
+#if HOST_BITS_PER_WIDE_INT != 32
+ && ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80000000)
+ < 0x100000000u)
+#endif
+ ));
}
/* Return 1 is the operand is either a non-special register or ANY
#if HOST_BITS_PER_WIDE_INT == 64
else if (TARGET_POWERPC64)
{
- HOST_WIDE_INT low = value & 0xffffffff;
+ unsigned HOST_WIDE_INT low = value & 0xffffffffu;
HOST_WIDE_INT high = value >> 32;
if (high == 0 && (low & 0x80000000u) == 0)
{"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
+ {"reg_or_arith_cint_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_logical_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
{"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \
(define_expand "addsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(plus:SI (match_operand:SI 1 "gpc_reg_operand" "")
- (match_operand:SI 2 "reg_or_cint_operand" "")))]
+ (match_operand:SI 2 "reg_or_arith_cint_operand" "")))]
""
"
{
(define_expand "subsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(minus:SI (match_operand:SI 1 "reg_or_short_operand" "")
- (match_operand:SI 2 "reg_or_cint_operand" "")))]
+ (match_operand:SI 2 "reg_or_arith_cint_operand" "")))]
""
"
{
(define_expand "adddi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(plus:DI (match_operand:DI 1 "gpc_reg_operand" "")
- (match_operand:DI 2 "reg_or_cint_operand" "")))]
+ (match_operand:DI 2 "reg_or_arith_cint_operand" "")))]
""
"
{
(define_expand "subdi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(minus:DI (match_operand:DI 1 "reg_or_short_operand" "")
- (match_operand:DI 2 "reg_or_cint_operand" "")))]
+ (match_operand:DI 2 "reg_or_arith_cint_operand" "")))]
""
"
{