re PR tree-optimization/71488 (Wrong code for vector comparisons with ivybridge and...

	PR tree-optimization/71488
	* gcc.target/i386/i386.exp (check_effective_target_sse4): Move to ...
	* lib/target-supports.exp: ... here.
	(check_sse4_hw_available): New procedure.
	(check_effective_target_sse4_runtime): Ditto.
	* g++.dg/pr71488.C (dg-additional-options): Use -msse4 instead of
	-march=westmere for sse4_runtime targets.
	* gcc.dg/vect/vect-bool-cmp.c: Include "tree-vect.h".
	(dg-additional-options): Use for sse4_runtime targets.
	(main): Call check_vect ().
	(dg-final): Perform scan only for sse4_runtime targets.

From-SVN: r237738

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c36062eb6172eb63473dd1a36668491682c36804..d70dc48cbd8caafebcfd8d169cb04a4da6ff93d8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -126,7 +126,7 @@
 
 2016-06-22  Ilya Enkovich  <ilya.enkovich@intel.com>
 
-       PR middle-end/71488
+       PR tree-optimization/71488
        * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Support
        comparison of boolean vectors.
        * tree-vect-stmts.c (vectorizable_comparison): Vectorize comparison

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 95d90b6249e00e10c7dbe06088e3539cb782536c..3fb01671bb0aac5be64735b1ab03a64e4e6d993f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2016-06-23  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR tree-optimization/71488
+       * gcc.target/i386/i386.exp (check_effective_target_sse4): Move to ...
+       * lib/target-supports.exp: ... here.
+       (check_sse4_hw_available): New procedure.
+       (check_effective_target_sse4_runtime): Ditto.
+       * g++.dg/pr71488.C (dg-additional-options): Use -msse4 instead of
+       -march=westmere for sse4_runtime targets.
+       * gcc.dg/vect/vect-bool-cmp.c: Include "tree-vect.h".
+       (dg-additional-options): Use for sse4_runtime targets.
+       (main): Call check_vect ().
+       (dg-final): Perform scan only for sse4_runtime targets.
+
 2016-06-23  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/66232
@@ -13,8 +27,7 @@
        * gcc.target/i386/pr67400-4.c: Likewise.
        * gcc.target/i386/pr67400-6.c: Likewise.
        * gcc.target/i386/pr67400-7.c: Likewise.
-       * lib/target-supports.exp (check_effective_target_got32x_reloc):
-       New.
+       * lib/target-supports.exp (check_effective_target_got32x_reloc): New.
 
 2016-06-23  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
@@ -83,7 +96,7 @@
 
 2016-06-22  Ilya Enkovich  <ilya.enkovich@intel.com>
 
-       PR middle-end/71488
+       PR tree-optimization/71488
        * g++.dg/pr71488.C: New test.
        * gcc.dg/vect/vect-bool-cmp.c: New test.
 

diff --git a/gcc/testsuite/g++.dg/pr71488.C b/gcc/testsuite/g++.dg/pr71488.C
index d7d657ed06ef8298695237d0b3125d0bc227c237..ffe30f1afeb1ac576c38f11af9f4462e6cbf65a2 100644 (file)
--- a/gcc/testsuite/g++.dg/pr71488.C
+++ b/gcc/testsuite/g++.dg/pr71488.C
@@ -1,7 +1,7 @@
-// PR middle-end/71488
+// PR tree-optimization/71488
 // { dg-do run }
 // { dg-options "-O3 -std=c++11" }
-// { dg-additional-options "-march=westmere" { target i?86-*-* x86_64-*-* } }
+// { dg-additional-options "-msse4" { target sse4_runtime } }
 // { dg-require-effective-target c++11 }
 
 #include <valarray>

diff --git a/gcc/testsuite/gcc.dg/vect/vect-bool-cmp.c b/gcc/testsuite/gcc.dg/vect/vect-bool-cmp.c
index a1e2a24accd8ba4832064a2cb156c5afd08ae574..35d2a3ca02e948cba9c83467cd0e34e44dbe0b09 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-bool-cmp.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-bool-cmp.c
@@ -1,7 +1,9 @@
-/* PR71488 */
+/* PR tree-optimization/71488 */
 /* { dg-require-effective-target vect_int } */
 /* { dg-require-effective-target vect_pack_trunc } */
-/* { dg-additional-options "-msse4" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-additional-options "-msse4" { target sse4_runtime } } */
+
+#include "tree-vect.h"
 
 int i1, i2;
 
@@ -199,6 +201,8 @@ main (int argc, char **argv)
   long long l2[32];
   int i;
 
+  check_vect ();
+
   for (i = 0; i < 32; i++)
     {
       l2[i] = i2[i] = s2[i] = i % 2;
@@ -249,4 +253,4 @@ main (int argc, char **argv)
   check (res, ne);
 }
 
-/* { dg-final { scan-tree-dump-times "VECTORIZED" 18 "vect" { target { i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump-times "VECTORIZED" 18 "vect" { target sse4_runtime } } } */

diff --git a/gcc/testsuite/gcc.target/i386/i386.exp b/gcc/testsuite/gcc.target/i386/i386.exp
index 2c3145118c88bdebcccda7076fa6fe825620c61d..877d2248493fd72e4aad3ebba48667b902dd122a 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/i386.exp
+++ b/gcc/testsuite/gcc.target/i386/i386.exp
@@ -76,20 +76,6 @@ proc check_effective_target_ssse3 { } {
     } "-O2 -mssse3" ]
 }
 
-# Return 1 if sse4 instructions can be compiled.
-proc check_effective_target_sse4 { } {
-    return [check_no_compiler_messages sse4.1 object {
-       typedef long long __m128i __attribute__ ((__vector_size__ (16)));
-       typedef int __v4si __attribute__ ((__vector_size__ (16)));
-
-       __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
-       {
-           return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
-                                                      (__v4si)__Y);
-       }
-    } "-O2 -msse4.1" ]
-}
-
 # Return 1 if aes instructions can be compiled.
 proc check_effective_target_aes { } {
     return [check_no_compiler_messages aes object {

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 6dd59e8c7d6bed3504bce0fb1e351541c28855ce..2b80f6eeb07bd701f9f78408c212550b941127d5 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1608,6 +1608,29 @@ proc check_sse2_hw_available { } {
     }]
 }
 
+# Return 1 if the target supports executing SSE4 instructions, 0
+# otherwise.  Cache the result.
+
+proc check_sse4_hw_available { } {
+    return [check_cached_effective_target sse4_hw_available {
+       # If this is not the right target then we can skip the test.
+       if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+           expr 0
+       } else {
+           check_runtime_nocache sse4_hw_available {
+               #include "cpuid.h"
+               int main ()
+               {
+                 unsigned int eax, ebx, ecx, edx;
+                 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+                   return !(ecx & bit_SSE4_2);
+                 return 1;
+               }
+           } ""
+       }
+    }]
+}
+
 # Return 1 if the target supports executing AVX instructions, 0
 # otherwise.  Cache the result.
 
@@ -1654,6 +1677,17 @@ proc check_effective_target_sse2_runtime { } {
     return 0
 }
 
+# Return 1 if the target supports running SSE4 executables, 0 otherwise.
+
+proc check_effective_target_sse4_runtime { } {
+    if { [check_effective_target_sse4]
+        && [check_sse4_hw_available]
+        && [check_sse_os_support_available] } {
+       return 1
+    }
+    return 0
+}
+
 # Return 1 if the target supports running AVX executables, 0 otherwise.
 
 proc check_effective_target_avx_runtime { } {
@@ -6390,6 +6424,20 @@ proc check_effective_target_sse2 { } {
     } "-O2 -msse2" ]
 }
 
+# Return 1 if sse4.1 instructions can be compiled.
+proc check_effective_target_sse4 { } {
+    return [check_no_compiler_messages sse4.1 object {
+       typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+       typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+       __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
+       {
+           return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
+                                                      (__v4si)__Y);
+       }
+    } "-O2 -msse4.1" ]
+}
+
 # Return 1 if F16C instructions can be compiled.
 
 proc check_effective_target_f16c { } {