ARM: Updated regressions for changes in SE mode stack
authorAli Saidi <Ali.Saidi@ARM.com>
Wed, 2 Jun 2010 17:58:17 +0000 (12:58 -0500)
committerAli Saidi <Ali.Saidi@ARM.com>
Wed, 2 Jun 2010 17:58:17 +0000 (12:58 -0500)
tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini
tests/quick/00.hello/ref/arm/linux/simple-atomic/simout
tests/quick/00.hello/ref/arm/linux/simple-atomic/stats.txt

index fdc787e7b567301b912b4e3b0fa6d21e6f50095d..70fb598b9e6beec27e3db5488e8dd9be8302e5d1 100644 (file)
@@ -12,7 +12,6 @@ physmem=system.physmem
 [system.cpu]
 type=AtomicSimpleCPU
 children=dtb itb tracer workload
-UnifiedTLB=true
 checker=Null
 clock=500
 cpu_id=0
@@ -58,7 +57,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello
+executable=tests/test-progs/hello/bin/arm/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
index 6dc3795ba79ed496fd216a6b358a9ae2b4613492..896c3dc7470e048dea83ba27ab1b0707da605dfd 100755 (executable)
@@ -5,12 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 27 2010 17:02:03
-M5 revision 3ba6c6c19ddd 7101 default qtip syscallfromintstats.patch tip
-M5 started Feb 27 2010 17:02:04
-M5 executing on tater
-command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic
+M5 compiled Jun  1 2010 16:08:15
+M5 revision 4b3bf0363048 7414 default qtip tip ext/linux_se_structs.patch
+M5 started Jun  1 2010 16:09:04
+M5 executing on harpertown2
+command line: ./build/ARM_SE/m5.debug -r -e tests/run.py quick/00.hello/arm/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Hello world!
-Exiting @ tick 2756500 because target called exit()
+Exiting @ tick 2761000 because target called exit()
index e4bd0d4152e05614e91fa1ee59b19cb2430de9e2..b5ae5cf6f240dd5b3bed9b96f981715a5dd83d41 100644 (file)
@@ -1,13 +1,13 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                  12327                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 201392                       # Number of bytes of host memory used
-host_seconds                                     0.45                       # Real time elapsed on the host
-host_tick_rate                                6174277                       # Simulator tick rate (ticks/s)
+host_inst_rate                                  92316                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 191512                       # Number of bytes of host memory used
+host_seconds                                     0.06                       # Real time elapsed on the host
+host_tick_rate                               46039687                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-sim_insts                                        5501                       # Number of instructions simulated
+sim_insts                                        5510                       # Number of instructions simulated
 sim_seconds                                  0.000003                       # Number of seconds simulated
-sim_ticks                                     2756500                       # Number of ticks simulated
+sim_ticks                                     2761000                       # Number of ticks simulated
 system.cpu.dtb.accesses                             0                       # DTB accesses
 system.cpu.dtb.hits                                 0                       # DTB hits
 system.cpu.dtb.misses                               0                       # DTB misses
@@ -28,9 +28,9 @@ system.cpu.itb.write_accesses                       0                       # DT
 system.cpu.itb.write_hits                           0                       # DTB write hits
 system.cpu.itb.write_misses                         0                       # DTB write misses
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
-system.cpu.numCycles                             5514                       # number of cpu cycles simulated
-system.cpu.num_insts                             5501                       # Number of instructions executed
-system.cpu.num_refs                              2143                       # Number of memory references
+system.cpu.numCycles                             5523                       # number of cpu cycles simulated
+system.cpu.num_insts                             5510                       # Number of instructions executed
+system.cpu.num_refs                              2145                       # Number of memory references
 system.cpu.workload.PROG:num_syscalls              13                       # Number of system calls
 
 ---------- End Simulation Statistics   ----------