alpha.c (some_ni_operand): New.

        * alpha.c (some_ni_operand): New.
        * alpha-protos.h: Declare it.
        * alpha.h (PREDICATE_CODES): Update.
        * alpha.md (sXaddq reload insns): Use some_ni_operand
        for SET_DEST instead of some_operand.

From-SVN: r29959

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7d80cd3bb130cc350d80c851dbb79b7b8a0789fe..ec3c93f99bbf4199a3020dceb82621510bc272a1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+Wed Oct 13 21:18:17 1999  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.c (some_ni_operand): New.
+       * alpha-protos.h: Declare it.
+       * alpha.h (PREDICATE_CODES): Update.
+       * alpha.md (sXaddq reload insns): Use some_ni_operand 
+       for SET_DEST instead of some_operand.
+
 Wed Oct 13 21:04:45 1999  Richard Henderson  <rth@cygnus.com>
                          Jim Wilson  <wilson@cygnus.com>
 

diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h
index 1a45d6b55ffbf0d0d91f892ba109e57992323d72..8818383249d660a3a883a479231ae3edbbc423f4 100644 (file)
--- a/gcc/config/alpha/alpha-protos.h
+++ b/gcc/config/alpha/alpha-protos.h
@@ -50,6 +50,7 @@ extern int reg_or_fp0_operand PROTO ((rtx, enum machine_mode));
 extern int hard_fp_register_operand PROTO ((rtx, enum machine_mode));
 extern int reg_or_cint_operand PROTO ((rtx, enum machine_mode));
 extern int some_operand PROTO ((rtx, enum machine_mode));
+extern int some_ni_operand PROTO ((rtx, enum machine_mode));
 extern int input_operand PROTO ((rtx, enum machine_mode));
 extern int current_file_function_operand PROTO ((rtx, enum machine_mode));
 extern int call_operand PROTO ((rtx, enum machine_mode));

diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 36cd20721f30d313e0d9c9599ec520d65f9cd12f..7f9481ace940f87e8803af0eeaa22843c67f12bf 100644 (file)
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -585,6 +585,22 @@ some_operand (op, mode)
   return 0;
 }
 
+/* Likewise, but don't accept constants.  */
+
+int
+some_ni_operand (op, mode)
+     register rtx op;
+     enum machine_mode mode;
+{
+  if (GET_MODE (op) != mode && mode != VOIDmode)
+    return 0;
+
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+
+  return (GET_CODE (op) == REG || GET_CODE (op) == MEM);
+}
+
 /* Return 1 if OP is a valid operand for the source of a move insn.  */
 
 int

diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index 5b95e698fa684bb0d45d8797558307ded78196c9..f2f814f064e1a96eb60e79e3d65cc7c5072e51ea 100644 (file)
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -2330,6 +2330,7 @@ do {                                                                      \
                     SYMBOL_REF, CONST, LABEL_REF}},                    \
   {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE,         \
                    SYMBOL_REF, CONST, LABEL_REF}},                     \
+  {"some_ni_operand", {SUBREG, REG, MEM}},                             \
   {"aligned_memory_operand", {MEM}},                                   \
   {"unaligned_memory_operand", {MEM}},                                 \
   {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}},                        \

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index caf8306089d7644b0959738be28573520cdfc1f3..f64f1851f9af2acde03973a8b62778802be46d11 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -669,7 +669,7 @@
 ;; recognize them while reloading.
 
 (define_insn ""
-  [(set (match_operand:DI 0 "some_operand" "=r,&r")
+  [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
        (plus:DI (plus:DI (match_operand:DI 1 "some_operand" "%r,r")
                          (match_operand:DI 2 "some_operand" "%r,r"))
                 (match_operand:DI 3 "some_operand" "IOKL,r")))]
@@ -687,7 +687,7 @@
   "")
                                           
 (define_insn ""
-  [(set (match_operand:SI 0 "some_operand" "=r,&r")
+  [(set (match_operand:SI 0 "some_ni_operand" "=r,&r")
        (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
                                   (match_operand:SI 2 "const48_operand" "I,I"))
                          (match_operand:SI 3 "some_operand" "%r,r"))
@@ -708,7 +708,7 @@
   "")
 
 (define_insn ""
-  [(set (match_operand:DI 0 "some_operand" "=r,&r")
+  [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
        (sign_extend:DI
         (plus:SI (plus:SI
                   (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
@@ -733,7 +733,7 @@
   "operands[5] = gen_lowpart (SImode, operands[0]);")
 
 (define_insn ""
-  [(set (match_operand:DI 0 "some_operand" "=r,&r")
+  [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
        (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ,rJ")
                                   (match_operand:DI 2 "const48_operand" "I,I"))
                          (match_operand:DI 3 "some_operand" "%r,r"))