[ARM][testsuite] neon-testgen.ml removal

2016-07-05  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/neon-testgen.ml: Delete.
	* config/arm/neon.ml: Delete.

	gcc/testsuite/
	* gcc.target/arm/neon/polytypes.c: Move to ...
	* gcc.target/arm/polytypes.c: ... here.
	* gcc.target/arm/neon/pr51534.c: Move to ...
	* gcc.target/arm/pr51534.c: ... here.
	* gcc.target/arm/neon/vect-vcvt.c: Move to ...
	* gcc.target/arm/vect-vcvt.c: ... here.
	* gcc.target/arm/neon/vect-vcvtq.c: Move to ...
	* gcc.target/arm/vect-vcvtq.c: ... here.
	* gcc.target/arm/neon/vfp-shift-a2t2.c: Move to ...
	* gcc.target/arm/vfp-shift-a2t2.c: ... here.
	* gcc.target/arm/neon/vst1Q_laneu64-1.c: Move to ...
	* gcc.target/arm/vst1Q_laneu64-1.c: ... here. Fix foo() prototype.
	* gcc.target/arm/neon/neon.exp: Delete.
	* gcc.target/arm/neon/*.c: Delete.

From-SVN: r238000

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 35d27e5c39db2096867cf8921d47aea30556b962..93022ad89cbcedf5ba3b645d9a775230bdc2faa0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-07-05  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * config/arm/neon-testgen.ml: Delete.
+       * config/arm/neon.ml: Delete.
+
 2016-07-04  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/71739

diff --git a/gcc/config/arm/neon-testgen.ml b/gcc/config/arm/neon-testgen.ml
deleted file mode 100644 (file)
index c1af5de..0000000
--- a/gcc/config/arm/neon-testgen.ml
+++ /dev/null
@@ -1,324 +0,0 @@
-(* Auto-generate ARM Neon intrinsics tests.
-   Copyright (C) 2006-2016 Free Software Foundation, Inc.
-   Contributed by CodeSourcery.
-
-   This file is part of GCC.
-
-   GCC is free software; you can redistribute it and/or modify it under
-   the terms of the GNU General Public License as published by the Free
-   Software Foundation; either version 3, or (at your option) any later
-   version.
-
-   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-   WARRANTY; without even the implied warranty of MERCHANTABILITY or
-   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-   for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GCC; see the file COPYING3.  If not see
-   <http://www.gnu.org/licenses/>.
-
-   This is an O'Caml program.  The O'Caml compiler is available from:
-
-     http://caml.inria.fr/
-
-   Or from your favourite OS's friendly packaging system. Tested with version
-   3.09.2, though other versions will probably work too.
-
-   Compile with:
-     ocamlc -c neon.ml
-     ocamlc -o neon-testgen neon.cmo neon-testgen.ml
-
-   Run with:
-     cd /path/to/gcc/testsuite/gcc.target/arm/neon
-     /path/to/neon-testgen
-*)
-
-open Neon
-
-type c_type_flags = Pointer | Const
-
-(* Open a test source file.  *)
-let open_test_file dir name =
-  try
-    open_out (dir ^ "/" ^ name ^ ".c")
-  with Sys_error str ->
-    failwith ("Could not create test source file " ^ name ^ ": " ^ str)
-
-(* Emit prologue code to a test source file.  *)
-let emit_prologue chan test_name effective_target compile_test_optim =
-  Printf.fprintf chan "/* Test the `%s' ARM Neon intrinsic.  */\n" test_name;
-  Printf.fprintf chan "/* This file was autogenerated by neon-testgen.  */\n\n";
-  Printf.fprintf chan "/* { dg-do assemble } */\n";
-  Printf.fprintf chan "/* { dg-require-effective-target %s_ok } */\n"
-                 effective_target;
-  Printf.fprintf chan "/* { dg-options \"-save-temps %s\" } */\n" compile_test_optim;
-  Printf.fprintf chan "/* { dg-add-options %s } */\n" effective_target;
-  Printf.fprintf chan "\n#include \"arm_neon.h\"\n\n"
-
-(* Emit declarations of variables that are going to be passed
-   to an intrinsic, together with one to take a returned value if needed.  *)
-let emit_variables chan c_types features spaces =
-  let emit () =
-    ignore (
-      List.fold_left (fun arg_number -> fun (flags, ty) ->
-                        let pointer_bit =
-                          if List.mem Pointer flags then "*" else ""
-                        in
-                          (* Const arguments to builtins are directly
-                             written in as constants.  *)
-                          if not (List.mem Const flags) then
-                            Printf.fprintf chan "%s%s %sarg%d_%s;\n"
-                                           spaces ty pointer_bit arg_number ty;
-                        arg_number + 1)
-                     0 (List.tl c_types))
-  in
-    match c_types with
-      (_, return_ty) :: tys ->
-        if return_ty <> "void" then begin
-          (* The intrinsic returns a value.  We need to do explicit register
-             allocation for vget_low tests or they fail because of copy
-             elimination.  *)
-          ((if List.mem Fixed_vector_reg features then
-              Printf.fprintf chan "%sregister %s out_%s asm (\"d18\");\n"
-                             spaces return_ty return_ty
-            else if List.mem Fixed_core_reg features then
-              Printf.fprintf chan "%sregister %s out_%s asm (\"r0\");\n"
-                             spaces return_ty return_ty
-            else
-              Printf.fprintf chan "%s%s out_%s;\n" spaces return_ty return_ty);
-          emit ())
-        end else
-          (* The intrinsic does not return a value.  *)
-          emit ()
-    | _ -> assert false
-
-(* Emit code to call an intrinsic.  *)
-let emit_call chan const_valuator c_types name elt_ty =
-  (if snd (List.hd c_types) <> "void" then
-     Printf.fprintf chan "  out_%s = " (snd (List.hd c_types))
-   else
-     Printf.fprintf chan "  ");
-  Printf.fprintf chan "%s_%s (" (intrinsic_name name) (string_of_elt elt_ty);
-  let print_arg chan arg_number (flags, ty) =
-    (* If the argument is of const type, then directly write in the
-       constant now.  *)
-    if List.mem Const flags then
-      match const_valuator with
-        None ->
-          if List.mem Pointer flags then
-            Printf.fprintf chan "0"
-          else
-            Printf.fprintf chan "1"
-      | Some f -> Printf.fprintf chan "%s" (string_of_int (f arg_number))
-    else
-      Printf.fprintf chan "arg%d_%s" arg_number ty
-  in
-  let rec print_args arg_number tys =
-    match tys with
-      [] -> ()
-    | [ty] -> print_arg chan arg_number ty
-    | ty::tys ->
-      print_arg chan arg_number ty;
-      Printf.fprintf chan ", ";
-      print_args (arg_number + 1) tys
-  in
-    print_args 0 (List.tl c_types);
-    Printf.fprintf chan ");\n"
-
-(* Emit epilogue code to a test source file.  *)
-let emit_epilogue chan features regexps =
-  let no_op = List.exists (fun feature -> feature = No_op) features in
-    Printf.fprintf chan "}\n\n";
-    if not no_op then
-      List.iter (fun regexp ->
-                  Printf.fprintf chan
-                    "/* { dg-final { scan-assembler \"%s\" } } */\n" regexp)
-                regexps
-    else
-      ()
-    
-
-(* Check a list of C types to determine which ones are pointers and which
-   ones are const.  *)
-let check_types tys =
-  let tys' =
-    List.map (fun ty ->
-                let len = String.length ty in
-                  if len > 2 && String.get ty (len - 2) = ' '
-                             && String.get ty (len - 1) = '*'
-                  then ([Pointer], String.sub ty 0 (len - 2))
-                  else ([], ty)) tys
-  in
-    List.map (fun (flags, ty) ->
-                if String.length ty > 6 && String.sub ty 0 6 = "const "
-                then (Const :: flags, String.sub ty 6 ((String.length ty) - 6))
-                else (flags, ty)) tys'
-
-(* Work out what the effective target should be.  *)
-let effective_target features =
-  try
-    match List.find (fun feature ->
-                       match feature with Requires_feature _ -> true
-                                        | Requires_arch _ -> true
-                                        | Requires_FP_bit 1 -> true
-                                        | _ -> false)
-                     features with
-      Requires_feature "FMA" -> "arm_neonv2"
-    | Requires_feature "CRYPTO" -> "arm_crypto"
-    | Requires_arch 8 -> "arm_v8_neon"
-    | Requires_FP_bit 1 -> "arm_neon_fp16"
-    | _ -> assert false
-  with Not_found -> "arm_neon"
-
-(* Work out what the testcase optimization level should be, default to -O0.  *)
-let compile_test_optim features =
-  try
-    match List.find (fun feature ->
-                       match feature with Compiler_optim _ -> true
-                                        | _ -> false)
-                     features with
-      Compiler_optim opt -> opt
-    | _ -> assert false
-  with Not_found -> "-O0"
-
-(* Given an intrinsic shape, produce a regexp that will match
-   the right-hand sides of instructions generated by an intrinsic of
-   that shape.  *)
-let rec analyze_shape shape =
-  let rec n_things n thing =
-    match n with
-      0 -> []
-    | n -> thing :: (n_things (n - 1) thing)
-  in
-  let rec analyze_shape_elt elt =
-    match elt with
-      Dreg -> "\\[dD\\]\\[0-9\\]+"
-    | Qreg -> "\\[qQ\\]\\[0-9\\]+"
-    | Corereg -> "\\[rR\\]\\[0-9\\]+"
-    | Immed -> "#\\[0-9\\]+"
-    | VecArray (1, elt) ->
-        let elt_regexp = analyze_shape_elt elt in
-          "((\\\\\\{" ^ elt_regexp ^ "\\\\\\})|(" ^ elt_regexp ^ "))"
-    | VecArray (n, elt) ->
-      let elt_regexp = analyze_shape_elt elt in
-      let alt1 = elt_regexp ^ "-" ^ elt_regexp in
-      let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in
-        "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}"
-    | (PtrTo elt | CstPtrTo elt) ->
-      "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]"
-    | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
-    | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
-    | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]"
-    | Alternatives (elts) -> "(" ^ (String.concat "|" (List.map analyze_shape_elt elts)) ^ ")"
-  in
-    match shape with
-      All (n, elt) -> commas analyze_shape_elt (n_things n elt) ""
-    | Long -> (analyze_shape_elt Qreg) ^ ", " ^ (analyze_shape_elt Dreg) ^
-              ", " ^ (analyze_shape_elt Dreg)
-    | Long_noreg elt -> (analyze_shape_elt elt) ^ ", " ^ (analyze_shape_elt elt)
-    | Wide -> (analyze_shape_elt Qreg) ^ ", " ^ (analyze_shape_elt Qreg) ^
-              ", " ^ (analyze_shape_elt Dreg)
-    | Wide_noreg elt -> analyze_shape (Long_noreg elt)
-    | Narrow -> (analyze_shape_elt Dreg) ^ ", " ^ (analyze_shape_elt Qreg) ^
-                ", " ^ (analyze_shape_elt Qreg)
-    | Use_operands elts -> commas analyze_shape_elt (Array.to_list elts) ""
-    | By_scalar Dreg ->
-        analyze_shape (Use_operands [| Dreg; Dreg; Element_of_dreg |])
-    | By_scalar Qreg ->
-        analyze_shape (Use_operands [| Qreg; Qreg; Element_of_dreg |])
-    | By_scalar _ -> assert false
-    | Wide_lane ->
-        analyze_shape (Use_operands [| Qreg; Dreg; Element_of_dreg |])
-    | Wide_scalar ->
-        analyze_shape (Use_operands [| Qreg; Dreg; Element_of_dreg |])
-    | Pair_result elt ->
-      let elt_regexp = analyze_shape_elt elt in
-        elt_regexp ^ ", " ^ elt_regexp
-    | Unary_scalar _ -> "FIXME Unary_scalar"
-    | Binary_imm elt -> analyze_shape (Use_operands [| elt; elt; Immed |])
-    | Narrow_imm -> analyze_shape (Use_operands [| Dreg; Qreg; Immed |])
-    | Long_imm -> analyze_shape (Use_operands [| Qreg; Dreg; Immed |])
-
-(* Generate tests for one intrinsic.  *)
-let test_intrinsic dir opcode features shape name munge elt_ty =
-  (* Open the test source file.  *)
-  let test_name = name ^ (string_of_elt elt_ty) in
-  let chan = open_test_file dir test_name in
-  (* Work out what argument and return types the intrinsic has.  *)
-  let c_arity, new_elt_ty = munge shape elt_ty in
-  let c_types = check_types (strings_of_arity c_arity) in
-  (* Extract any constant valuator (a function specifying what constant
-     values are to be written into the intrinsic call) from the features
-     list.  *)
-  let const_valuator =
-    try
-      match (List.find (fun feature -> match feature with
-                                         Const_valuator _ -> true
-                                      | _ -> false) features) with
-        Const_valuator f -> Some f
-      | _ -> assert false
-    with Not_found -> None
-  in
-  (* Work out what instruction name(s) to expect.  *)
-  let insns = get_insn_names features name in
-  let no_suffix = (new_elt_ty = NoElts) in
-  let insns =
-    if no_suffix then insns
-                 else List.map (fun insn ->
-                                  let suffix = string_of_elt_dots new_elt_ty in
-                                    insn ^ "\\." ^ suffix) insns
-  in
-  (* Construct a regexp to match against the expected instruction name(s).  *)
-  let insn_regexp =
-    match insns with
-      [] -> assert false
-    | [insn] -> insn
-    | _ ->
-      let rec calc_regexp insns cur_regexp =
-        match insns with
-          [] -> cur_regexp
-        | [insn] -> cur_regexp ^ "(" ^ insn ^ "))"
-        | insn::insns -> calc_regexp insns (cur_regexp ^ "(" ^ insn ^ ")|")
-      in calc_regexp insns "("
-  in
-  (* Construct regexps to match against the instructions that this
-     intrinsic expands to.  Watch out for any writeback character and
-     comments after the instruction.  *)
-  let regexps = List.map (fun regexp -> insn_regexp ^ "\\[ \t\\]+" ^ regexp ^
-                         "!?\\(\\[ \t\\]+@\\[a-zA-Z0-9 \\]+\\)?\\n")
-                         (analyze_all_shapes features shape analyze_shape)
-  in
-  let effective_target = effective_target features in
-  let compile_test_optim = compile_test_optim features
-  in
-    (* Emit file and function prologues.  *)
-    emit_prologue chan test_name effective_target compile_test_optim;
-
-    if (compare compile_test_optim "-O0") <> 0 then
-        (* Emit variable declarations.  *)
-        emit_variables chan c_types features "";
-
-    Printf.fprintf chan "void test_%s (void)\n{\n" test_name;
-
-    if compare compile_test_optim "-O0" = 0 then
-        (* Emit variable declarations.  *)
-        emit_variables chan c_types features "  ";
-
-    Printf.fprintf chan "\n";
-    (* Emit the call to the intrinsic.  *)
-    emit_call chan const_valuator c_types name elt_ty;
-    (* Emit the function epilogue and the DejaGNU scan-assembler directives.  *)
-    emit_epilogue chan features regexps;
-    (* Close the test file.  *)
-    close_out chan
-
-(* Generate tests for one element of the "ops" table.  *)
-let test_intrinsic_group dir (opcode, features, shape, name, munge, types) =
-  List.iter (test_intrinsic dir opcode features shape name munge) types
-
-(* Program entry point.  *)
-let _ =
-  let directory = if Array.length Sys.argv <> 1 then Sys.argv.(1) else "." in
-    List.iter (test_intrinsic_group directory) (reinterp @ reinterpq @ ops)
-

diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml
deleted file mode 100644 (file)
index 99350be..0000000
--- a/gcc/config/arm/neon.ml
+++ /dev/null
@@ -1,2357 +0,0 @@
-(* Common code for ARM NEON header file, documentation and test case
-   generators.
-
-   Copyright (C) 2006-2016 Free Software Foundation, Inc.
-   Contributed by CodeSourcery.
-
-   This file is part of GCC.
-
-   GCC is free software; you can redistribute it and/or modify it under
-   the terms of the GNU General Public License as published by the Free
-   Software Foundation; either version 3, or (at your option) any later
-   version.
-
-   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-   WARRANTY; without even the implied warranty of MERCHANTABILITY or
-   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-   for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GCC; see the file COPYING3.  If not see
-   <http://www.gnu.org/licenses/>.  *)
-
-(* Shorthand types for vector elements.  *)
-type elts = S8 | S16 | S32 | S64 | F16 | F32 | U8 | U16 | U32 | U64 | P8 | P16
-          | P64 | P128 | I8 | I16 | I32 | I64 | B8 | B16 | B32 | B64 | Conv of elts * elts
-          | Cast of elts * elts | NoElts
-
-type eltclass = Signed | Unsigned | Float | Poly | Int | Bits
-             | ConvClass of eltclass * eltclass | NoType
-
-(* These vector types correspond directly to C types.  *)
-type vectype = T_int8x8    | T_int8x16
-             | T_int16x4   | T_int16x8
-            | T_int32x2   | T_int32x4
-            | T_int64x1   | T_int64x2
-            | T_uint8x8   | T_uint8x16
-            | T_uint16x4  | T_uint16x8
-            | T_uint32x2  | T_uint32x4
-            | T_uint64x1  | T_uint64x2
-            | T_float16x4
-            | T_float32x2 | T_float32x4
-            | T_poly8x8   | T_poly8x16
-            | T_poly16x4  | T_poly16x8
-            | T_immediate of int * int
-             | T_int8      | T_int16
-             | T_int32     | T_int64
-             | T_uint8     | T_uint16
-             | T_uint32    | T_uint64
-             | T_poly8     | T_poly16
-             | T_poly64    | T_poly64x1
-             | T_poly64x2  | T_poly128
-             | T_float16   | T_float32
-             | T_arrayof of int * vectype
-             | T_ptrto of vectype | T_const of vectype
-             | T_void      | T_intQI
-             | T_intHI     | T_intSI
-             | T_intDI     | T_intTI
-             | T_floatHF   | T_floatSF
-
-(* The meanings of the following are:
-     TImode : "Tetra", two registers (four words).
-     EImode : "hExa", three registers (six words).
-     OImode : "Octa", four registers (eight words).
-     CImode : "dodeCa", six registers (twelve words).
-     XImode : "heXadeca", eight registers (sixteen words).
-*)
-
-type inttype = B_TImode | B_EImode | B_OImode | B_CImode | B_XImode
-
-type shape_elt = Dreg | Qreg | Corereg | Immed | VecArray of int * shape_elt
-               | PtrTo of shape_elt | CstPtrTo of shape_elt
-              (* These next ones are used only in the test generator.  *)
-              | Element_of_dreg        (* Used for "lane" variants.  *)
-              | Element_of_qreg        (* Likewise.  *)
-              | All_elements_of_dreg   (* Used for "dup" variants.  *)
-              | Alternatives of shape_elt list (* Used for multiple valid operands *)
-
-type shape_form = All of int * shape_elt
-                | Long
-               | Long_noreg of shape_elt
-               | Wide
-               | Wide_noreg of shape_elt
-               | Narrow
-                | Long_imm
-                | Narrow_imm
-                | Binary_imm of shape_elt
-                | Use_operands of shape_elt array
-                | By_scalar of shape_elt
-                | Unary_scalar of shape_elt
-                | Wide_lane
-                | Wide_scalar
-                | Pair_result of shape_elt
-
-type arity = Arity0 of vectype
-           | Arity1 of vectype * vectype
-          | Arity2 of vectype * vectype * vectype
-          | Arity3 of vectype * vectype * vectype * vectype
-           | Arity4 of vectype * vectype * vectype * vectype * vectype
-
-type vecmode = V8QI | V4HI | V4HF |V2SI | V2SF | DI
-             | V16QI | V8HI | V4SI | V4SF | V2DI | TI
-             | QI | HI | SI | SF
-
-type opcode =
-  (* Binary ops.  *)
-    Vadd
-  | Vmul
-  | Vmla
-  | Vmls
-  | Vfma
-  | Vfms
-  | Vsub
-  | Vceq
-  | Vcge
-  | Vcgt
-  | Vcle
-  | Vclt
-  | Vcage
-  | Vcagt
-  | Vcale
-  | Vcalt
-  | Vtst
-  | Vabd
-  | Vaba
-  | Vmax
-  | Vmin
-  | Vpadd
-  | Vpada
-  | Vpmax
-  | Vpmin
-  | Vrecps
-  | Vrsqrts
-  | Vshl
-  | Vshr_n
-  | Vshl_n
-  | Vsra_n
-  | Vsri
-  | Vsli
-  (* Logic binops.  *)
-  | Vand
-  | Vorr
-  | Veor
-  | Vbic
-  | Vorn
-  | Vbsl
-  (* Ops with scalar.  *)
-  | Vmul_lane
-  | Vmla_lane
-  | Vmls_lane
-  | Vmul_n
-  | Vmla_n
-  | Vmls_n
-  | Vmull_n
-  | Vmull_lane
-  | Vqdmull_n
-  | Vqdmull_lane
-  | Vqdmulh_n
-  | Vqdmulh_lane
-  (* Unary ops.  *)
-  | Vrintn
-  | Vrinta
-  | Vrintp
-  | Vrintm
-  | Vrintz
-  | Vabs
-  | Vneg
-  | Vcls
-  | Vclz
-  | Vcnt
-  | Vrecpe
-  | Vrsqrte
-  | Vmvn
-  (* Vector extract.  *)
-  | Vext
-  (* Reverse elements.  *)
-  | Vrev64
-  | Vrev32
-  | Vrev16
-  (* Transposition ops.  *)
-  | Vtrn
-  | Vzip
-  | Vuzp
-  (* Loads and stores (VLD1/VST1/VLD2...), elements and structures.  *)
-  | Vldx of int
-  | Vstx of int
-  | Vldx_lane of int
-  | Vldx_dup of int
-  | Vstx_lane of int
-  (* Set/extract lanes from a vector.  *)
-  | Vget_lane
-  | Vset_lane
-  (* Initialize vector from bit pattern.  *)
-  | Vcreate
-  (* Set all lanes to same value.  *)
-  | Vdup_n
-  | Vmov_n  (* Is this the same?  *)
-  (* Duplicate scalar to all lanes of vector.  *)
-  | Vdup_lane
-  (* Combine vectors.  *)
-  | Vcombine
-  (* Get quadword high/low parts.  *)
-  | Vget_high
-  | Vget_low
-  (* Convert vectors.  *)
-  | Vcvt
-  | Vcvt_n
-  (* Narrow/lengthen vectors.  *)
-  | Vmovn
-  | Vmovl
-  (* Table lookup.  *)
-  | Vtbl of int
-  | Vtbx of int
-  (* Reinterpret casts.  *)
-  | Vreinterp
-
-let rev_elems revsize elsize nelts _ =
-  let mask = (revsize / elsize) - 1 in
-  let arr = Array.init nelts
-    (fun i -> i lxor mask) in
-  Array.to_list arr
-
-let permute_range i stride nelts increment =
-  let rec build i = function
-    0 -> []
-  | nelts -> i :: (i + stride) :: build (i + increment) (pred nelts) in
-  build i nelts
-
-(* Generate a list of integers suitable for vzip.  *)
-let zip_range i stride nelts = permute_range i stride nelts 1
-
-(* Generate a list of integers suitable for vunzip.  *)
-let uzip_range i stride nelts = permute_range i stride nelts 4
-
-(* Generate a list of integers suitable for trn.  *)
-let trn_range i stride nelts = permute_range i stride nelts 2
-
-let zip_elems _ nelts part =
-  match part with
-    `lo -> zip_range 0 nelts (nelts / 2)
-  | `hi -> zip_range (nelts / 2) nelts (nelts / 2)
-
-let uzip_elems _ nelts part =
-  match part with
-    `lo -> uzip_range 0 2 (nelts / 2)
-  | `hi -> uzip_range 1 2 (nelts / 2)
-
-let trn_elems _ nelts part =
-  match part with
-    `lo -> trn_range 0 nelts (nelts / 2)
-  | `hi -> trn_range 1 nelts (nelts / 2)
-
-(* Features used for documentation, to distinguish between some instruction
-   variants, and to signal special requirements (e.g. swapping arguments).  *)
-
-type features =
-    Halving
-  | Rounding
-  | Saturating
-  | Dst_unsign
-  | High_half
-  | Doubling
-  | Flipped of string  (* Builtin name to use with flipped arguments.  *)
-  | InfoWord  (* Pass an extra word for signage/rounding etc. (always passed
-                 for All _, Long, Wide, Narrow shape_forms.  *)
-    (* Implement builtin as shuffle.  The parameter is a function which returns
-       masks suitable for __builtin_shuffle: arguments are (element size,
-       number of elements, high/low part selector).  *)
-  | Use_shuffle of (int -> int -> [`lo|`hi] -> int list)
-    (* A specification as to the shape of instruction expected upon
-       disassembly, used if it differs from the shape used to build the
-       intrinsic prototype.  Multiple entries in the constructor's argument
-       indicate that the intrinsic expands to more than one assembly
-       instruction, each with a corresponding shape specified here.  *)
-  | Disassembles_as of shape_form list
-  | Builtin_name of string  (* Override the name of the builtin.  *)
-    (* Override the name of the instruction.  If more than one name
-       is specified, it means that the instruction can have any of those
-       names.  *)
-  | Instruction_name of string list
-    (* Mark that the intrinsic yields no instructions, or expands to yield
-       behavior that the test generator cannot test.  *)
-  | No_op
-    (* Mark that the intrinsic has constant arguments that cannot be set
-       to the defaults (zero for pointers and one otherwise) in the test
-       cases.  The function supplied must return the integer to be written
-       into the testcase for the argument number (0-based) supplied to it.  *)
-  | Const_valuator of (int -> int)
-  | Fixed_vector_reg
-  | Fixed_core_reg
-    (* Mark that the intrinsic requires __ARM_FEATURE_string to be defined.  *)
-  | Requires_feature of string
-    (* Mark that the intrinsic requires a particular architecture version.  *)
-  | Requires_arch of int
-    (* Mark that the intrinsic requires a particular bit in __ARM_FP to
-    be set.   *)
-  | Requires_FP_bit of int
-    (* Compiler optimization level for the test.  *)
-  | Compiler_optim of string
-
-exception MixedMode of elts * elts
-
-let rec elt_width = function
-    S8 | U8 | P8 | I8 | B8 -> 8
-  | S16 | U16 | P16 | I16 | B16 | F16 -> 16
-  | S32 | F32 | U32 | I32 | B32 -> 32
-  | S64 | U64 | P64 | I64 | B64 -> 64
-  | P128 -> 128
-  | Conv (a, b) ->
-      let wa = elt_width a and wb = elt_width b in
-      if wa = wb then wa else raise (MixedMode (a, b))
-  | Cast (a, b) -> raise (MixedMode (a, b))
-  | NoElts -> failwith "No elts"
-
-let rec elt_class = function
-    S8 | S16 | S32 | S64 -> Signed
-  | U8 | U16 | U32 | U64 -> Unsigned
-  | P8 | P16 | P64 | P128 -> Poly
-  | F16 | F32 -> Float
-  | I8 | I16 | I32 | I64 -> Int
-  | B8 | B16 | B32 | B64 -> Bits
-  | Conv (a, b) | Cast (a, b) -> ConvClass (elt_class a, elt_class b)
-  | NoElts -> NoType
-
-let elt_of_class_width c w =
-  match c, w with
-    Signed, 8 -> S8
-  | Signed, 16 -> S16
-  | Signed, 32 -> S32
-  | Signed, 64 -> S64
-  | Float, 16 -> F16
-  | Float, 32 -> F32
-  | Unsigned, 8 -> U8
-  | Unsigned, 16 -> U16
-  | Unsigned, 32 -> U32
-  | Unsigned, 64 -> U64
-  | Poly, 8 -> P8
-  | Poly, 16 -> P16
-  | Poly, 64 -> P64
-  | Poly, 128 -> P128
-  | Int, 8 -> I8
-  | Int, 16 -> I16
-  | Int, 32 -> I32
-  | Int, 64 -> I64
-  | Bits, 8 -> B8
-  | Bits, 16 -> B16
-  | Bits, 32 -> B32
-  | Bits, 64 -> B64
-  | _ -> failwith "Bad element type"
-
-(* Return unsigned integer element the same width as argument.  *)
-let unsigned_of_elt elt =
-  elt_of_class_width Unsigned (elt_width elt)
-
-let signed_of_elt elt =
-  elt_of_class_width Signed (elt_width elt)
-
-(* Return untyped bits element the same width as argument.  *)
-let bits_of_elt elt =
-  elt_of_class_width Bits (elt_width elt)
-
-let non_signed_variant = function
-    S8 -> I8
-  | S16 -> I16
-  | S32 -> I32
-  | S64 -> I64
-  | U8 -> I8
-  | U16 -> I16
-  | U32 -> I32
-  | U64 -> I64
-  | x -> x
-
-let poly_unsigned_variant v =
-  let elclass = match elt_class v with
-    Poly -> Unsigned
-  | x -> x in
-  elt_of_class_width elclass (elt_width v)
-
-let widen_elt elt =
-  let w = elt_width elt
-  and c = elt_class elt in
-  elt_of_class_width c (w * 2)
-
-let narrow_elt elt =
-  let w = elt_width elt
-  and c = elt_class elt in
-  elt_of_class_width c (w / 2)
-
-(* If we're trying to find a mode from a "Use_operands" instruction, use the
-   last vector operand as the dominant mode used to invoke the correct builtin.
-   We must stick to this rule in neon.md.  *)
-let find_key_operand operands =
-  let rec scan opno =
-    match operands.(opno) with
-      Qreg -> Qreg
-    | Dreg -> Dreg
-    | VecArray (_, Qreg) -> Qreg
-    | VecArray (_, Dreg) -> Dreg
-    | _ -> scan (opno-1)
-  in
-    scan ((Array.length operands) - 1)
-
-(* Find a vecmode from a shape_elt ELT for an instruction with shape_form
-   SHAPE.  For a Use_operands shape, if ARGPOS is passed then return the mode
-   for the given argument position, else determine which argument to return a
-   mode for automatically.  *)
-
-let rec mode_of_elt ?argpos elt shape =
-  let flt = match elt_class elt with
-    Float | ConvClass(_, Float) -> true | _ -> false in
-  let idx =
-    match elt_width elt with
-      8 -> 0 | 16 -> 1 | 32 -> 2 | 64 -> 3 | 128 -> 4
-    | _ -> failwith "Bad element width"
-  in match shape with
-    All (_, Dreg) | By_scalar Dreg | Pair_result Dreg | Unary_scalar Dreg
-  | Binary_imm Dreg | Long_noreg Dreg | Wide_noreg Dreg ->
-      if flt then
-        [| V8QI; V4HF; V2SF; DI |].(idx)
-      else
-        [| V8QI; V4HI; V2SI; DI |].(idx)
-  | All (_, Qreg) | By_scalar Qreg | Pair_result Qreg | Unary_scalar Qreg
-  | Binary_imm Qreg | Long_noreg Qreg | Wide_noreg Qreg ->
-      [| V16QI; V8HI; if flt then V4SF else V4SI; V2DI; TI|].(idx)
-  | All (_, (Corereg | PtrTo _ | CstPtrTo _)) ->
-      [| QI; HI; if flt then SF else SI; DI |].(idx)
-  | Long | Wide | Wide_lane | Wide_scalar
-  | Long_imm ->
-      [| V8QI; V4HI; V2SI; DI |].(idx)
-  | Narrow | Narrow_imm -> [| V16QI; V8HI; V4SI; V2DI |].(idx)
-  | Use_operands ops ->
-      begin match argpos with
-        None -> mode_of_elt ?argpos elt (All (0, (find_key_operand ops)))
-      | Some pos -> mode_of_elt ?argpos elt (All (0, ops.(pos)))
-      end
-  | _ -> failwith "invalid shape"
-
-(* Modify an element type dependent on the shape of the instruction and the
-   operand number.  *)
-
-let shapemap shape no =
-  let ident = fun x -> x in
-  match shape with
-    All _ | Use_operands _ | By_scalar _ | Pair_result _ | Unary_scalar _
-  | Binary_imm _ -> ident
-  | Long | Long_noreg _ | Wide_scalar | Long_imm ->
-      [| widen_elt; ident; ident |].(no)
-  | Wide | Wide_noreg _ -> [| widen_elt; widen_elt; ident |].(no)
-  | Wide_lane -> [| widen_elt; ident; ident; ident |].(no)
-  | Narrow | Narrow_imm -> [| narrow_elt; ident; ident |].(no)
-
-(* Register type (D/Q) of an operand, based on shape and operand number.  *)
-
-let regmap shape no =
-  match shape with
-    All (_, reg) | Long_noreg reg | Wide_noreg reg -> reg
-  | Long -> [| Qreg; Dreg; Dreg |].(no)
-  | Wide -> [| Qreg; Qreg; Dreg |].(no)
-  | Narrow -> [| Dreg; Qreg; Qreg |].(no)
-  | Wide_lane -> [| Qreg; Dreg; Dreg; Immed |].(no)
-  | Wide_scalar -> [| Qreg; Dreg; Corereg |].(no)
-  | By_scalar reg -> [| reg; reg; Dreg; Immed |].(no)
-  | Unary_scalar reg -> [| reg; Dreg; Immed |].(no)
-  | Pair_result reg -> [| VecArray (2, reg); reg; reg |].(no)
-  | Binary_imm reg -> [| reg; reg; Immed |].(no)
-  | Long_imm -> [| Qreg; Dreg; Immed |].(no)
-  | Narrow_imm -> [| Dreg; Qreg; Immed |].(no)
-  | Use_operands these -> these.(no)
-
-let type_for_elt shape elt no =
-  let elt = (shapemap shape no) elt in
-  let reg = regmap shape no in
-  let rec type_for_reg_elt reg elt =
-    match reg with
-      Dreg ->
-        begin match elt with
-          S8 -> T_int8x8
-        | S16 -> T_int16x4
-        | S32 -> T_int32x2
-        | S64 -> T_int64x1
-        | U8 -> T_uint8x8
-        | U16 -> T_uint16x4
-        | U32 -> T_uint32x2
-        | U64 -> T_uint64x1
-        | P64 -> T_poly64x1
-        | P128 -> T_poly128
-        | F16 -> T_float16x4
-        | F32 -> T_float32x2
-        | P8 -> T_poly8x8
-        | P16 -> T_poly16x4
-        | _ -> failwith "Bad elt type for Dreg"
-        end
-    | Qreg ->
-        begin match elt with
-          S8 -> T_int8x16
-        | S16 -> T_int16x8
-        | S32 -> T_int32x4
-        | S64 -> T_int64x2
-        | U8 -> T_uint8x16
-        | U16 -> T_uint16x8
-        | U32 -> T_uint32x4
-        | U64 -> T_uint64x2
-        | F32 -> T_float32x4
-        | P8 -> T_poly8x16
-        | P16 -> T_poly16x8
-        | P64 -> T_poly64x2
-        | P128 -> T_poly128
-        | _ -> failwith "Bad elt type for Qreg"
-        end
-    | Corereg ->
-        begin match elt with
-          S8 -> T_int8
-        | S16 -> T_int16
-        | S32 -> T_int32
-        | S64 -> T_int64
-        | U8 -> T_uint8
-        | U16 -> T_uint16
-        | U32 -> T_uint32
-        | U64 -> T_uint64
-        | P8 -> T_poly8
-        | P16 -> T_poly16
-        | P64 -> T_poly64
-        | P128 -> T_poly128
-        | F32 -> T_float32
-        | _ -> failwith "Bad elt type for Corereg"
-        end
-    | Immed ->
-        T_immediate (0, 0)
-    | VecArray (num, sub) ->
-        T_arrayof (num, type_for_reg_elt sub elt)
-    | PtrTo x ->
-        T_ptrto (type_for_reg_elt x elt)
-    | CstPtrTo x ->
-        T_ptrto (T_const (type_for_reg_elt x elt))
-    (* Anything else is solely for the use of the test generator.  *)
-    | _ -> assert false
-  in
-    type_for_reg_elt reg elt
-
-(* Return size of a vector type, in bits.  *)
-let vectype_size = function
-    T_int8x8 | T_int16x4 | T_int32x2 | T_int64x1
-  | T_uint8x8 | T_uint16x4 | T_uint32x2 | T_uint64x1
-  | T_float32x2 | T_poly8x8 | T_poly64x1 | T_poly16x4 | T_float16x4 -> 64
-  | T_int8x16 | T_int16x8 | T_int32x4 | T_int64x2
-  | T_uint8x16 | T_uint16x8  | T_uint32x4  | T_uint64x2
-  | T_float32x4 | T_poly8x16 | T_poly64x2 | T_poly16x8 -> 128
-  | _ -> raise Not_found
-
-let inttype_for_array num elttype =
-  let eltsize = vectype_size elttype in
-  let numwords = (num * eltsize) / 32 in
-  match numwords with
-    4 -> B_TImode
-  | 6 -> B_EImode
-  | 8 -> B_OImode
-  | 12 -> B_CImode
-  | 16 -> B_XImode
-  | _ -> failwith ("no int type for size " ^ string_of_int numwords)
-
-(* These functions return pairs of (internal, external) types, where "internal"
-   types are those seen by GCC, and "external" are those seen by the assembler.
-   These types aren't necessarily the same, since the intrinsics can munge more
-   than one C type into each assembler opcode.  *)
-
-let make_sign_invariant func shape elt =
-  let arity, elt' = func shape elt in
-  arity, non_signed_variant elt'
-
-(* Don't restrict any types.  *)
-
-let elts_same make_arity shape elt =
-  let vtype = type_for_elt shape elt in
-  make_arity vtype, elt
-
-(* As sign_invar_*, but when sign matters.  *)
-let elts_same_io_lane =
-  elts_same (fun vtype -> Arity4 (vtype 0, vtype 0, vtype 1, vtype 2, vtype 3))
-
-let elts_same_io =
-  elts_same (fun vtype -> Arity3 (vtype 0, vtype 0, vtype 1, vtype 2))
-
-let elts_same_2_lane =
-  elts_same (fun vtype -> Arity3 (vtype 0, vtype 1, vtype 2, vtype 3))
-
-let elts_same_3 = elts_same_2_lane
-
-let elts_same_2 =
-  elts_same (fun vtype -> Arity2 (vtype 0, vtype 1, vtype 2))
-
-let elts_same_1 =
-  elts_same (fun vtype -> Arity1 (vtype 0, vtype 1))
-
-(* Use for signed/unsigned invariant operations (i.e. where the operation
-   doesn't depend on the sign of the data.  *)
-
-let sign_invar_io_lane = make_sign_invariant elts_same_io_lane
-let sign_invar_io = make_sign_invariant elts_same_io
-let sign_invar_2_lane = make_sign_invariant elts_same_2_lane
-let sign_invar_2 = make_sign_invariant elts_same_2
-let sign_invar_1 = make_sign_invariant elts_same_1
-
-(* Sign-sensitive comparison.  *)
-
-let cmp_sign_matters shape elt =
-  let vtype = type_for_elt shape elt
-  and rtype = type_for_elt shape (unsigned_of_elt elt) 0 in
-  Arity2 (rtype, vtype 1, vtype 2), elt
-
-(* Signed/unsigned invariant comparison.  *)
-
-let cmp_sign_invar shape elt =
-  let shape', elt' = cmp_sign_matters shape elt in
-  let elt'' =
-    match non_signed_variant elt' with
-      P8 -> I8
-    | x -> x
-  in
-    shape', elt''
-
-(* Comparison (VTST) where only the element width matters.  *)
-
-let cmp_bits shape elt =
-  let vtype = type_for_elt shape elt
-  and rtype = type_for_elt shape (unsigned_of_elt elt) 0
-  and bits_only = bits_of_elt elt in
-  Arity2 (rtype, vtype 1, vtype 2), bits_only
-
-let reg_shift shape elt =
-  let vtype = type_for_elt shape elt
-  and op2type = type_for_elt shape (signed_of_elt elt) 2 in
-  Arity2 (vtype 0, vtype 1, op2type), elt
-
-(* Genericised constant-shift type-generating function.  *)
-
-let const_shift mkimm ?arity ?result shape elt =
-  let op2type = (shapemap shape 2) elt in
-  let op2width = elt_width op2type in
-  let op2 = mkimm op2width
-  and op1 = type_for_elt shape elt 1
-  and r_elt =
-    match result with
-      None -> elt
-    | Some restriction -> restriction elt in
-  let rtype = type_for_elt shape r_elt 0 in
-  match arity with
-    None -> Arity2 (rtype, op1, op2), elt
-  | Some mkarity -> mkarity rtype op1 op2, elt
-
-(* Use for immediate right-shifts.  *)
-
-let shift_right shape elt =
-  const_shift (fun imm -> T_immediate (1, imm)) shape elt
-
-let shift_right_acc shape elt =
-  const_shift (fun imm -> T_immediate (1, imm))
-    ~arity:(fun dst op1 op2 -> Arity3 (dst, dst, op1, op2)) shape elt
-
-(* Use for immediate right-shifts when the operation doesn't care about
-   signedness.  *)
-
-let shift_right_sign_invar =
-  make_sign_invariant shift_right
-
-(* Immediate right-shift; result is unsigned even when operand is signed.  *)
-
-let shift_right_to_uns shape elt =
-  const_shift (fun imm -> T_immediate (1, imm)) ~result:unsigned_of_elt
-    shape elt
-
-(* Immediate left-shift.  *)
-
-let shift_left shape elt =
-  const_shift (fun imm -> T_immediate (0, imm - 1)) shape elt
-
-(* Immediate left-shift, unsigned result.  *)
-
-let shift_left_to_uns shape elt =
-  const_shift (fun imm -> T_immediate (0, imm - 1)) ~result:unsigned_of_elt
-    shape elt
-
-(* Immediate left-shift, don't care about signs.  *)
-
-let shift_left_sign_invar =
-  make_sign_invariant shift_left
-
-(* Shift left/right and insert: only element size matters.  *)
-
-let shift_insert shape elt =
-  let arity, elt =
-    const_shift (fun imm -> T_immediate (1, imm))
-    ~arity:(fun dst op1 op2 -> Arity3 (dst, dst, op1, op2)) shape elt in
-  arity, bits_of_elt elt
-
-(* Get/set lane.  *)
-
-let get_lane shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity2 (vtype 0, vtype 1, vtype 2),
-    (match elt with P8 -> U8 | P16 -> U16 | S32 | U32 | F32 -> B32 | x -> x)
-
-let set_lane shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (vtype 0, vtype 1, vtype 2, vtype 3), bits_of_elt elt
-
-let set_lane_notype shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (vtype 0, vtype 1, vtype 2, vtype 3), NoElts
-
-let create_vector shape elt =
-  let vtype = type_for_elt shape U64 1
-  and rtype = type_for_elt shape elt 0 in
-  Arity1 (rtype, vtype), elt
-
-let conv make_arity shape elt =
-  let edest, esrc = match elt with
-    Conv (edest, esrc) | Cast (edest, esrc) -> edest, esrc
-  | _ -> failwith "Non-conversion element in conversion" in
-  let vtype = type_for_elt shape esrc
-  and rtype = type_for_elt shape edest 0 in
-  make_arity rtype vtype, elt
-
-let conv_1 = conv (fun rtype vtype -> Arity1 (rtype, vtype 1))
-let conv_2 = conv (fun rtype vtype -> Arity2 (rtype, vtype 1, vtype 2))
-
-(* Operation has an unsigned result even if operands are signed.  *)
-
-let dst_unsign make_arity shape elt =
-  let vtype = type_for_elt shape elt
-  and rtype = type_for_elt shape (unsigned_of_elt elt) 0 in
-  make_arity rtype vtype, elt
-
-let dst_unsign_1 = dst_unsign (fun rtype vtype -> Arity1 (rtype, vtype 1))
-
-let make_bits_only func shape elt =
-  let arity, elt' = func shape elt in
-  arity, bits_of_elt elt'
-
-(* Extend operation.  *)
-
-let extend shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (vtype 0, vtype 1, vtype 2, vtype 3), bits_of_elt elt
-
-(* Table look-up operations. Operand 2 is signed/unsigned for signed/unsigned
-   integer ops respectively, or unsigned for polynomial ops.  *)
-
-let table mkarity shape elt =
-  let vtype = type_for_elt shape elt in
-  let op2 = type_for_elt shape (poly_unsigned_variant elt) 2 in
-  mkarity vtype op2, bits_of_elt elt
-
-let table_2 = table (fun vtype op2 -> Arity2 (vtype 0, vtype 1, op2))
-let table_io = table (fun vtype op2 -> Arity3 (vtype 0, vtype 0, vtype 1, op2))
-
-(* Operations where only bits matter.  *)
-
-let bits_1 = make_bits_only elts_same_1
-let bits_2 = make_bits_only elts_same_2
-let bits_3 = make_bits_only elts_same_3
-
-(* Store insns.  *)
-let store_1 shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity2 (T_void, vtype 0, vtype 1), bits_of_elt elt
-
-let store_3 shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (T_void, vtype 0, vtype 1, vtype 2), bits_of_elt elt
-
-let make_notype func shape elt =
-  let arity, _ = func shape elt in
-  arity, NoElts
-
-let notype_1 = make_notype elts_same_1
-let notype_2 = make_notype elts_same_2
-let notype_3 = make_notype elts_same_3
-
-(* Bit-select operations (first operand is unsigned int).  *)
-
-let bit_select shape elt =
-  let vtype = type_for_elt shape elt
-  and itype = type_for_elt shape (unsigned_of_elt elt) in
-  Arity3 (vtype 0, itype 1, vtype 2, vtype 3), NoElts
-
-(* Common lists of supported element types.  *)
-
-let s_8_32 = [S8; S16; S32]
-let u_8_32 = [U8; U16; U32]
-let su_8_32 = [S8; S16; S32; U8; U16; U32]
-let su_8_64 = S64 :: U64 :: su_8_32
-let su_16_64 = [S16; S32; S64; U16; U32; U64]
-let pf_su_8_16 = [P8; P16; S8; S16; U8; U16]
-let pf_su_8_32 = P8 :: P16 :: F32 :: su_8_32
-let pf_su_8_64 = P8 :: P16 :: F32 :: su_8_64
-let suf_32 = [S32; U32; F32]
-
-let ops =
-  [
-    (* Addition.  *)
-    Vadd, [], All (3, Dreg), "vadd", sign_invar_2, F32 :: su_8_32;
-    Vadd, [No_op], All (3, Dreg), "vadd", sign_invar_2, [S64; U64];
-    Vadd, [], All (3, Qreg), "vaddQ", sign_invar_2, F32 :: su_8_64;
-    Vadd, [], Long, "vaddl", elts_same_2, su_8_32;
-    Vadd, [], Wide, "vaddw", elts_same_2, su_8_32;
-    Vadd, [Halving], All (3, Dreg), "vhadd", elts_same_2, su_8_32;
-    Vadd, [Halving], All (3, Qreg), "vhaddQ", elts_same_2, su_8_32;
-    Vadd, [Instruction_name ["vrhadd"]; Rounding; Halving],
-      All (3, Dreg), "vRhadd", elts_same_2, su_8_32;
-    Vadd, [Instruction_name ["vrhadd"]; Rounding; Halving],
-      All (3, Qreg), "vRhaddQ", elts_same_2, su_8_32;
-    Vadd, [Saturating], All (3, Dreg), "vqadd", elts_same_2, su_8_64;
-    Vadd, [Saturating], All (3, Qreg), "vqaddQ", elts_same_2, su_8_64;
-    Vadd, [High_half], Narrow, "vaddhn", sign_invar_2, su_16_64;
-    Vadd, [Instruction_name ["vraddhn"]; Rounding; High_half],
-      Narrow, "vRaddhn", sign_invar_2, su_16_64;
-
-    (* Multiplication.  *)
-    Vmul, [], All (3, Dreg), "vmul", sign_invar_2, P8 :: F32 :: su_8_32;
-    Vmul, [], All (3, Qreg), "vmulQ", sign_invar_2, P8 :: F32 :: su_8_32;
-    Vmul, [Saturating; Doubling; High_half], All (3, Dreg), "vqdmulh",
-      elts_same_2, [S16; S32];
-    Vmul, [Saturating; Doubling; High_half], All (3, Qreg), "vqdmulhQ",
-      elts_same_2, [S16; S32];
-    Vmul,
-      [Saturating; Rounding; Doubling; High_half;
-       Instruction_name ["vqrdmulh"]],
-      All (3, Dreg), "vqRdmulh",
-      elts_same_2, [S16; S32];
-    Vmul,
-      [Saturating; Rounding; Doubling; High_half;
-       Instruction_name ["vqrdmulh"]],
-      All (3, Qreg), "vqRdmulhQ",
-      elts_same_2, [S16; S32];
-    Vmul, [], Long, "vmull", elts_same_2, P8 :: su_8_32;
-    Vmul, [Saturating; Doubling], Long, "vqdmull", elts_same_2, [S16; S32];
-
-    (* Multiply-accumulate. *)
-    Vmla, [], All (3, Dreg), "vmla", sign_invar_io, F32 :: su_8_32;
-    Vmla, [], All (3, Qreg), "vmlaQ", sign_invar_io, F32 :: su_8_32;
-    Vmla, [], Long, "vmlal", elts_same_io, su_8_32;
-    Vmla, [Saturating; Doubling], Long, "vqdmlal", elts_same_io, [S16; S32];
-
-    (* Multiply-subtract.  *)
-    Vmls, [], All (3, Dreg), "vmls", sign_invar_io, F32 :: su_8_32;
-    Vmls, [], All (3, Qreg), "vmlsQ", sign_invar_io, F32 :: su_8_32;
-    Vmls, [], Long, "vmlsl", elts_same_io, su_8_32;
-    Vmls, [Saturating; Doubling], Long, "vqdmlsl", elts_same_io, [S16; S32];
-
-    (* Fused-multiply-accumulate. *)
-    Vfma, [Requires_feature "FMA"], All (3, Dreg), "vfma", elts_same_io, [F32];
-    Vfma, [Requires_feature "FMA"], All (3, Qreg), "vfmaQ", elts_same_io, [F32];
-    Vfms, [Requires_feature "FMA"], All (3, Dreg), "vfms", elts_same_io, [F32];
-    Vfms, [Requires_feature "FMA"], All (3, Qreg), "vfmsQ", elts_same_io, [F32];
-
-    (* Round to integral. *)
-    Vrintn, [Builtin_name "vrintn"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrndn", elts_same_1, [F32];
-    Vrintn, [Builtin_name "vrintn"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqn", elts_same_1, [F32];
-    Vrinta, [Builtin_name "vrinta"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrnda", elts_same_1, [F32];
-    Vrinta, [Builtin_name "vrinta"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqa", elts_same_1, [F32];
-    Vrintp, [Builtin_name "vrintp"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrndp", elts_same_1, [F32];
-    Vrintp, [Builtin_name "vrintp"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqp", elts_same_1, [F32];
-    Vrintm, [Builtin_name "vrintm"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrndm", elts_same_1, [F32];
-    Vrintm, [Builtin_name "vrintm"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqm", elts_same_1, [F32];
-    Vrintz, [Builtin_name "vrintz"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrnd", elts_same_1, [F32];
-    Vrintz, [Builtin_name "vrintz"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndq", elts_same_1, [F32];
-    (* Subtraction.  *)
-    Vsub, [], All (3, Dreg), "vsub", sign_invar_2, F32 :: su_8_32;
-    Vsub, [No_op], All (3, Dreg), "vsub", sign_invar_2,  [S64; U64];
-    Vsub, [], All (3, Qreg), "vsubQ", sign_invar_2, F32 :: su_8_64;
-    Vsub, [], Long, "vsubl", elts_same_2, su_8_32;
-    Vsub, [], Wide, "vsubw", elts_same_2, su_8_32;
-    Vsub, [Halving], All (3, Dreg), "vhsub", elts_same_2, su_8_32;
-    Vsub, [Halving], All (3, Qreg), "vhsubQ", elts_same_2, su_8_32;
-    Vsub, [Saturating], All (3, Dreg), "vqsub", elts_same_2, su_8_64;
-    Vsub, [Saturating], All (3, Qreg), "vqsubQ", elts_same_2, su_8_64;
-    Vsub, [High_half], Narrow, "vsubhn", sign_invar_2, su_16_64;
-    Vsub, [Instruction_name ["vrsubhn"]; Rounding; High_half],
-      Narrow, "vRsubhn", sign_invar_2, su_16_64;
-
-    (* Comparison, equal.  *)
-    Vceq, [], All (3, Dreg), "vceq", cmp_sign_invar, P8 :: F32 :: su_8_32;
-    Vceq, [], All (3, Qreg), "vceqQ", cmp_sign_invar, P8 :: F32 :: su_8_32;
-
-    (* Comparison, greater-than or equal.  *)
-    Vcge, [], All (3, Dreg), "vcge", cmp_sign_matters, F32 :: s_8_32;
-    Vcge, [Instruction_name ["vcge"]; Builtin_name "vcgeu"],
-      All (3, Dreg), "vcge", cmp_sign_matters,
-      u_8_32;
-    Vcge, [], All (3, Qreg), "vcgeQ", cmp_sign_matters, F32 :: s_8_32;
-    Vcge, [Instruction_name ["vcge"]; Builtin_name "vcgeu"],
-      All (3, Qreg), "vcgeQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Comparison, less-than or equal.  *)
-    Vcle, [Flipped "vcge"], All (3, Dreg), "vcle", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vcle, [Instruction_name ["vcge"]; Flipped "vcgeu"],
-      All (3, Dreg), "vcle", cmp_sign_matters,
-      u_8_32;
-    Vcle, [Instruction_name ["vcge"]; Flipped "vcgeQ"],
-      All (3, Qreg), "vcleQ", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vcle, [Instruction_name ["vcge"]; Flipped "vcgeuQ"],
-      All (3, Qreg), "vcleQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Comparison, greater-than.  *)
-    Vcgt, [], All (3, Dreg), "vcgt", cmp_sign_matters, F32 :: s_8_32;
-    Vcgt, [Instruction_name ["vcgt"]; Builtin_name "vcgtu"],
-      All (3, Dreg), "vcgt", cmp_sign_matters,
-      u_8_32;
-    Vcgt, [], All (3, Qreg), "vcgtQ", cmp_sign_matters, F32 :: s_8_32;
-    Vcgt, [Instruction_name ["vcgt"]; Builtin_name "vcgtu"],
-      All (3, Qreg), "vcgtQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Comparison, less-than.  *)
-    Vclt, [Flipped "vcgt"], All (3, Dreg), "vclt", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtu"],
-      All (3, Dreg), "vclt", cmp_sign_matters,
-      u_8_32;
-    Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtQ"],
-      All (3, Qreg), "vcltQ", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtuQ"],
-      All (3, Qreg), "vcltQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Compare absolute greater-than or equal.  *)
-    Vcage, [Instruction_name ["vacge"]],
-      All (3, Dreg), "vcage", cmp_sign_matters, [F32];
-    Vcage, [Instruction_name ["vacge"]],
-      All (3, Qreg), "vcageQ", cmp_sign_matters, [F32];
-
-    (* Compare absolute less-than or equal.  *)
-    Vcale, [Instruction_name ["vacge"]; Flipped "vcage"],
-      All (3, Dreg), "vcale", cmp_sign_matters, [F32];
-    Vcale, [Instruction_name ["vacge"]; Flipped "vcageQ"],
-      All (3, Qreg), "vcaleQ", cmp_sign_matters, [F32];
-
-    (* Compare absolute greater-than or equal.  *)
-    Vcagt, [Instruction_name ["vacgt"]],
-      All (3, Dreg), "vcagt", cmp_sign_matters, [F32];
-    Vcagt, [Instruction_name ["vacgt"]],
-      All (3, Qreg), "vcagtQ", cmp_sign_matters, [F32];
-
-    (* Compare absolute less-than or equal.  *)
-    Vcalt, [Instruction_name ["vacgt"]; Flipped "vcagt"],
-      All (3, Dreg), "vcalt", cmp_sign_matters, [F32];
-    Vcalt, [Instruction_name ["vacgt"]; Flipped "vcagtQ"],
-      All (3, Qreg), "vcaltQ", cmp_sign_matters, [F32];
-
-    (* Test bits.  *)
-    Vtst, [], All (3, Dreg), "vtst", cmp_bits, P8 :: su_8_32;
-    Vtst, [], All (3, Qreg), "vtstQ", cmp_bits, P8 :: su_8_32;
-
-    (* Absolute difference.  *)
-    Vabd, [], All (3, Dreg), "vabd", elts_same_2, F32 :: su_8_32;
-    Vabd, [], All (3, Qreg), "vabdQ", elts_same_2, F32 :: su_8_32;
-    Vabd, [], Long, "vabdl", elts_same_2, su_8_32;
-
-    (* Absolute difference and accumulate.  *)
-    Vaba, [], All (3, Dreg), "vaba", elts_same_io, su_8_32;
-    Vaba, [], All (3, Qreg), "vabaQ", elts_same_io, su_8_32;
-    Vaba, [], Long, "vabal", elts_same_io, su_8_32;
-
-    (* Max.  *)
-    Vmax, [], All (3, Dreg), "vmax", elts_same_2, F32 :: su_8_32;
-    Vmax, [], All (3, Qreg), "vmaxQ", elts_same_2, F32 :: su_8_32;
-
-    (* Min.  *)
-    Vmin, [], All (3, Dreg), "vmin", elts_same_2, F32 :: su_8_32;
-    Vmin, [], All (3, Qreg), "vminQ", elts_same_2, F32 :: su_8_32;
-
-    (* Pairwise add.  *)
-    Vpadd, [], All (3, Dreg), "vpadd", sign_invar_2, F32 :: su_8_32;
-    Vpadd, [], Long_noreg Dreg, "vpaddl", elts_same_1, su_8_32;
-    Vpadd, [], Long_noreg Qreg, "vpaddlQ", elts_same_1, su_8_32;
-
-    (* Pairwise add, widen and accumulate.  *)
-    Vpada, [], Wide_noreg Dreg, "vpadal", elts_same_2, su_8_32;
-    Vpada, [], Wide_noreg Qreg, "vpadalQ", elts_same_2, su_8_32;
-
-    (* Folding maximum, minimum.  *)
-    Vpmax, [], All (3, Dreg), "vpmax", elts_same_2, F32 :: su_8_32;
-    Vpmin, [], All (3, Dreg), "vpmin", elts_same_2, F32 :: su_8_32;
-
-    (* Reciprocal step.  *)
-    Vrecps, [], All (3, Dreg), "vrecps", elts_same_2, [F32];
-    Vrecps, [], All (3, Qreg), "vrecpsQ", elts_same_2, [F32];
-    Vrsqrts, [], All (3, Dreg), "vrsqrts", elts_same_2, [F32];
-    Vrsqrts, [], All (3, Qreg), "vrsqrtsQ", elts_same_2, [F32];
-
-    (* Vector shift left.  *)
-    Vshl, [], All (3, Dreg), "vshl", reg_shift, su_8_64;
-    Vshl, [], All (3, Qreg), "vshlQ", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vrshl"]; Rounding],
-      All (3, Dreg), "vRshl", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vrshl"]; Rounding],
-      All (3, Qreg), "vRshlQ", reg_shift, su_8_64;
-    Vshl, [Saturating], All (3, Dreg), "vqshl", reg_shift, su_8_64;
-    Vshl, [Saturating], All (3, Qreg), "vqshlQ", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vqrshl"]; Saturating; Rounding],
-      All (3, Dreg), "vqRshl", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vqrshl"]; Saturating; Rounding],
-      All (3, Qreg), "vqRshlQ", reg_shift, su_8_64;
-
-    (* Vector shift right by constant.  *)
-    Vshr_n, [], Binary_imm Dreg, "vshr_n", shift_right, su_8_64;
-    Vshr_n, [], Binary_imm Qreg, "vshrQ_n", shift_right, su_8_64;
-    Vshr_n, [Instruction_name ["vrshr"]; Rounding], Binary_imm Dreg,
-      "vRshr_n", shift_right, su_8_64;
-    Vshr_n, [Instruction_name ["vrshr"]; Rounding], Binary_imm Qreg,
-      "vRshrQ_n", shift_right, su_8_64;
-    Vshr_n, [], Narrow_imm, "vshrn_n", shift_right_sign_invar, su_16_64;
-    Vshr_n, [Instruction_name ["vrshrn"]; Rounding], Narrow_imm, "vRshrn_n",
-      shift_right_sign_invar, su_16_64;
-    Vshr_n, [Saturating], Narrow_imm, "vqshrn_n", shift_right, su_16_64;
-    Vshr_n, [Instruction_name ["vqrshrn"]; Saturating; Rounding], Narrow_imm,
-      "vqRshrn_n", shift_right, su_16_64;
-    Vshr_n, [Saturating; Dst_unsign], Narrow_imm, "vqshrun_n",
-      shift_right_to_uns, [S16; S32; S64];
-    Vshr_n, [Instruction_name ["vqrshrun"]; Saturating; Dst_unsign; Rounding],
-      Narrow_imm, "vqRshrun_n", shift_right_to_uns, [S16; S32; S64];
-
-    (* Vector shift left by constant.  *)
-    Vshl_n, [], Binary_imm Dreg, "vshl_n", shift_left_sign_invar, su_8_64;
-    Vshl_n, [], Binary_imm Qreg, "vshlQ_n", shift_left_sign_invar, su_8_64;
-    Vshl_n, [Saturating], Binary_imm Dreg, "vqshl_n", shift_left, su_8_64;
-    Vshl_n, [Saturating], Binary_imm Qreg, "vqshlQ_n", shift_left, su_8_64;
-    Vshl_n, [Saturating; Dst_unsign], Binary_imm Dreg, "vqshlu_n",
-      shift_left_to_uns, [S8; S16; S32; S64];
-    Vshl_n, [Saturating; Dst_unsign], Binary_imm Qreg, "vqshluQ_n",
-      shift_left_to_uns, [S8; S16; S32; S64];
-    Vshl_n, [], Long_imm, "vshll_n", shift_left, su_8_32;
-
-    (* Vector shift right by constant and accumulate.  *)
-    Vsra_n, [], Binary_imm Dreg, "vsra_n", shift_right_acc, su_8_64;
-    Vsra_n, [], Binary_imm Qreg, "vsraQ_n", shift_right_acc, su_8_64;
-    Vsra_n, [Instruction_name ["vrsra"]; Rounding], Binary_imm Dreg,
-      "vRsra_n", shift_right_acc, su_8_64;
-    Vsra_n, [Instruction_name ["vrsra"]; Rounding], Binary_imm Qreg,
-      "vRsraQ_n", shift_right_acc, su_8_64;
-
-    (* Vector shift right and insert.  *)
-    Vsri, [Requires_feature "CRYPTO"], Use_operands [| Dreg; Dreg; Immed |], "vsri_n", shift_insert,
-      [P64];
-    Vsri, [], Use_operands [| Dreg; Dreg; Immed |], "vsri_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-    Vsri, [Requires_feature "CRYPTO"], Use_operands [| Qreg; Qreg; Immed |], "vsriQ_n", shift_insert,
-      [P64];
-    Vsri, [], Use_operands [| Qreg; Qreg; Immed |], "vsriQ_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-
-    (* Vector shift left and insert.  *)
-    Vsli, [Requires_feature "CRYPTO"], Use_operands [| Dreg; Dreg; Immed |], "vsli_n", shift_insert,
-      [P64];
-    Vsli, [], Use_operands [| Dreg; Dreg; Immed |], "vsli_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-    Vsli, [Requires_feature "CRYPTO"], Use_operands [| Qreg; Qreg; Immed |], "vsliQ_n", shift_insert,
-      [P64];
-    Vsli, [], Use_operands [| Qreg; Qreg; Immed |], "vsliQ_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-
-    (* Absolute value.  *)
-    Vabs, [], All (2, Dreg), "vabs", elts_same_1, [S8; S16; S32; F32];
-    Vabs, [], All (2, Qreg), "vabsQ", elts_same_1, [S8; S16; S32; F32];
-    Vabs, [Saturating], All (2, Dreg), "vqabs", elts_same_1, [S8; S16; S32];
-    Vabs, [Saturating], All (2, Qreg), "vqabsQ", elts_same_1, [S8; S16; S32];
-
-    (* Negate.  *)
-    Vneg, [], All (2, Dreg), "vneg", elts_same_1, [S8; S16; S32; F32];
-    Vneg, [], All (2, Qreg), "vnegQ", elts_same_1, [S8; S16; S32; F32];
-    Vneg, [Saturating], All (2, Dreg), "vqneg", elts_same_1, [S8; S16; S32];
-    Vneg, [Saturating], All (2, Qreg), "vqnegQ", elts_same_1, [S8; S16; S32];
-
-    (* Bitwise not.  *)
-    Vmvn, [], All (2, Dreg), "vmvn", notype_1, P8 :: su_8_32;
-    Vmvn, [], All (2, Qreg), "vmvnQ", notype_1, P8 :: su_8_32;
-
-    (* Count leading sign bits.  *)
-    Vcls, [], All (2, Dreg), "vcls", elts_same_1, [S8; S16; S32];
-    Vcls, [], All (2, Qreg), "vclsQ", elts_same_1, [S8; S16; S32];
-
-    (* Count leading zeros.  *)
-    Vclz, [], All (2, Dreg), "vclz", sign_invar_1, su_8_32;
-    Vclz, [], All (2, Qreg), "vclzQ", sign_invar_1, su_8_32;
-
-    (* Count number of set bits.  *)
-    Vcnt, [], All (2, Dreg), "vcnt", bits_1, [P8; S8; U8];
-    Vcnt, [], All (2, Qreg), "vcntQ", bits_1, [P8; S8; U8];
-
-    (* Reciprocal estimate.  *)
-    Vrecpe, [], All (2, Dreg), "vrecpe", elts_same_1, [U32; F32];
-    Vrecpe, [], All (2, Qreg), "vrecpeQ", elts_same_1, [U32; F32];
-
-    (* Reciprocal square-root estimate.  *)
-    Vrsqrte, [], All (2, Dreg), "vrsqrte", elts_same_1, [U32; F32];
-    Vrsqrte, [], All (2, Qreg), "vrsqrteQ", elts_same_1, [U32; F32];
-
-    (* Get lanes from a vector.  *)
-    Vget_lane,
-      [InfoWord; Disassembles_as [Use_operands [| Corereg; Element_of_dreg |]];
-       Instruction_name ["vmov"]],
-      Use_operands [| Corereg; Dreg; Immed |],
-      "vget_lane", get_lane, pf_su_8_32;
-    Vget_lane,
-      [No_op;
-       InfoWord;
-       Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]];
-       Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
-      Use_operands [| Corereg; Dreg; Immed |],
-      "vget_lane", notype_2, [S64; U64];
-    Vget_lane,
-      [InfoWord; Disassembles_as [Use_operands [| Corereg; Element_of_dreg |]];
-       Instruction_name ["vmov"]],
-      Use_operands [| Corereg; Qreg; Immed |],
-      "vgetQ_lane", get_lane, pf_su_8_32;
-    Vget_lane,
-      [InfoWord;
-       Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]];
-       Instruction_name ["vmov"; "fmrrd"]; Const_valuator (fun _ -> 0);
-       Fixed_core_reg],
-      Use_operands [| Corereg; Qreg; Immed |],
-      "vgetQ_lane", notype_2, [S64; U64];
-
-    (* Set lanes in a vector.  *)
-    Vset_lane, [Disassembles_as [Use_operands [| Element_of_dreg; Corereg |]];
-                Instruction_name ["vmov"]],
-      Use_operands [| Dreg; Corereg; Dreg; Immed |], "vset_lane",
-      set_lane, pf_su_8_32;
-    Vset_lane, [No_op;
-                Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]];
-                Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; Corereg; Dreg; Immed |], "vset_lane",
-      set_lane_notype, [S64; U64];
-    Vset_lane, [Disassembles_as [Use_operands [| Element_of_dreg; Corereg |]];
-                Instruction_name ["vmov"]],
-      Use_operands [| Qreg; Corereg; Qreg; Immed |], "vsetQ_lane",
-      set_lane, pf_su_8_32;
-    Vset_lane, [Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]];
-                Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
-      Use_operands [| Qreg; Corereg; Qreg; Immed |], "vsetQ_lane",
-      set_lane_notype, [S64; U64];
-
-    (* Create vector from literal bit pattern.  *)
-    Vcreate,
-      [Requires_feature "CRYPTO"; No_op], (* Not really, but it can yield various things that are too
-                                   hard for the test generator at this time.  *)
-      Use_operands [| Dreg; Corereg |], "vcreate", create_vector,
-      [P64];
-    Vcreate,
-      [No_op], (* Not really, but it can yield various things that are too
-                  hard for the test generator at this time.  *)
-      Use_operands [| Dreg; Corereg |], "vcreate", create_vector,
-      pf_su_8_64;
-
-    (* Set all lanes to the same value.  *)
-    Vdup_n,
-      [Disassembles_as [Use_operands [| Dreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Dreg; Corereg |], "vdup_n", bits_1,
-      pf_su_8_32;
-    Vdup_n,
-      [No_op; Requires_feature "CRYPTO";
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Dreg; Corereg |], "vdup_n", notype_1,
-      [P64];
-    Vdup_n,
-      [No_op;
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Dreg; Corereg |], "vdup_n", notype_1,
-      [S64; U64];
-    Vdup_n,
-      [No_op; Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| Qreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1,
-      [P64];
-    Vdup_n,
-      [Disassembles_as [Use_operands [| Qreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1,
-      pf_su_8_32;
-    Vdup_n,
-      [No_op;
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |];
-                        Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Qreg; Corereg |], "vdupQ_n", notype_1,
-      [S64; U64];
-
-    (* These are just aliases for the above.  *)
-    Vmov_n,
-      [Builtin_name "vdup_n";
-       Disassembles_as [Use_operands [| Dreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Dreg; Corereg |],
-      "vmov_n", bits_1, pf_su_8_32;
-    Vmov_n,
-      [No_op;
-       Builtin_name "vdup_n";
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Dreg; Corereg |],
-      "vmov_n", notype_1, [S64; U64];
-    Vmov_n,
-      [Builtin_name "vdupQ_n";
-       Disassembles_as [Use_operands [| Qreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Qreg; Corereg |],
-      "vmovQ_n", bits_1, pf_su_8_32;
-    Vmov_n,
-      [No_op;
-       Builtin_name "vdupQ_n";
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |];
-                        Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Qreg; Corereg |],
-      "vmovQ_n", notype_1, [S64; U64];
-
-    (* Duplicate, lane version.  We can't use Use_operands here because the
-       rightmost register (always Dreg) would be picked up by find_key_operand,
-       when we want the leftmost register to be used in this case (otherwise
-       the modes are indistinguishable in neon.md, etc.  *)
-    Vdup_lane,
-      [Disassembles_as [Use_operands [| Dreg; Element_of_dreg |]]],
-      Unary_scalar Dreg, "vdup_lane", bits_2, pf_su_8_32;
-    Vdup_lane,
-      [No_op; Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Unary_scalar Dreg, "vdup_lane", bits_2, [P64];
-    Vdup_lane,
-      [No_op; Const_valuator (fun _ -> 0)],
-      Unary_scalar Dreg, "vdup_lane", bits_2, [S64; U64];
-    Vdup_lane,
-      [Disassembles_as [Use_operands [| Qreg; Element_of_dreg |]]],
-      Unary_scalar Qreg, "vdupQ_lane", bits_2, pf_su_8_32;
-    Vdup_lane,
-      [No_op; Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Unary_scalar Qreg, "vdupQ_lane", bits_2, [P64];
-    Vdup_lane,
-      [No_op; Const_valuator (fun _ -> 0)],
-      Unary_scalar Qreg, "vdupQ_lane", bits_2, [S64; U64];
-
-    (* Combining vectors.  *)
-    Vcombine, [Requires_feature "CRYPTO"; No_op],
-      Use_operands [| Qreg; Dreg; Dreg |], "vcombine", notype_2,
-      [P64];
-    Vcombine, [No_op],
-      Use_operands [| Qreg; Dreg; Dreg |], "vcombine", notype_2,
-      pf_su_8_64;
-
-    (* Splitting vectors.  *)
-    Vget_high, [Requires_feature "CRYPTO"; No_op],
-      Use_operands [| Dreg; Qreg |], "vget_high",
-      notype_1, [P64];
-    Vget_high, [No_op],
-      Use_operands [| Dreg; Qreg |], "vget_high",
-      notype_1, pf_su_8_64;
-    Vget_low, [Instruction_name ["vmov"];
-               Disassembles_as [Use_operands [| Dreg; Dreg |]];
-              Fixed_vector_reg],
-      Use_operands [| Dreg; Qreg |], "vget_low",
-      notype_1, pf_su_8_32;
-    Vget_low, [Requires_feature "CRYPTO"; No_op],
-      Use_operands [| Dreg; Qreg |], "vget_low",
-      notype_1, [P64];
-    Vget_low, [No_op],
-      Use_operands [| Dreg; Qreg |], "vget_low",
-      notype_1, [S64; U64];
-
-    (* Conversions.  *)
-    Vcvt, [InfoWord], All (2, Dreg), "vcvt", conv_1,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-    Vcvt, [InfoWord], All (2, Qreg), "vcvtQ", conv_1,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-    Vcvt, [Builtin_name "vcvt" ; Requires_FP_bit 1],
-          Use_operands [| Dreg; Qreg; |], "vcvt", conv_1, [Conv (F16, F32)];
-    Vcvt, [Builtin_name "vcvt" ; Requires_FP_bit 1],
-          Use_operands [| Qreg; Dreg; |], "vcvt", conv_1, [Conv (F32, F16)];
-    Vcvt_n, [InfoWord], Use_operands [| Dreg; Dreg; Immed |], "vcvt_n", conv_2,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-    Vcvt_n, [InfoWord], Use_operands [| Qreg; Qreg; Immed |], "vcvtQ_n", conv_2,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-
-    (* Move, narrowing.  *)
-    Vmovn, [Disassembles_as [Use_operands [| Dreg; Qreg |]]],
-      Narrow, "vmovn", sign_invar_1, su_16_64;
-    Vmovn, [Disassembles_as [Use_operands [| Dreg; Qreg |]]; Saturating],
-      Narrow, "vqmovn", elts_same_1, su_16_64;
-    Vmovn,
-      [Disassembles_as [Use_operands [| Dreg; Qreg |]]; Saturating; Dst_unsign],
-      Narrow, "vqmovun", dst_unsign_1,
-      [S16; S32; S64];
-
-    (* Move, long.  *)
-    Vmovl, [Disassembles_as [Use_operands [| Qreg; Dreg |]]],
-      Long, "vmovl", elts_same_1, su_8_32;
-
-    (* Table lookup.  *)
-    Vtbl 1,
-      [Instruction_name ["vtbl"];
-       Disassembles_as [Use_operands [| Dreg; VecArray (1, Dreg); Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg |], "vtbl1", table_2, [U8; S8; P8];
-    Vtbl 2, [Instruction_name ["vtbl"]],
-      Use_operands [| Dreg; VecArray (2, Dreg); Dreg |], "vtbl2", table_2,
-      [U8; S8; P8];
-    Vtbl 3, [Instruction_name ["vtbl"]],
-      Use_operands [| Dreg; VecArray (3, Dreg); Dreg |], "vtbl3", table_2,
-      [U8; S8; P8];
-    Vtbl 4, [Instruction_name ["vtbl"]],
-      Use_operands [| Dreg; VecArray (4, Dreg); Dreg |], "vtbl4", table_2,
-      [U8; S8; P8];
-
-    (* Extended table lookup.  *)
-    Vtbx 1,
-      [Instruction_name ["vtbx"];
-       Disassembles_as [Use_operands [| Dreg; VecArray (1, Dreg); Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg |], "vtbx1", table_io, [U8; S8; P8];
-    Vtbx 2, [Instruction_name ["vtbx"]],
-      Use_operands [| Dreg; VecArray (2, Dreg); Dreg |], "vtbx2", table_io,
-      [U8; S8; P8];
-    Vtbx 3, [Instruction_name ["vtbx"]],
-      Use_operands [| Dreg; VecArray (3, Dreg); Dreg |], "vtbx3", table_io,
-      [U8; S8; P8];
-    Vtbx 4, [Instruction_name ["vtbx"]],
-      Use_operands [| Dreg; VecArray (4, Dreg); Dreg |], "vtbx4", table_io,
-      [U8; S8; P8];
-
-    (* Multiply, lane.  (note: these were undocumented at the time of
-       writing).  *)
-    Vmul_lane, [], By_scalar Dreg, "vmul_lane", sign_invar_2_lane,
-      [S16; S32; U16; U32; F32];
-    Vmul_lane, [], By_scalar Qreg, "vmulQ_lane", sign_invar_2_lane,
-      [S16; S32; U16; U32; F32];
-
-    (* Multiply-accumulate, lane.  *)
-    Vmla_lane, [], By_scalar Dreg, "vmla_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmla_lane, [], By_scalar Qreg, "vmlaQ_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmla_lane, [], Wide_lane, "vmlal_lane", elts_same_io_lane,
-      [S16; S32; U16; U32];
-    Vmla_lane, [Saturating; Doubling], Wide_lane, "vqdmlal_lane",
-      elts_same_io_lane, [S16; S32];
-
-    (* Multiply-subtract, lane.  *)
-    Vmls_lane, [], By_scalar Dreg, "vmls_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmls_lane, [], By_scalar Qreg, "vmlsQ_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmls_lane, [], Wide_lane, "vmlsl_lane", elts_same_io_lane,
-      [S16; S32; U16; U32];
-    Vmls_lane, [Saturating; Doubling], Wide_lane, "vqdmlsl_lane",
-      elts_same_io_lane, [S16; S32];
-
-    (* Long multiply, lane.  *)
-    Vmull_lane, [],
-      Wide_lane, "vmull_lane", elts_same_2_lane, [S16; S32; U16; U32];
-
-    (* Saturating doubling long multiply, lane.  *)
-    Vqdmull_lane, [Saturating; Doubling],
-      Wide_lane, "vqdmull_lane", elts_same_2_lane, [S16; S32];
-
-    (* Saturating doubling long multiply high, lane.  *)
-    Vqdmulh_lane, [Saturating; Halving],
-      By_scalar Qreg, "vqdmulhQ_lane", elts_same_2_lane, [S16; S32];
-    Vqdmulh_lane, [Saturating; Halving],
-      By_scalar Dreg, "vqdmulh_lane", elts_same_2_lane, [S16; S32];
-    Vqdmulh_lane, [Saturating; Halving; Rounding;
-                  Instruction_name ["vqrdmulh"]],
-      By_scalar Qreg, "vqRdmulhQ_lane", elts_same_2_lane, [S16; S32];
-    Vqdmulh_lane, [Saturating; Halving; Rounding;
-                  Instruction_name ["vqrdmulh"]],
-      By_scalar Dreg, "vqRdmulh_lane", elts_same_2_lane, [S16; S32];
-
-    (* Vector multiply by scalar.  *)
-    Vmul_n, [InfoWord;
-             Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-             Use_operands [| Dreg; Dreg; Corereg |], "vmul_n",
-      sign_invar_2, [S16; S32; U16; U32; F32];
-    Vmul_n, [InfoWord;
-             Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-             Use_operands [| Qreg; Qreg; Corereg |], "vmulQ_n",
-      sign_invar_2, [S16; S32; U16; U32; F32];
-
-    (* Vector long multiply by scalar.  *)
-    Vmull_n, [Instruction_name ["vmull"];
-              Disassembles_as [Use_operands [| Qreg; Dreg; Element_of_dreg |]]],
-              Wide_scalar, "vmull_n",
-      elts_same_2, [S16; S32; U16; U32];
-
-    (* Vector saturating doubling long multiply by scalar.  *)
-    Vqdmull_n, [Saturating; Doubling;
-               Disassembles_as [Use_operands [| Qreg; Dreg;
-                                                Element_of_dreg |]]],
-                Wide_scalar, "vqdmull_n",
-      elts_same_2, [S16; S32];
-
-    (* Vector saturating doubling long multiply high by scalar.  *)
-    Vqdmulh_n,
-      [Saturating; Halving; InfoWord;
-       Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |],
-      "vqdmulhQ_n", elts_same_2, [S16; S32];
-    Vqdmulh_n,
-      [Saturating; Halving; InfoWord;
-       Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |],
-      "vqdmulh_n", elts_same_2, [S16; S32];
-    Vqdmulh_n,
-      [Saturating; Halving; Rounding; InfoWord;
-       Instruction_name ["vqrdmulh"];
-       Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |],
-      "vqRdmulhQ_n", elts_same_2, [S16; S32];
-    Vqdmulh_n,
-      [Saturating; Halving; Rounding; InfoWord;
-       Instruction_name ["vqrdmulh"];
-       Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |],
-      "vqRdmulh_n", elts_same_2, [S16; S32];
-
-    (* Vector multiply-accumulate by scalar.  *)
-    Vmla_n, [InfoWord;
-             Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |], "vmla_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmla_n, [InfoWord;
-             Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |], "vmlaQ_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmla_n, [], Wide_scalar, "vmlal_n", elts_same_io, [S16; S32; U16; U32];
-    Vmla_n, [Saturating; Doubling], Wide_scalar, "vqdmlal_n", elts_same_io,
-      [S16; S32];
-
-    (* Vector multiply subtract by scalar.  *)
-    Vmls_n, [InfoWord;
-             Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |], "vmls_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmls_n, [InfoWord;
-             Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |], "vmlsQ_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmls_n, [], Wide_scalar, "vmlsl_n", elts_same_io, [S16; S32; U16; U32];
-    Vmls_n, [Saturating; Doubling], Wide_scalar, "vqdmlsl_n", elts_same_io,
-      [S16; S32];
-
-    (* Vector extract.  *)
-    Vext, [Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; Dreg; Dreg; Immed |], "vext", extend,
-      [P64];
-    Vext, [Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; Dreg; Dreg; Immed |], "vext", extend,
-      pf_su_8_64;
-    Vext, [Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Use_operands [| Qreg; Qreg; Qreg; Immed |], "vextQ", extend,
-      [P64];
-    Vext, [Const_valuator (fun _ -> 0)],
-      Use_operands [| Qreg; Qreg; Qreg; Immed |], "vextQ", extend,
-      pf_su_8_64;
-
-    (* Reverse elements.  *)
-    Vrev64, [Use_shuffle (rev_elems 64)], All (2, Dreg), "vrev64", bits_1,
-      P8 :: P16 :: F32 :: su_8_32;
-    Vrev64, [Use_shuffle (rev_elems 64)], All (2, Qreg), "vrev64Q", bits_1,
-      P8 :: P16 :: F32 :: su_8_32;
-    Vrev32, [Use_shuffle (rev_elems 32)], All (2, Dreg), "vrev32", bits_1,
-      [P8; P16; S8; U8; S16; U16];
-    Vrev32, [Use_shuffle (rev_elems 32)], All (2, Qreg), "vrev32Q", bits_1,
-      [P8; P16; S8; U8; S16; U16];
-    Vrev16, [Use_shuffle (rev_elems 16)], All (2, Dreg), "vrev16", bits_1,
-      [P8; S8; U8];
-    Vrev16, [Use_shuffle (rev_elems 16)], All (2, Qreg), "vrev16Q", bits_1,
-      [P8; S8; U8];
-
-    (* Bit selection.  *)
-    Vbsl,
-      [Requires_feature "CRYPTO"; Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Dreg; Dreg; Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg; Dreg |], "vbsl", bit_select,
-      [P64];
-    Vbsl,
-      [Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Dreg; Dreg; Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg; Dreg |], "vbsl", bit_select,
-      pf_su_8_64;
-    Vbsl,
-      [Requires_feature "CRYPTO"; Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Qreg; Qreg; Qreg |]]],
-      Use_operands [| Qreg; Qreg; Qreg; Qreg |], "vbslQ", bit_select,
-      [P64];
-    Vbsl,
-      [Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Qreg; Qreg; Qreg |]]],
-      Use_operands [| Qreg; Qreg; Qreg; Qreg |], "vbslQ", bit_select,
-      pf_su_8_64;
-
-    Vtrn, [Use_shuffle trn_elems], Pair_result Dreg, "vtrn", bits_2, pf_su_8_16;
-    Vtrn, [Use_shuffle trn_elems; Instruction_name ["vuzp"]], Pair_result Dreg, "vtrn", bits_2, suf_32;
-    Vtrn, [Use_shuffle trn_elems], Pair_result Qreg, "vtrnQ", bits_2, pf_su_8_32;
-    (* Zip elements.  *)
-    Vzip, [Use_shuffle zip_elems], Pair_result Dreg, "vzip", bits_2, pf_su_8_16;
-    Vzip, [Use_shuffle zip_elems; Instruction_name ["vuzp"]], Pair_result Dreg, "vzip", bits_2, suf_32;
-    Vzip, [Use_shuffle zip_elems], Pair_result Qreg, "vzipQ", bits_2, pf_su_8_32; 
-
-    (* Unzip elements.  *)
-    Vuzp, [Use_shuffle uzip_elems], Pair_result Dreg, "vuzp", bits_2,
-      pf_su_8_32;
-    Vuzp, [Use_shuffle uzip_elems], Pair_result Qreg, "vuzpQ", bits_2,
-      pf_su_8_32;
-
-    (* Element/structure loads.  VLD1 variants.  *)
-    Vldx 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1", bits_1,
-      [P64];
-    Vldx 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1", bits_1,
-      pf_su_8_64;
-    Vldx 1, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                             CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q", bits_1,
-      [P64];
-    Vldx 1, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                             CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q", bits_1,
-      pf_su_8_64;
-
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |],
-      "vld1_lane", bits_3, pf_su_8_32;
-    Vldx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |],
-      "vld1_lane", bits_3, [P64];
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |],
-      "vld1_lane", bits_3, [S64; U64];
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |],
-      "vld1Q_lane", bits_3, pf_su_8_32;
-    Vldx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |],
-      "vld1Q_lane", bits_3, [P64];
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |],
-      "vld1Q_lane", bits_3, [S64; U64];
-
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (1, All_elements_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup",
-      bits_1, pf_su_8_32;
-    Vldx_dup 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup",
-      bits_1, [P64];
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup",
-      bits_1, [S64; U64];
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (2, All_elements_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
-      bits_1, pf_su_8_32;
-    (* Treated identically to vld1_dup above as we now
-       do a single load followed by a duplicate.  *)
-    Vldx_dup 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
-      bits_1, [P64];
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
-      bits_1, [S64; U64];
-
-    (* VST1 variants.  *)
-    Vstx 1, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Dreg |], "vst1",
-      store_1, [P64];
-    Vstx 1, [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Dreg |], "vst1",
-      store_1, pf_su_8_64;
-    Vstx 1, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                             PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg |], "vst1Q",
-      store_1, [P64];
-    Vstx 1, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                             PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg |], "vst1Q",
-      store_1, pf_su_8_64;
-
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Dreg; Immed |],
-      "vst1_lane", store_3, pf_su_8_32;
-    Vstx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| PtrTo Corereg; Dreg; Immed |],
-      "vst1_lane", store_3, [P64];
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| PtrTo Corereg; Dreg; Immed |],
-      "vst1_lane", store_3, [U64; S64];
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg; Immed |],
-      "vst1Q_lane", store_3, pf_su_8_32;
-    Vstx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg; Immed |],
-      "vst1Q_lane", store_3, [P64];
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg; Immed |],
-      "vst1Q_lane", store_3, [U64; S64];
-
-    (* VLD2 variants.  *)
-    Vldx 2, [], Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2", bits_1, pf_su_8_32;
-    Vldx 2, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]],
-       Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2", bits_1, [P64];
-    Vldx 2, [Instruction_name ["vld1"]],
-       Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2", bits_1, [S64; U64];
-    Vldx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              CstPtrTo Corereg |];
-                              Use_operands [| VecArray (2, Dreg);
-                                             CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Qreg); CstPtrTo Corereg |],
-      "vld2Q", bits_1, pf_su_8_32;
-
-    Vldx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg;
-                      VecArray (2, Dreg); Immed |],
-      "vld2_lane", bits_3, P8 :: P16 :: F32 :: su_8_32;
-    Vldx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Qreg); CstPtrTo Corereg;
-                     VecArray (2, Qreg); Immed |],
-      "vld2Q_lane", bits_3, [P16; F32; U16; U32; S16; S32];
-
-    Vldx_dup 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, All_elements_of_dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2_dup", bits_1, pf_su_8_32;
-    Vldx_dup 2,
-      [Requires_feature "CRYPTO";
-       Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (2, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2_dup", bits_1, [P64];
-    Vldx_dup 2,
-      [Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (2, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2_dup", bits_1, [S64; U64];
-
-    (* VST2 variants.  *)
-    Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2",
-      store_1, pf_su_8_32;
-    Vstx 2, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2",
-      store_1, [P64];
-    Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2",
-      store_1, [S64; U64];
-    Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                             PtrTo Corereg |];
-                              Use_operands [| VecArray (2, Dreg);
-                                             PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Qreg) |], "vst2Q",
-      store_1, pf_su_8_32;
-
-    Vstx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg); Immed |], "vst2_lane",
-      store_3, P8 :: P16 :: F32 :: su_8_32;
-    Vstx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Qreg); Immed |], "vst2Q_lane",
-      store_3, [P16; F32; U16; U32; S16; S32];
-
-    (* VLD3 variants.  *)
-    Vldx 3, [], Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3", bits_1, pf_su_8_32;
-    Vldx 3, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3", bits_1, [P64];
-    Vldx 3, [Instruction_name ["vld1"]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3", bits_1, [S64; U64];
-    Vldx 3, [Disassembles_as [Use_operands [| VecArray (3, Dreg);
-                                             CstPtrTo Corereg |];
-                              Use_operands [| VecArray (3, Dreg);
-                                             CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Qreg); CstPtrTo Corereg |],
-      "vld3Q", bits_1, P8 :: P16 :: F32 :: su_8_32;
-
-    Vldx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg;
-                                     VecArray (3, Dreg); Immed |],
-      "vld3_lane", bits_3, P8 :: P16 :: F32 :: su_8_32;
-    Vldx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Qreg); CstPtrTo Corereg;
-                                    VecArray (3, Qreg); Immed |],
-      "vld3Q_lane", bits_3, [P16; F32; U16; U32; S16; S32];
-
-    Vldx_dup 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, All_elements_of_dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3_dup", bits_1, pf_su_8_32;
-    Vldx_dup 3,
-      [Requires_feature "CRYPTO";
-       Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (3, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3_dup", bits_1, [P64];
-    Vldx_dup 3,
-      [Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (3, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3_dup", bits_1, [S64; U64];
-
-    (* VST3 variants.  *)
-    Vstx 3, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3",
-      store_1, pf_su_8_32;
-    Vstx 3, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3",
-      store_1, [P64];
-    Vstx 3, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3",
-      store_1, [S64; U64];
-    Vstx 3, [Disassembles_as [Use_operands [| VecArray (3, Dreg);
-                                             PtrTo Corereg |];
-                              Use_operands [| VecArray (3, Dreg);
-                                             PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Qreg) |], "vst3Q",
-      store_1, pf_su_8_32;
-
-    Vstx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg); Immed |], "vst3_lane",
-      store_3, P8 :: P16 :: F32 :: su_8_32;
-    Vstx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Qreg); Immed |], "vst3Q_lane",
-      store_3, [P16; F32; U16; U32; S16; S32];
-
-    (* VLD4/VST4 variants.  *)
-    Vldx 4, [], Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4", bits_1, pf_su_8_32;
-    Vldx 4, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4", bits_1, [P64];
-    Vldx 4, [Instruction_name ["vld1"]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4", bits_1, [S64; U64];
-    Vldx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                             CstPtrTo Corereg |];
-                              Use_operands [| VecArray (4, Dreg);
-                                             CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Qreg); CstPtrTo Corereg |],
-      "vld4Q", bits_1, P8 :: P16 :: F32 :: su_8_32;
-
-    Vldx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg;
-                                     VecArray (4, Dreg); Immed |],
-      "vld4_lane", bits_3, P8 :: P16 :: F32 :: su_8_32;
-    Vldx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Qreg); CstPtrTo Corereg;
-                     VecArray (4, Qreg); Immed |],
-      "vld4Q_lane", bits_3, [P16; F32; U16; U32; S16; S32];
-
-    Vldx_dup 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, All_elements_of_dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4_dup", bits_1, pf_su_8_32;
-    Vldx_dup 4,
-      [Requires_feature "CRYPTO";
-       Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (4, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4_dup", bits_1, [P64];
-    Vldx_dup 4,
-      [Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (4, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4_dup", bits_1, [S64; U64];
-
-    Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4",
-      store_1, pf_su_8_32;
-    Vstx 4, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4",
-      store_1, [P64];
-    Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4",
-      store_1, [S64; U64];
-    Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                             PtrTo Corereg |];
-                              Use_operands [| VecArray (4, Dreg);
-                                             PtrTo Corereg |]]],
-     Use_operands [| PtrTo Corereg; VecArray (4, Qreg) |], "vst4Q",
-      store_1, pf_su_8_32;
-
-    Vstx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg); Immed |], "vst4_lane",
-      store_3, P8 :: P16 :: F32 :: su_8_32;
-    Vstx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Qreg); Immed |], "vst4Q_lane",
-      store_3, [P16; F32; U16; U32; S16; S32];
-
-    (* Logical operations. And.  *)
-    Vand, [], All (3, Dreg), "vand", notype_2, su_8_32;
-    Vand, [No_op], All (3, Dreg), "vand", notype_2, [S64; U64];
-    Vand, [], All (3, Qreg), "vandQ", notype_2, su_8_64;
-
-    (* Or.  *)
-    Vorr, [], All (3, Dreg), "vorr", notype_2, su_8_32;
-    Vorr, [No_op], All (3, Dreg), "vorr", notype_2, [S64; U64];
-    Vorr, [], All (3, Qreg), "vorrQ", notype_2, su_8_64;
-
-    (* Eor.  *)
-    Veor, [], All (3, Dreg), "veor", notype_2, su_8_32;
-    Veor, [No_op], All (3, Dreg), "veor", notype_2, [S64; U64];
-    Veor, [], All (3, Qreg), "veorQ", notype_2, su_8_64;
-
-    (* Bic (And-not).  *)
-    Vbic, [Compiler_optim "-O2"], All (3, Dreg), "vbic", notype_2, su_8_32;
-    Vbic, [No_op; Compiler_optim "-O2"], All (3, Dreg), "vbic", notype_2, [S64; U64];
-    Vbic, [Compiler_optim "-O2"], All (3, Qreg), "vbicQ", notype_2, su_8_64;
-
-    (* Or-not.  *)
-    Vorn, [Compiler_optim "-O2"], All (3, Dreg), "vorn", notype_2, su_8_32;
-    Vorn, [No_op; Compiler_optim "-O2"], All (3, Dreg), "vorn", notype_2, [S64; U64];
-    Vorn, [Compiler_optim "-O2"], All (3, Qreg), "vornQ", notype_2, su_8_64;
-  ]
-
-let type_in_crypto_only t
-  = (t == P64) || (t == P128)
-
-let cross_product s1 s2
-  = List.filter (fun (e, e') -> e <> e')
-                (List.concat (List.map (fun e1 -> List.map (fun e2 -> (e1,e2)) s1) s2))
-
-let reinterp =
-  let elems = P8 :: P16 :: F32 :: P64 :: su_8_64 in
-  let casts = cross_product elems elems in
-  List.map
-    (fun (convto, convfrom) ->
-       Vreinterp, (if (type_in_crypto_only convto) || (type_in_crypto_only convfrom)
-                   then [Requires_feature "CRYPTO"] else []) @ [No_op], Use_operands [| Dreg; Dreg |],
-                   "vreinterpret", conv_1, [Cast (convto, convfrom)])
-    casts
-
-let reinterpq =
-  let elems = P8 :: P16 :: F32 :: P64 :: P128 :: su_8_64 in
-  let casts = cross_product elems elems in
-  List.map
-    (fun (convto, convfrom) ->
-       Vreinterp, (if (type_in_crypto_only convto) || (type_in_crypto_only convfrom)
-                   then [Requires_feature "CRYPTO"] else []) @ [No_op], Use_operands [| Qreg; Qreg |],
-                   "vreinterpretQ", conv_1, [Cast (convto, convfrom)])
-    casts
-
-(* Output routines.  *)
-
-let rec string_of_elt = function
-    S8 -> "s8" | S16 -> "s16" | S32 -> "s32" | S64 -> "s64"
-  | U8 -> "u8" | U16 -> "u16" | U32 -> "u32" | U64 -> "u64"
-  | I8 -> "i8" | I16 -> "i16" | I32 -> "i32" | I64 -> "i64"
-  | B8 -> "8" | B16 -> "16" | B32 -> "32" | B64 -> "64"
-  | F16 -> "f16" | F32 -> "f32" | P8 -> "p8" | P16 -> "p16"
-  | P64 -> "p64" | P128 -> "p128"
-  | Conv (a, b) | Cast (a, b) -> string_of_elt a ^ "_" ^ string_of_elt b
-  | NoElts -> failwith "No elts"
-
-let string_of_elt_dots elt =
-  match elt with
-    Conv (a, b) | Cast (a, b) -> string_of_elt a ^ "." ^ string_of_elt b
-  | _ -> string_of_elt elt
-
-let string_of_vectype vt =
-  let rec name affix = function
-    T_int8x8 -> affix "int8x8"
-  | T_int8x16 -> affix "int8x16"
-  | T_int16x4 -> affix "int16x4"
-  | T_int16x8 -> affix "int16x8"
-  | T_int32x2 -> affix "int32x2"
-  | T_int32x4 -> affix "int32x4"
-  | T_int64x1 -> affix "int64x1"
-  | T_int64x2 -> affix "int64x2"
-  | T_uint8x8 -> affix "uint8x8"
-  | T_uint8x16 -> affix "uint8x16"
-  | T_uint16x4 -> affix "uint16x4"
-  | T_uint16x8 -> affix "uint16x8"
-  | T_uint32x2 -> affix "uint32x2"
-  | T_uint32x4 -> affix "uint32x4"
-  | T_uint64x1 -> affix "uint64x1"
-  | T_uint64x2 -> affix "uint64x2"
-  | T_float16x4 -> affix "float16x4"
-  | T_float32x2 -> affix "float32x2"
-  | T_float32x4 -> affix "float32x4"
-  | T_poly8x8 -> affix "poly8x8"
-  | T_poly8x16 -> affix "poly8x16"
-  | T_poly16x4 -> affix "poly16x4"
-  | T_poly16x8 -> affix "poly16x8"
-  | T_int8 -> affix "int8"
-  | T_int16 -> affix "int16"
-  | T_int32 -> affix "int32"
-  | T_int64 -> affix "int64"
-  | T_uint8 -> affix "uint8"
-  | T_uint16 -> affix "uint16"
-  | T_uint32 -> affix "uint32"
-  | T_uint64 -> affix "uint64"
-  | T_poly8 -> affix "poly8"
-  | T_poly16 -> affix "poly16"
-  | T_poly64 -> affix "poly64"
-  | T_poly64x1 -> affix "poly64x1"
-  | T_poly64x2 -> affix "poly64x2"
-  | T_poly128 -> affix "poly128"
-  | T_float16 -> affix "float16"
-  | T_float32 -> affix "float32"
-  | T_immediate _ -> "const int"
-  | T_void -> "void"
-  | T_intQI -> "__builtin_neon_qi"
-  | T_intHI -> "__builtin_neon_hi"
-  | T_intSI -> "__builtin_neon_si"
-  | T_intDI -> "__builtin_neon_di"
-  | T_intTI -> "__builtin_neon_ti"
-  | T_floatHF -> "__builtin_neon_hf"
-  | T_floatSF -> "__builtin_neon_sf"
-  | T_arrayof (num, base) ->
-      let basename = name (fun x -> x) base in
-      affix (Printf.sprintf "%sx%d" basename num)
-  | T_ptrto x ->
-      let basename = name affix x in
-      Printf.sprintf "%s *" basename
-  | T_const x ->
-      let basename = name affix x in
-      Printf.sprintf "const %s" basename
-  in
-    name (fun x -> x ^ "_t") vt
-
-let string_of_inttype = function
-    B_TImode -> "__builtin_neon_ti"
-  | B_EImode -> "__builtin_neon_ei"
-  | B_OImode -> "__builtin_neon_oi"
-  | B_CImode -> "__builtin_neon_ci"
-  | B_XImode -> "__builtin_neon_xi"
-
-let string_of_mode = function
-    V8QI -> "v8qi" | V4HI -> "v4hi" | V4HF  -> "v4hf"  | V2SI -> "v2si"
-  | V2SF -> "v2sf" | DI   -> "di"   | V16QI -> "v16qi" | V8HI -> "v8hi"
-  | V4SI -> "v4si" | V4SF -> "v4sf" | V2DI  -> "v2di"  | QI   -> "qi"
-  | HI -> "hi" | SI -> "si" | SF -> "sf" | TI -> "ti"
-
-(* Use uppercase chars for letters which form part of the intrinsic name, but
-   should be omitted from the builtin name (the info is passed in an extra
-   argument, instead).  *)
-let intrinsic_name name = String.lowercase name
-
-(* Allow the name of the builtin to be overridden by things (e.g. Flipped)
-   found in the features list.  *)
-let builtin_name features name =
-  let name = List.fold_right
-               (fun el name ->
-                 match el with
-                   Flipped x | Builtin_name x -> x
-                 | _ -> name)
-               features name in
-  let islower x = let str = String.make 1 x in (String.lowercase str) = str
-  and buf = Buffer.create (String.length name) in
-  String.iter (fun c -> if islower c then Buffer.add_char buf c) name;
-  Buffer.contents buf
-
-(* Transform an arity into a list of strings.  *)
-let strings_of_arity a =
-  match a with
-  | Arity0 vt -> [string_of_vectype vt]
-  | Arity1 (vt1, vt2) -> [string_of_vectype vt1; string_of_vectype vt2]
-  | Arity2 (vt1, vt2, vt3) -> [string_of_vectype vt1;
-                              string_of_vectype vt2;
-                               string_of_vectype vt3]
-  | Arity3 (vt1, vt2, vt3, vt4) -> [string_of_vectype vt1;
-                                    string_of_vectype vt2;
-                                    string_of_vectype vt3;
-                                    string_of_vectype vt4]
-  | Arity4 (vt1, vt2, vt3, vt4, vt5) -> [string_of_vectype vt1;
-                                         string_of_vectype vt2;
-                                         string_of_vectype vt3;
-                                         string_of_vectype vt4;
-                                         string_of_vectype vt5]
-
-(* Suffixes on the end of builtin names that are to be stripped in order
-   to obtain the name used as an instruction.  They are only stripped if
-   preceded immediately by an underscore.  *)
-let suffixes_to_strip = [ "n"; "lane"; "dup" ]
-
-(* Get the possible names of an instruction corresponding to a "name" from the
-   ops table.  This is done by getting the equivalent builtin name and
-   stripping any suffixes from the list at the top of this file, unless
-   the features list presents with an Instruction_name entry, in which
-   case that is used; or unless the features list presents with a Flipped
-   entry, in which case that is used.  If both such entries are present,
-   the first in the list will be chosen.  *)
-let get_insn_names features name =
-  let names = try
-  begin
-    match List.find (fun feature -> match feature with
-                                      Instruction_name _ -> true
-                                   | Flipped _ -> true
-                                   | _ -> false) features
-    with
-      Instruction_name names -> names
-    | Flipped name -> [name]
-    | _ -> assert false
-  end
-  with Not_found -> [builtin_name features name]
-  in
-  begin
-    List.map (fun name' ->
-      try
-        let underscore = String.rindex name' '_' in
-        let our_suffix = String.sub name' (underscore + 1)
-                                    ((String.length name') - underscore - 1)
-        in
-          let rec strip remaining_suffixes =
-            match remaining_suffixes with
-              [] -> name'
-            | s::ss when our_suffix = s -> String.sub name' 0 underscore
-            | _::ss -> strip ss
-          in
-            strip suffixes_to_strip
-      with (Not_found | Invalid_argument _) -> name') names
-  end
-
-(* Apply a function to each element of a list and then comma-separate
-   the resulting strings.  *)
-let rec commas f elts acc =
-  match elts with
-    [] -> acc
-  | [elt] -> acc ^ (f elt)
-  | elt::elts ->
-    commas f elts (acc ^ (f elt) ^ ", ")
-
-(* Given a list of features and the shape specified in the "ops" table, apply
-   a function to each possible shape that the instruction may have.
-   By default, this is the "shape" entry in "ops".  If the features list
-   contains a Disassembles_as entry, the shapes contained in that entry are
-   mapped to corresponding outputs and returned in a list.  If there is more
-   than one Disassembles_as entry, only the first is used.  *)
-let analyze_all_shapes features shape f =
-  try
-    match List.find (fun feature ->
-                       match feature with Disassembles_as _ -> true
-                                        | _ -> false)
-                    features with
-      Disassembles_as shapes -> List.map f shapes
-    | _ -> assert false
-  with Not_found -> [f shape]
-
-(* The crypto intrinsics have unconventional shapes and are not that
-   numerous to be worth the trouble of encoding here.  We implement them
-   explicitly here.  *)
-let crypto_intrinsics =
-"
-#ifdef __ARM_FEATURE_CRYPTO
-
-__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
-vldrq_p128 (poly128_t const * __ptr)
-{
-#ifdef __ARM_BIG_ENDIAN
-  poly64_t* __ptmp = (poly64_t*) __ptr;
-  poly64_t __d0 = vld1_p64 (__ptmp);
-  poly64_t __d1 = vld1_p64 (__ptmp + 1);
-  return vreinterpretq_p128_p64 (vcombine_p64 (__d1, __d0));
-#else
-  return vreinterpretq_p128_p64 (vld1q_p64 ((poly64_t*) __ptr));
-#endif
-}
-
-__extension__ static __inline void __attribute__ ((__always_inline__))
-vstrq_p128 (poly128_t * __ptr, poly128_t __val)
-{
-#ifdef __ARM_BIG_ENDIAN
-  poly64x2_t __tmp = vreinterpretq_p64_p128 (__val);
-  poly64_t __d0 = vget_high_p64 (__tmp);
-  poly64_t __d1 = vget_low_p64 (__tmp);
-  vst1q_p64 ((poly64_t*) __ptr, vcombine_p64 (__d0, __d1));
-#else
-  vst1q_p64 ((poly64_t*) __ptr, vreinterpretq_p64_p128 (__val));
-#endif
-}
-
-/* The vceq_p64 intrinsic does not map to a single instruction.
-   Instead we emulate it by performing a 32-bit variant of the vceq
-   and applying a pairwise min reduction to the result.
-   vceq_u32 will produce two 32-bit halves, each of which will contain either
-   all ones or all zeros depending on whether the corresponding 32-bit
-   halves of the poly64_t were equal.  The whole poly64_t values are equal
-   if and only if both halves are equal, i.e. vceq_u32 returns all ones.
-   If the result is all zeroes for any half then the whole result is zeroes.
-   This is what the pairwise min reduction achieves.  */
-
-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
-vceq_p64 (poly64x1_t __a, poly64x1_t __b)
-{
-  uint32x2_t __t_a = vreinterpret_u32_p64 (__a);
-  uint32x2_t __t_b = vreinterpret_u32_p64 (__b);
-  uint32x2_t __c = vceq_u32 (__t_a, __t_b);
-  uint32x2_t __m = vpmin_u32 (__c, __c);
-  return vreinterpret_u64_u32 (__m);
-}
-
-/* The vtst_p64 intrinsic does not map to a single instruction.
-   We emulate it in way similar to vceq_p64 above but here we do
-   a reduction with max since if any two corresponding bits
-   in the two poly64_t's match, then the whole result must be all ones.  */
-
-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
-vtst_p64 (poly64x1_t __a, poly64x1_t __b)
-{
-  uint32x2_t __t_a = vreinterpret_u32_p64 (__a);
-  uint32x2_t __t_b = vreinterpret_u32_p64 (__b);
-  uint32x2_t __c = vtst_u32 (__t_a, __t_b);
-  uint32x2_t __m = vpmax_u32 (__c, __c);
-  return vreinterpret_u64_u32 (__m);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaeseq_u8 (uint8x16_t __data, uint8x16_t __key)
-{
-  return __builtin_arm_crypto_aese (__data, __key);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaesdq_u8 (uint8x16_t __data, uint8x16_t __key)
-{
-  return __builtin_arm_crypto_aesd (__data, __key);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaesmcq_u8 (uint8x16_t __data)
-{
-  return __builtin_arm_crypto_aesmc (__data);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaesimcq_u8 (uint8x16_t __data)
-{
-  return __builtin_arm_crypto_aesimc (__data);
-}
-
-__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
-vsha1h_u32 (uint32_t __hash_e)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  __t = __builtin_arm_crypto_sha1h (__t);
-  return vgetq_lane_u32 (__t, 0);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  return __builtin_arm_crypto_sha1c (__hash_abcd, __t, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  return __builtin_arm_crypto_sha1p (__hash_abcd, __t, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  return __builtin_arm_crypto_sha1m (__hash_abcd, __t, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7, uint32x4_t __w8_11)
-{
-  return __builtin_arm_crypto_sha1su0 (__w0_3, __w4_7, __w8_11);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w12_15)
-{
-  return __builtin_arm_crypto_sha1su1 (__tw0_3, __w12_15);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256hq_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk)
-{
-  return __builtin_arm_crypto_sha256h (__hash_abcd, __hash_efgh, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256h2q_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk)
-{
-  return __builtin_arm_crypto_sha256h2 (__hash_abcd, __hash_efgh, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7)
-{
-  return __builtin_arm_crypto_sha256su0 (__w0_3, __w4_7);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w8_11, uint32x4_t __w12_15)
-{
-  return __builtin_arm_crypto_sha256su1 (__tw0_3, __w8_11, __w12_15);
-}
-
-__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
-vmull_p64 (poly64_t __a, poly64_t __b)
-{
-  return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __a, (uint64_t) __b);
-}
-
-__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
-vmull_high_p64 (poly64x2_t __a, poly64x2_t __b)
-{
-  poly64_t __t1 = vget_high_p64 (__a);
-  poly64_t __t2 = vget_high_p64 (__b);
-
-  return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __t1, (uint64_t) __t2);
-}
-
-#endif
-"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fdd01b302bd3ab052f731d61a54b8355d83e2bd5..8af6df819aec5a7f89035db1d6405f79cb506ec3 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2016-07-05  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * gcc.target/arm/neon/polytypes.c: Move to ...
+       * gcc.target/arm/polytypes.c: ... here.
+       * gcc.target/arm/neon/pr51534.c: Move to ...
+       * gcc.target/arm/pr51534.c: ... here.
+       * gcc.target/arm/neon/vect-vcvt.c: Move to ...
+       * gcc.target/arm/vect-vcvt.c: ... here.
+       * gcc.target/arm/neon/vect-vcvtq.c: Move to ...
+       * gcc.target/arm/vect-vcvtq.c: ... here.
+       * gcc.target/arm/neon/vfp-shift-a2t2.c: Move to ...
+       * gcc.target/arm/vfp-shift-a2t2.c: ... here.
+       * gcc.target/arm/neon/vst1Q_laneu64-1.c: Move to ...
+       * gcc.target/arm/vst1Q_laneu64-1.c: ... here. Fix foo() prototype.
+       * gcc.target/arm/neon/neon.exp: Delete.
+       * gcc.target/arm/neon/: Delete.
+
 2016-07-04  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
        PR fortran/65575

diff --git a/gcc/testsuite/gcc.target/arm/neon/neon.exp b/gcc/testsuite/gcc.target/arm/neon/neon.exp
deleted file mode 100644 (file)
index d440fc0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/neon.exp
+++ /dev/null
@@ -1,35 +0,0 @@
-# Copyright (C) 1997-2016 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GCC; see the file COPYING3.  If not see
-# <http://www.gnu.org/licenses/>.
-
-# GCC testsuite that uses the `dg.exp' driver.
-
-# Exit immediately if this isn't an ARM target.
-if ![istarget arm*-*-*] then {
-  return
-}
-
-# Load support procs.
-load_lib gcc-dg.exp
-
-# Initialize `dg'.
-dg-init
-
-# Main loop.
-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
-       "" ""
-
-# All done.
-dg-finish

diff --git a/gcc/testsuite/gcc.target/arm/neon/polytypes.c b/gcc/testsuite/gcc.target/arm/neon/polytypes.c
deleted file mode 100644 (file)
index f91f800..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/polytypes.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/* Check that NEON polynomial vector types are suitably incompatible with
-   integer vector types of the same layout.  */
-
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-add-options arm_neon } */
-
-#include <arm_neon.h>
-
-void s64_8 (int8x8_t a) {}
-void u64_8 (uint8x8_t a) {}
-void p64_8 (poly8x8_t a) {}
-void s64_16 (int16x4_t a) {}
-void u64_16 (uint16x4_t a) {}
-void p64_16 (poly16x4_t a) {}
-
-void s128_8 (int8x16_t a) {}
-void u128_8 (uint8x16_t a) {}
-void p128_8 (poly8x16_t a) {}
-void s128_16 (int16x8_t a) {}
-void u128_16 (uint16x8_t a) {}
-void p128_16 (poly16x8_t a) {}
-
-void foo ()
-{
-  poly8x8_t v64_8;
-  poly16x4_t v64_16;
-  poly8x16_t v128_8;
-  poly16x8_t v128_16;
-
-  s64_8 (v64_8); /* { dg-message "use -flax-vector-conversions" } */
-  /* { dg-error "incompatible type for argument 1 of 's64_8'" "" { target *-*-* } 31 } */
-  u64_8 (v64_8); /* { dg-error "incompatible type for argument 1 of 'u64_8'" } */
-  p64_8 (v64_8);
-
-  s64_16 (v64_16); /* { dg-error "incompatible type for argument 1 of 's64_16'" } */
-  u64_16 (v64_16); /* { dg-error "incompatible type for argument 1 of 'u64_16'" } */
-  p64_16 (v64_16);
-
-  s128_8 (v128_8); /* { dg-error "incompatible type for argument 1 of 's128_8'" } */
-  u128_8 (v128_8); /* { dg-error "incompatible type for argument 1 of 'u128_8'" } */
-  p128_8 (v128_8);
-
-  s128_16 (v128_16); /* { dg-error "incompatible type for argument 1 of 's128_16'" } */
-  u128_16 (v128_16); /* { dg-error "incompatible type for argument 1 of 'u128_16'" } */
-  p128_16 (v128_16);
-}
-/* { dg-message "note: expected '\[^'\n\]*' but argument is of type '\[^'\n\]*'" "note: expected" { target *-*-* } 0 } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/pr51534.c b/gcc/testsuite/gcc.target/arm/neon/pr51534.c
deleted file mode 100644 (file)
index f675a44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/pr51534.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/* Test the vector comparison intrinsics when comparing to immediate zero.
-   */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -mfloat-abi=hard -O3" } */
-/* { dg-add-options arm_neon } */
-
-#include <arm_neon.h>
-
-#define GEN_TEST(T, D, C, R) \
-  R test_##C##_##T (T a) { return C (a, D (0)); }
-
-#define GEN_DOUBLE_TESTS(S, T, C) \
-  GEN_TEST (T, vdup_n_s##S, C##_s##S, u##T) \
-  GEN_TEST (u##T, vdup_n_u##S, C##_u##S, u##T) 
-
-#define GEN_QUAD_TESTS(S, T, C) \
-  GEN_TEST (T, vdupq_n_s##S, C##q_s##S, u##T) \
-  GEN_TEST (u##T, vdupq_n_u##S, C##q_u##S, u##T) 
-
-#define GEN_COND_TESTS(C) \
-  GEN_DOUBLE_TESTS (8, int8x8_t, C) \
-  GEN_DOUBLE_TESTS (16, int16x4_t, C) \
-  GEN_DOUBLE_TESTS (32, int32x2_t, C) \
-  GEN_QUAD_TESTS (8, int8x16_t, C) \
-  GEN_QUAD_TESTS (16, int16x8_t, C) \
-  GEN_QUAD_TESTS (32, int32x4_t, C)
-
-GEN_COND_TESTS(vcgt)
-GEN_COND_TESTS(vcge)
-GEN_COND_TESTS(vclt)
-GEN_COND_TESTS(vcle)
-GEN_COND_TESTS(vceq)
-
-/* Scan for expected outputs.  */
-/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcgt\.u8\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcgt\.u16\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcgt\.u32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcgt\.u8\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcgt\.u16\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcgt\.u32\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcge\.u8\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcge\.u16\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcge\.u32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcge\.u8\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcge\.u16\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vcge\.u32\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler "vclt\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vclt\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vclt\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vclt\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vclt\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vclt\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vcle\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vcle\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vcle\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vcle\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vcle\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler "vcle\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
-/* { dg-final { scan-assembler-times "vceq\.i8\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
-/* { dg-final { scan-assembler-times "vceq\.i16\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
-/* { dg-final { scan-assembler-times "vceq\.i32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
-/* { dg-final { scan-assembler-times "vceq\.i8\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" 2 } } */
-/* { dg-final { scan-assembler-times "vceq\.i16\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" 2 } } */
-/* { dg-final { scan-assembler-times "vceq\.i32\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" 2 } } */
-
-/* And ensure we don't have unexpected output too.  */
-/* { dg-final { scan-assembler-not "vc\[gl\]\[te\]\.u\[0-9\]+\[        \]+\[qQdD\]\[0-9\]+, \[qQdD\]\[0-9\]+, #0" } } */
-
-/* Tidy up.  */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
deleted file mode 100644 (file)
index d2424d9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vraddhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
deleted file mode 100644 (file)
index a787bcc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vraddhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
deleted file mode 100644 (file)
index dde572c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vraddhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
deleted file mode 100644 (file)
index 74098a9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vraddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
deleted file mode 100644 (file)
index 4795f44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vraddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
deleted file mode 100644 (file)
index d3a7e0b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vraddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
deleted file mode 100644 (file)
index d8da627..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vrhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
deleted file mode 100644 (file)
index 6281ade..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vrhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
deleted file mode 100644 (file)
index a558ca3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vrhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
deleted file mode 100644 (file)
index 06822c2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vrhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
deleted file mode 100644 (file)
index 713e70a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vrhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
deleted file mode 100644 (file)
index 64a912f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vrhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
deleted file mode 100644 (file)
index 8eb5504..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vrhadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
deleted file mode 100644 (file)
index a1acebd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vrhadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
deleted file mode 100644 (file)
index df7f58c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vrhadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
deleted file mode 100644 (file)
index 215eb15..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vrhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
deleted file mode 100644 (file)
index 2d8d5fb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vrhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
deleted file mode 100644 (file)
index 362a546..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vrhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
deleted file mode 100644 (file)
index 74bd3aa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
deleted file mode 100644 (file)
index a6a9e4c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
deleted file mode 100644 (file)
index 8201a04..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
deleted file mode 100644 (file)
index 28d281f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
deleted file mode 100644 (file)
index 66d2788..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
deleted file mode 100644 (file)
index 4185fbe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
deleted file mode 100644 (file)
index fb0eddd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
deleted file mode 100644 (file)
index cee1b9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls16.c b/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
deleted file mode 100644 (file)
index ac7158a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vrshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls32.c b/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
deleted file mode 100644 (file)
index 8da5918..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vrshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls64.c b/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
deleted file mode 100644 (file)
index 2e732ee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vrshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls8.c b/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
deleted file mode 100644 (file)
index f0c351d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vrshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
deleted file mode 100644 (file)
index 1a7751b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
deleted file mode 100644 (file)
index 198b13c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
deleted file mode 100644 (file)
index 3f67aaa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
deleted file mode 100644 (file)
index 4399482..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
deleted file mode 100644 (file)
index a89842b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vrshrq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
deleted file mode 100644 (file)
index 00ec911..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vrshrq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
deleted file mode 100644 (file)
index 0b1851e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vrshrq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
deleted file mode 100644 (file)
index 80084d0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrshrq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
deleted file mode 100644 (file)
index a24ea19..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vrshrq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
deleted file mode 100644 (file)
index fa4e20d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrshrq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
deleted file mode 100644 (file)
index 9e61a69..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vrshrq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
deleted file mode 100644 (file)
index 3445c8d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrshrq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
deleted file mode 100644 (file)
index 5445d59..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vrshr_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
deleted file mode 100644 (file)
index 8b3f60d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vrshr_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
deleted file mode 100644 (file)
index 1d3735a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vrshr_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
deleted file mode 100644 (file)
index dc011d9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrshr_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
deleted file mode 100644 (file)
index 890c886..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vrshr_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
deleted file mode 100644 (file)
index 5994f6b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrshr_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
deleted file mode 100644 (file)
index 0304770..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vrshr_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
deleted file mode 100644 (file)
index 4df95c2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrshr_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
deleted file mode 100644 (file)
index 7f42303..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vrshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
deleted file mode 100644 (file)
index 6c0559f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vrshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
deleted file mode 100644 (file)
index 0f223c9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vrshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
deleted file mode 100644 (file)
index 12ba625..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vrshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
deleted file mode 100644 (file)
index 8b2014f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vrshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
deleted file mode 100644 (file)
index f3bf756..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vrshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
deleted file mode 100644 (file)
index 66e2ea0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vrsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
deleted file mode 100644 (file)
index b6c3cb8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vrsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
deleted file mode 100644 (file)
index 8d68b1a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vrsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
deleted file mode 100644 (file)
index 413f49e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vrsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
deleted file mode 100644 (file)
index d9e6680..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vrsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
deleted file mode 100644 (file)
index 56ae886..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vrsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
deleted file mode 100644 (file)
index 2ce4af3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vrsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
deleted file mode 100644 (file)
index 53078a0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vrsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
deleted file mode 100644 (file)
index bc68117..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vrsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
deleted file mode 100644 (file)
index caeb45b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vrsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
deleted file mode 100644 (file)
index b9ea8c8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vrsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
deleted file mode 100644 (file)
index f32ae16..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vrsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
deleted file mode 100644 (file)
index b6d2cce..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vrsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
deleted file mode 100644 (file)
index 99c217b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vrsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
deleted file mode 100644 (file)
index 6eaa2ae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vrsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
deleted file mode 100644 (file)
index 6ae17f7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vrsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
deleted file mode 100644 (file)
index b0a5cb0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vrsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
deleted file mode 100644 (file)
index 31e01e0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vrsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
deleted file mode 100644 (file)
index e1c8c9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vrsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
deleted file mode 100644 (file)
index 58368f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vrsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
deleted file mode 100644 (file)
index edb7b4f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vrsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
deleted file mode 100644 (file)
index 2b1c77f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vrsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
deleted file mode 100644 (file)
index f0c6971..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vabaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
deleted file mode 100644 (file)
index cc68f6f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vabaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
deleted file mode 100644 (file)
index 7b1bfeb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vabaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
deleted file mode 100644 (file)
index 3b5ba07..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vabaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
deleted file mode 100644 (file)
index cf526e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vabaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
deleted file mode 100644 (file)
index 484fb7f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vabaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals16.c b/gcc/testsuite/gcc.target/arm/neon/vabals16.c
deleted file mode 100644 (file)
index 6617e2e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabals16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabals16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vabal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals32.c b/gcc/testsuite/gcc.target/arm/neon/vabals32.c
deleted file mode 100644 (file)
index 2110dee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabals32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabals32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vabal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals8.c b/gcc/testsuite/gcc.target/arm/neon/vabals8.c
deleted file mode 100644 (file)
index c313a11..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabals8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabals8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabals8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int16x8_t = vabal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu16.c b/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
deleted file mode 100644 (file)
index f43c8ed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabalu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabalu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vabal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu32.c b/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
deleted file mode 100644 (file)
index 12af072..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabalu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabalu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vabal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu8.c b/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
deleted file mode 100644 (file)
index 05ba747..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabalu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabalu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint16x8_t = vabal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas16.c b/gcc/testsuite/gcc.target/arm/neon/vabas16.c
deleted file mode 100644 (file)
index 9094ecb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabas16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabas16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabas16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vaba_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas32.c b/gcc/testsuite/gcc.target/arm/neon/vabas32.c
deleted file mode 100644 (file)
index 184fc95..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabas32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabas32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabas32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vaba_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas8.c b/gcc/testsuite/gcc.target/arm/neon/vabas8.c
deleted file mode 100644 (file)
index b9bc813..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabas8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabas8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabas8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vaba_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau16.c b/gcc/testsuite/gcc.target/arm/neon/vabau16.c
deleted file mode 100644 (file)
index d3b8c4e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabau16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabau16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabau16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vaba_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau32.c b/gcc/testsuite/gcc.target/arm/neon/vabau32.c
deleted file mode 100644 (file)
index 2c65f1b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabau32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabau32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabau32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vaba_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau8.c b/gcc/testsuite/gcc.target/arm/neon/vabau8.c
deleted file mode 100644 (file)
index 665410c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabau8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabau8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabau8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vaba_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
deleted file mode 100644 (file)
index 682736f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vabdq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
deleted file mode 100644 (file)
index 37349e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vabdq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
deleted file mode 100644 (file)
index 961b4ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vabdq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
deleted file mode 100644 (file)
index b6d6eaf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vabdq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
deleted file mode 100644 (file)
index 1c86be1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vabdq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
deleted file mode 100644 (file)
index a263b65..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vabdq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
deleted file mode 100644 (file)
index d217f48..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vabdq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdf32.c b/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
deleted file mode 100644 (file)
index 9454282..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vabd_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls16.c b/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
deleted file mode 100644 (file)
index 63ac7e3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vabdl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls32.c b/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
deleted file mode 100644 (file)
index 7d51343..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vabdl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls8.c b/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
deleted file mode 100644 (file)
index 0d9ac62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vabdl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
deleted file mode 100644 (file)
index 6f19e67..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdlu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vabdl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
deleted file mode 100644 (file)
index 0ec3f93..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdlu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vabdl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
deleted file mode 100644 (file)
index 0d981fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdlu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vabdl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds16.c b/gcc/testsuite/gcc.target/arm/neon/vabds16.c
deleted file mode 100644 (file)
index a13ee88..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vabd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds32.c b/gcc/testsuite/gcc.target/arm/neon/vabds32.c
deleted file mode 100644 (file)
index fdbfdb6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vabd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds8.c b/gcc/testsuite/gcc.target/arm/neon/vabds8.c
deleted file mode 100644 (file)
index 2b0fe0a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vabd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
deleted file mode 100644 (file)
index ca599ac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vabd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
deleted file mode 100644 (file)
index cdd8342..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vabd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
deleted file mode 100644 (file)
index 1d93918..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vabd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
deleted file mode 100644 (file)
index f77af2a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vabsq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
deleted file mode 100644 (file)
index 5b3a357..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vabsq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
deleted file mode 100644 (file)
index a0ad403..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vabsq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
deleted file mode 100644 (file)
index 786d200..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vabsq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsf32.c b/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
deleted file mode 100644 (file)
index b1845da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vabs_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss16.c b/gcc/testsuite/gcc.target/arm/neon/vabss16.c
deleted file mode 100644 (file)
index ad37064..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabss16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vabs_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss32.c b/gcc/testsuite/gcc.target/arm/neon/vabss32.c
deleted file mode 100644 (file)
index 3806698..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabss32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vabs_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss8.c b/gcc/testsuite/gcc.target/arm/neon/vabss8.c
deleted file mode 100644 (file)
index a36a2a7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabss8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vabs_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
deleted file mode 100644 (file)
index dd2c06a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vaddq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
deleted file mode 100644 (file)
index ec000fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
deleted file mode 100644 (file)
index 34ead8c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
deleted file mode 100644 (file)
index 77942de..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vaddq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
deleted file mode 100644 (file)
index 42bcdf9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
deleted file mode 100644 (file)
index 983bb35..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
deleted file mode 100644 (file)
index c98772e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
deleted file mode 100644 (file)
index 95756c6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
deleted file mode 100644 (file)
index e52524e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddf32.c b/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
deleted file mode 100644 (file)
index 6afb8c1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vadd_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
deleted file mode 100644 (file)
index f3f35e4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vaddhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
deleted file mode 100644 (file)
index 028f431..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vaddhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
deleted file mode 100644 (file)
index f139a6d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vaddhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
deleted file mode 100644 (file)
index 6c77062..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vaddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
deleted file mode 100644 (file)
index 5315f91..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vaddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
deleted file mode 100644 (file)
index 6aa2560..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vaddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls16.c b/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
deleted file mode 100644 (file)
index 4b84ae8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vaddl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls32.c b/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
deleted file mode 100644 (file)
index 3f267cc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vaddl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls8.c b/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
deleted file mode 100644 (file)
index c213610..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vaddl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
deleted file mode 100644 (file)
index 6e5341c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddlu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vaddl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
deleted file mode 100644 (file)
index bc4359b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddlu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vaddl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
deleted file mode 100644 (file)
index 9ec110e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddlu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vaddl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds16.c b/gcc/testsuite/gcc.target/arm/neon/vadds16.c
deleted file mode 100644 (file)
index 1c2f70b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds32.c b/gcc/testsuite/gcc.target/arm/neon/vadds32.c
deleted file mode 100644 (file)
index 8889228..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds64.c b/gcc/testsuite/gcc.target/arm/neon/vadds64.c
deleted file mode 100644 (file)
index 8b6bb5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vadds64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds8.c b/gcc/testsuite/gcc.target/arm/neon/vadds8.c
deleted file mode 100644 (file)
index 6165e62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
deleted file mode 100644 (file)
index c346915..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
deleted file mode 100644 (file)
index 8436c12..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
deleted file mode 100644 (file)
index 4cf9fcf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vaddu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
deleted file mode 100644 (file)
index 8435a7b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws16.c b/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
deleted file mode 100644 (file)
index 8021483..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddws16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddws16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vaddw_s16 (arg0_int32x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws32.c b/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
deleted file mode 100644 (file)
index 5691af3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddws32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddws32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vaddw_s32 (arg0_int64x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws8.c b/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
deleted file mode 100644 (file)
index 0a774c0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddws8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddws8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vaddw_s8 (arg0_int16x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
deleted file mode 100644 (file)
index a7cfc65..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddwu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddwu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vaddw_u16 (arg0_uint32x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
deleted file mode 100644 (file)
index 40f86f1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddwu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddwu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vaddw_u32 (arg0_uint64x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
deleted file mode 100644 (file)
index bb6d0fb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddwu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddwu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vaddw_u8 (arg0_uint16x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs16.c b/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
deleted file mode 100644 (file)
index bfc9a21..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vandq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs32.c b/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
deleted file mode 100644 (file)
index feeca56..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vandq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs64.c b/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
deleted file mode 100644 (file)
index 6c67c14..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vandq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs8.c b/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
deleted file mode 100644 (file)
index 7411c33..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vandq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu16.c b/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
deleted file mode 100644 (file)
index 710312d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vandq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu32.c b/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
deleted file mode 100644 (file)
index 64a956d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vandq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu64.c b/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
deleted file mode 100644 (file)
index 832d83c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vandq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu8.c b/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
deleted file mode 100644 (file)
index 4820aa4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vandq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vands16.c b/gcc/testsuite/gcc.target/arm/neon/vands16.c
deleted file mode 100644 (file)
index 0e17817..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vands16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vand_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vands32.c b/gcc/testsuite/gcc.target/arm/neon/vands32.c
deleted file mode 100644 (file)
index d56529e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vands32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vand_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vands64.c b/gcc/testsuite/gcc.target/arm/neon/vands64.c
deleted file mode 100644 (file)
index 1641594..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vands64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vands8.c b/gcc/testsuite/gcc.target/arm/neon/vands8.c
deleted file mode 100644 (file)
index 961e3d8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vands8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vand_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu16.c b/gcc/testsuite/gcc.target/arm/neon/vandu16.c
deleted file mode 100644 (file)
index d60a0a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vand_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu32.c b/gcc/testsuite/gcc.target/arm/neon/vandu32.c
deleted file mode 100644 (file)
index 79f5773..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vand_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu64.c b/gcc/testsuite/gcc.target/arm/neon/vandu64.c
deleted file mode 100644 (file)
index 40172e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vandu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu8.c b/gcc/testsuite/gcc.target/arm/neon/vandu8.c
deleted file mode 100644 (file)
index 1244eca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vand_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
deleted file mode 100644 (file)
index ff66255..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x8_t out_int16x8_t;
-int16x8_t arg0_int16x8_t;
-int16x8_t arg1_int16x8_t;
-void test_vbicQs16 (void)
-{
-
-  out_int16x8_t = vbicq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
deleted file mode 100644 (file)
index 4a691bd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x4_t out_int32x4_t;
-int32x4_t arg0_int32x4_t;
-int32x4_t arg1_int32x4_t;
-void test_vbicQs32 (void)
-{
-
-  out_int32x4_t = vbicq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
deleted file mode 100644 (file)
index 403098f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x2_t out_int64x2_t;
-int64x2_t arg0_int64x2_t;
-int64x2_t arg1_int64x2_t;
-void test_vbicQs64 (void)
-{
-
-  out_int64x2_t = vbicq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
deleted file mode 100644 (file)
index 576769c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x16_t out_int8x16_t;
-int8x16_t arg0_int8x16_t;
-int8x16_t arg1_int8x16_t;
-void test_vbicQs8 (void)
-{
-
-  out_int8x16_t = vbicq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
deleted file mode 100644 (file)
index 3504a26..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x8_t out_uint16x8_t;
-uint16x8_t arg0_uint16x8_t;
-uint16x8_t arg1_uint16x8_t;
-void test_vbicQu16 (void)
-{
-
-  out_uint16x8_t = vbicq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
deleted file mode 100644 (file)
index 993280b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x4_t out_uint32x4_t;
-uint32x4_t arg0_uint32x4_t;
-uint32x4_t arg1_uint32x4_t;
-void test_vbicQu32 (void)
-{
-
-  out_uint32x4_t = vbicq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
deleted file mode 100644 (file)
index fb27c62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x2_t out_uint64x2_t;
-uint64x2_t arg0_uint64x2_t;
-uint64x2_t arg1_uint64x2_t;
-void test_vbicQu64 (void)
-{
-
-  out_uint64x2_t = vbicq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
deleted file mode 100644 (file)
index 65f0e40..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x16_t out_uint8x16_t;
-uint8x16_t arg0_uint8x16_t;
-uint8x16_t arg1_uint8x16_t;
-void test_vbicQu8 (void)
-{
-
-  out_uint8x16_t = vbicq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics16.c b/gcc/testsuite/gcc.target/arm/neon/vbics16.c
deleted file mode 100644 (file)
index 95aed5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbics16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x4_t out_int16x4_t;
-int16x4_t arg0_int16x4_t;
-int16x4_t arg1_int16x4_t;
-void test_vbics16 (void)
-{
-
-  out_int16x4_t = vbic_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics32.c b/gcc/testsuite/gcc.target/arm/neon/vbics32.c
deleted file mode 100644 (file)
index 925d748..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbics32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x2_t out_int32x2_t;
-int32x2_t arg0_int32x2_t;
-int32x2_t arg1_int32x2_t;
-void test_vbics32 (void)
-{
-
-  out_int32x2_t = vbic_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics64.c b/gcc/testsuite/gcc.target/arm/neon/vbics64.c
deleted file mode 100644 (file)
index c7ab6cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vbics64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x1_t out_int64x1_t;
-int64x1_t arg0_int64x1_t;
-int64x1_t arg1_int64x1_t;
-void test_vbics64 (void)
-{
-
-  out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics8.c b/gcc/testsuite/gcc.target/arm/neon/vbics8.c
deleted file mode 100644 (file)
index 22e2a12..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbics8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x8_t out_int8x8_t;
-int8x8_t arg0_int8x8_t;
-int8x8_t arg1_int8x8_t;
-void test_vbics8 (void)
-{
-
-  out_int8x8_t = vbic_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu16.c b/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
deleted file mode 100644 (file)
index cfa96c1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x4_t out_uint16x4_t;
-uint16x4_t arg0_uint16x4_t;
-uint16x4_t arg1_uint16x4_t;
-void test_vbicu16 (void)
-{
-
-  out_uint16x4_t = vbic_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu32.c b/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
deleted file mode 100644 (file)
index 65f49a5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x2_t out_uint32x2_t;
-uint32x2_t arg0_uint32x2_t;
-uint32x2_t arg1_uint32x2_t;
-void test_vbicu32 (void)
-{
-
-  out_uint32x2_t = vbic_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
deleted file mode 100644 (file)
index 89c8a5e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vbicu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x1_t out_uint64x1_t;
-uint64x1_t arg0_uint64x1_t;
-uint64x1_t arg1_uint64x1_t;
-void test_vbicu64 (void)
-{
-
-  out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu8.c b/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
deleted file mode 100644 (file)
index 930eb36..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x8_t out_uint8x8_t;
-uint8x8_t arg0_uint8x8_t;
-uint8x8_t arg1_uint8x8_t;
-void test_vbicu8 (void)
-{
-
-  out_uint8x8_t = vbic_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
deleted file mode 100644 (file)
index 6db03f3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vbslq_f32 (arg0_uint32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
deleted file mode 100644 (file)
index 0c0c88d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-  poly16x8_t arg2_poly16x8_t;
-
-  out_poly16x8_t = vbslq_p16 (arg0_uint16x8_t, arg1_poly16x8_t, arg2_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
deleted file mode 100644 (file)
index 50d8180..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vbslQp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-  poly64x2_t arg2_poly64x2_t;
-
-  out_poly64x2_t = vbslq_p64 (arg0_uint64x2_t, arg1_poly64x2_t, arg2_poly64x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
deleted file mode 100644 (file)
index 2d09700..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-  poly8x16_t arg2_poly8x16_t;
-
-  out_poly8x16_t = vbslq_p8 (arg0_uint8x16_t, arg1_poly8x16_t, arg2_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
deleted file mode 100644 (file)
index 2803194..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vbslq_s16 (arg0_uint16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
deleted file mode 100644 (file)
index 637895d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vbslq_s32 (arg0_uint32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
deleted file mode 100644 (file)
index d329d19..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-  int64x2_t arg2_int64x2_t;
-
-  out_int64x2_t = vbslq_s64 (arg0_uint64x2_t, arg1_int64x2_t, arg2_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
deleted file mode 100644 (file)
index 5e78bbc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vbslq_s8 (arg0_uint8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
deleted file mode 100644 (file)
index 2446349..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vbslq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
deleted file mode 100644 (file)
index a8c32a4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vbslq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
deleted file mode 100644 (file)
index fd00ae8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-  uint64x2_t arg2_uint64x2_t;
-
-  out_uint64x2_t = vbslq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, arg2_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
deleted file mode 100644 (file)
index 1235843..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vbslq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslf32.c b/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
deleted file mode 100644 (file)
index 345f1c8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vbsl_f32 (arg0_uint32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp16.c b/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
deleted file mode 100644 (file)
index 6ce42b3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-  poly16x4_t arg2_poly16x4_t;
-
-  out_poly16x4_t = vbsl_p16 (arg0_uint16x4_t, arg1_poly16x4_t, arg2_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
deleted file mode 100644 (file)
index 0ff4cfc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vbslp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-  poly64x1_t arg2_poly64x1_t;
-
-  out_poly64x1_t = vbsl_p64 (arg0_uint64x1_t, arg1_poly64x1_t, arg2_poly64x1_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp8.c b/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
deleted file mode 100644 (file)
index 6e1f187..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-  poly8x8_t arg2_poly8x8_t;
-
-  out_poly8x8_t = vbsl_p8 (arg0_uint8x8_t, arg1_poly8x8_t, arg2_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls16.c b/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
deleted file mode 100644 (file)
index 3368f99..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vbsl_s16 (arg0_uint16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls32.c b/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
deleted file mode 100644 (file)
index 40bc0ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vbsl_s32 (arg0_uint32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls64.c b/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
deleted file mode 100644 (file)
index 8249a62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-  int64x1_t arg2_int64x1_t;
-
-  out_int64x1_t = vbsl_s64 (arg0_uint64x1_t, arg1_int64x1_t, arg2_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls8.c b/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
deleted file mode 100644 (file)
index 914a1d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vbsl_s8 (arg0_uint8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu16.c b/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
deleted file mode 100644 (file)
index 7106ffc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vbsl_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu32.c b/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
deleted file mode 100644 (file)
index f6922e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vbsl_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu64.c b/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
deleted file mode 100644 (file)
index 724fdb3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-  uint64x1_t arg2_uint64x1_t;
-
-  out_uint64x1_t = vbsl_u64 (arg0_uint64x1_t, arg1_uint64x1_t, arg2_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu8.c b/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
deleted file mode 100644 (file)
index a27bc64..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vbsl_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
deleted file mode 100644 (file)
index 48e8e79..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcageQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcageQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcageq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagef32.c b/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
deleted file mode 100644 (file)
index 52084e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcagef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcagef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcage_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
deleted file mode 100644 (file)
index e7290ed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcagtQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcagtQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcagtq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c b/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
deleted file mode 100644 (file)
index ce8969b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcagtf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcagtf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcagt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
deleted file mode 100644 (file)
index b429bba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcaleQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcaleQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcaleq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcalef32.c b/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
deleted file mode 100644 (file)
index a834065..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcalef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcalef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcale_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
deleted file mode 100644 (file)
index dbebe48..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcaltQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcaltQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcaltq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
deleted file mode 100644 (file)
index 004edc6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcaltf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcaltf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcalt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
deleted file mode 100644 (file)
index 6a53721..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vceqq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
deleted file mode 100644 (file)
index 556fbdf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQp8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_uint8x16_t = vceqq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
deleted file mode 100644 (file)
index cfbf64a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vceqq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
deleted file mode 100644 (file)
index 1b75729..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vceqq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
deleted file mode 100644 (file)
index d6d6d30..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vceqq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
deleted file mode 100644 (file)
index 6f33d9d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vceqq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
deleted file mode 100644 (file)
index df2d47b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vceqq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
deleted file mode 100644 (file)
index 80d56ff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vceqq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqf32.c b/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
deleted file mode 100644 (file)
index 046a505..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vceq_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqp8.c b/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
deleted file mode 100644 (file)
index 5758eba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqp8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_uint8x8_t = vceq_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs16.c b/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
deleted file mode 100644 (file)
index 11337b0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqs16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vceq_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs32.c b/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
deleted file mode 100644 (file)
index 506c980..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqs32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vceq_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs8.c b/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
deleted file mode 100644 (file)
index c76e2b4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqs8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vceq_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ16.c b/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
deleted file mode 100644 (file)
index dda7ab7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcequ16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcequ16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vceq_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ32.c b/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
deleted file mode 100644 (file)
index 4ee8c5f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcequ32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcequ32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vceq_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ8.c b/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
deleted file mode 100644 (file)
index 60134cf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcequ8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcequ8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vceq_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
deleted file mode 100644 (file)
index 93a5e3c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcgeq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
deleted file mode 100644 (file)
index f60344f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcgeq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
deleted file mode 100644 (file)
index 1d8cacc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcgeq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
deleted file mode 100644 (file)
index b5bb84e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcgeq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
deleted file mode 100644 (file)
index 62f060f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcgeq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
deleted file mode 100644 (file)
index a86dfa2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcgeq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
deleted file mode 100644 (file)
index fbf678c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcgeq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgef32.c b/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
deleted file mode 100644 (file)
index f12259a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcge_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges16.c b/gcc/testsuite/gcc.target/arm/neon/vcges16.c
deleted file mode 100644 (file)
index d420dec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcges16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcges16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcges16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vcge_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges32.c b/gcc/testsuite/gcc.target/arm/neon/vcges32.c
deleted file mode 100644 (file)
index c4e7315..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcges32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcges32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcges32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vcge_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges8.c b/gcc/testsuite/gcc.target/arm/neon/vcges8.c
deleted file mode 100644 (file)
index 0484e24..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcges8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcges8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcges8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vcge_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
deleted file mode 100644 (file)
index 89874e0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vcge_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
deleted file mode 100644 (file)
index cb907fd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vcge_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
deleted file mode 100644 (file)
index 01af809..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vcge_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
deleted file mode 100644 (file)
index ab5f92d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcgtq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
deleted file mode 100644 (file)
index 5e966f7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcgtq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
deleted file mode 100644 (file)
index 3db4176..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcgtq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
deleted file mode 100644 (file)
index a092e21..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcgtq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
deleted file mode 100644 (file)
index 2239331..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcgtq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
deleted file mode 100644 (file)
index 430f3ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcgtq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
deleted file mode 100644 (file)
index bb38a0e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcgtq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
deleted file mode 100644 (file)
index 1717807..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcgt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts16.c b/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
deleted file mode 100644 (file)
index 0508883..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgts16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vcgt_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts32.c b/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
deleted file mode 100644 (file)
index 09dc2b5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgts32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vcgt_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts8.c b/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
deleted file mode 100644 (file)
index 1cb6b02..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgts8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vcgt_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
deleted file mode 100644 (file)
index 0c76d53..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vcgt_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
deleted file mode 100644 (file)
index ae6aae5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vcgt_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
deleted file mode 100644 (file)
index 3ed6bcc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vcgt_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
deleted file mode 100644 (file)
index cc24025..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcleq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
deleted file mode 100644 (file)
index e4efae9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcleq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
deleted file mode 100644 (file)
index a432421..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcleq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
deleted file mode 100644 (file)
index a6d2d77..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcleq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
deleted file mode 100644 (file)
index 72dccdc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcleq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
deleted file mode 100644 (file)
index c057a4f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcleq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
deleted file mode 100644 (file)
index 618232e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcleq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclef32.c b/gcc/testsuite/gcc.target/arm/neon/vclef32.c
deleted file mode 100644 (file)
index e4ef973..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcle_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles16.c b/gcc/testsuite/gcc.target/arm/neon/vcles16.c
deleted file mode 100644 (file)
index 8b835b3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcles16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcles16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcles16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vcle_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles32.c b/gcc/testsuite/gcc.target/arm/neon/vcles32.c
deleted file mode 100644 (file)
index f5035d2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcles32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcles32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcles32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vcle_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles8.c b/gcc/testsuite/gcc.target/arm/neon/vcles8.c
deleted file mode 100644 (file)
index 65b5962..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcles8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcles8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcles8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vcle_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu16.c b/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
deleted file mode 100644 (file)
index a518241..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vcle_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu32.c b/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
deleted file mode 100644 (file)
index f1d83e8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vcle_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu8.c b/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
deleted file mode 100644 (file)
index 3a39454..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vcle_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
deleted file mode 100644 (file)
index 5c87852..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vclsq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
deleted file mode 100644 (file)
index c44d5a7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vclsq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
deleted file mode 100644 (file)
index a4c7cfe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vclsq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss16.c b/gcc/testsuite/gcc.target/arm/neon/vclss16.c
deleted file mode 100644 (file)
index 5b43fae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclss16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vcls_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss32.c b/gcc/testsuite/gcc.target/arm/neon/vclss32.c
deleted file mode 100644 (file)
index e60c1c0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclss32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vcls_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss8.c b/gcc/testsuite/gcc.target/arm/neon/vclss8.c
deleted file mode 100644 (file)
index 272ef8d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclss8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vcls_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
deleted file mode 100644 (file)
index 9523412..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcltq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
deleted file mode 100644 (file)
index fc67ae1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcltq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
deleted file mode 100644 (file)
index 58da373..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcltq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
deleted file mode 100644 (file)
index 800a502..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcltq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
deleted file mode 100644 (file)
index b6435de..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcltq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
deleted file mode 100644 (file)
index 43205b7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcltq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
deleted file mode 100644 (file)
index d65a825..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcltq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltf32.c b/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
deleted file mode 100644 (file)
index f18e000..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vclt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts16.c b/gcc/testsuite/gcc.target/arm/neon/vclts16.c
deleted file mode 100644 (file)
index 115675e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclts16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vclt_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts32.c b/gcc/testsuite/gcc.target/arm/neon/vclts32.c
deleted file mode 100644 (file)
index 99771d2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclts32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vclt_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts8.c b/gcc/testsuite/gcc.target/arm/neon/vclts8.c
deleted file mode 100644 (file)
index 372b4af..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclts8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vclt_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu16.c b/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
deleted file mode 100644 (file)
index 2a3012e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vclt_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu32.c b/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
deleted file mode 100644 (file)
index 51426a5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vclt_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu8.c b/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
deleted file mode 100644 (file)
index 0606a32..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vclt_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
deleted file mode 100644 (file)
index 6652d3d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vclzq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
deleted file mode 100644 (file)
index 8eb1f6c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vclzq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
deleted file mode 100644 (file)
index e1bc052..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vclzq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
deleted file mode 100644 (file)
index 4f92e4a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vclzq_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
deleted file mode 100644 (file)
index 67936cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vclzq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
deleted file mode 100644 (file)
index b889cb7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vclzq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs16.c b/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
deleted file mode 100644 (file)
index 4c9cee3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vclz_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs32.c b/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
deleted file mode 100644 (file)
index 9827d90..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vclz_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs8.c b/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
deleted file mode 100644 (file)
index bb262c2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vclz_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu16.c b/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
deleted file mode 100644 (file)
index ee8dd30..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vclz_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu32.c b/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
deleted file mode 100644 (file)
index 963248d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vclz_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu8.c b/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
deleted file mode 100644 (file)
index a71042f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vclz_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
deleted file mode 100644 (file)
index 5598f4d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vcntq_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
deleted file mode 100644 (file)
index 5e0710e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vcntq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
deleted file mode 100644 (file)
index a654148..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vcntq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntp8.c b/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
deleted file mode 100644 (file)
index a75dfa5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vcnt_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcnts8.c b/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
deleted file mode 100644 (file)
index 348221e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcnts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcnts8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vcnt_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntu8.c b/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
deleted file mode 100644 (file)
index cb4428d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vcnt_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c b/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
deleted file mode 100644 (file)
index 8c280bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombinef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x4_t = vcombine_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
deleted file mode 100644 (file)
index 59a840f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombinep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x8_t = vcombine_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
deleted file mode 100644 (file)
index 5d1aef3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vcombinep64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x2_t = vcombine_p64 (arg0_poly64x1_t, arg1_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
deleted file mode 100644 (file)
index 9784f58..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombinep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x16_t = vcombine_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines16.c b/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
deleted file mode 100644 (file)
index 520c013..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vcombine_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines32.c b/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
deleted file mode 100644 (file)
index b2a49ac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vcombine_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines64.c b/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
deleted file mode 100644 (file)
index 292a892..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x2_t = vcombine_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines8.c b/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
deleted file mode 100644 (file)
index b3bf943..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x16_t = vcombine_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
deleted file mode 100644 (file)
index 053944b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x8_t = vcombine_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
deleted file mode 100644 (file)
index 18aa30c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x4_t = vcombine_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
deleted file mode 100644 (file)
index 8e4881c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x2_t = vcombine_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
deleted file mode 100644 (file)
index 9d4989c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x16_t = vcombine_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c b/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
deleted file mode 100644 (file)
index f921357..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreatef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_float32x2_t = vcreate_f32 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
deleted file mode 100644 (file)
index 4e1363b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreatep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint64_t arg0_uint64_t;
-
-  out_poly16x4_t = vcreate_p16 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
deleted file mode 100644 (file)
index 0ad84d4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vcreatep64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_poly64x1_t = vcreate_p64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
deleted file mode 100644 (file)
index 79b70f0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreatep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint64_t arg0_uint64_t;
-
-  out_poly8x8_t = vcreate_p8 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates16.c b/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
deleted file mode 100644 (file)
index c9f652e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates16 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint64_t arg0_uint64_t;
-
-  out_int16x4_t = vcreate_s16 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates32.c b/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
deleted file mode 100644 (file)
index fd21c4d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates32 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_int32x2_t = vcreate_s32 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates64.c b/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
deleted file mode 100644 (file)
index d5e8187..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates64 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_int64x1_t = vcreate_s64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates8.c b/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
deleted file mode 100644 (file)
index 79280e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates8 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint64_t arg0_uint64_t;
-
-  out_int8x8_t = vcreate_s8 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
deleted file mode 100644 (file)
index a36258d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint16x4_t = vcreate_u16 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
deleted file mode 100644 (file)
index 94d8252..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint32x2_t = vcreate_u32 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
deleted file mode 100644 (file)
index dc3e151..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x1_t = vcreate_u64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
deleted file mode 100644 (file)
index 397fddd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint8x8_t = vcreate_u8 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
deleted file mode 100644 (file)
index 4bb0b65..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_nf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_nf32_s32 (void)
-{
-  float32x4_t out_float32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_float32x4_t = vcvtq_n_f32_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
deleted file mode 100644 (file)
index 6e24051..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_nf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_nf32_u32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_float32x4_t = vcvtq_n_f32_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
deleted file mode 100644 (file)
index 5f906ae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_ns32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_ns32_f32 (void)
-{
-  int32x4_t out_int32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int32x4_t = vcvtq_n_s32_f32 (arg0_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
deleted file mode 100644 (file)
index 29f2c5e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_nu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_nu32_f32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint32x4_t = vcvtq_n_u32_f32 (arg0_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
deleted file mode 100644 (file)
index de3d1b8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQf32_s32 (void)
-{
-  float32x4_t out_float32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_float32x4_t = vcvtq_f32_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
deleted file mode 100644 (file)
index 64b462d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQf32_u32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_float32x4_t = vcvtq_f32_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
deleted file mode 100644 (file)
index 97cb7e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQs32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQs32_f32 (void)
-{
-  int32x4_t out_int32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int32x4_t = vcvtq_s32_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
deleted file mode 100644 (file)
index c7aa7a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQu32_f32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint32x4_t = vcvtq_u32_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
deleted file mode 100644 (file)
index f86b4de..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_nf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_nf32_s32 (void)
-{
-  float32x2_t out_float32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_float32x2_t = vcvt_n_f32_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
deleted file mode 100644 (file)
index fa3bf17..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_nf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_nf32_u32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_float32x2_t = vcvt_n_f32_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
deleted file mode 100644 (file)
index de253e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_ns32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_ns32_f32 (void)
-{
-  int32x2_t out_int32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int32x2_t = vcvt_n_s32_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
deleted file mode 100644 (file)
index 23bdbdf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_nu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_nu32_f32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint32x2_t = vcvt_n_u32_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c
deleted file mode 100644 (file)
index 45b3a72..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon_fp16 } */
-
-#include "arm_neon.h"
-
-void test_vcvtf16_f32 (void)
-{
-  float16x4_t out_float16x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float16x4_t = vcvt_f16_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f16.f32\[        \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c
deleted file mode 100644 (file)
index 6bade54..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf32_f16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon_fp16 } */
-
-#include "arm_neon.h"
-
-void test_vcvtf32_f16 (void)
-{
-  float32x4_t out_float32x4_t;
-  float16x4_t arg0_float16x4_t;
-
-  out_float32x4_t = vcvt_f32_f16 (arg0_float16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.f16\[        \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
deleted file mode 100644 (file)
index 2871523..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtf32_s32 (void)
-{
-  float32x2_t out_float32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_float32x2_t = vcvt_f32_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
deleted file mode 100644 (file)
index 1680271..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtf32_u32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_float32x2_t = vcvt_f32_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
deleted file mode 100644 (file)
index f3b4912..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvts32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvts32_f32 (void)
-{
-  int32x2_t out_int32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int32x2_t = vcvt_s32_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
deleted file mode 100644 (file)
index c60cd06..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtu32_f32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint32x2_t = vcvt_u32_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
deleted file mode 100644 (file)
index 2b2c7f0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x4_t = vdupq_lane_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
deleted file mode 100644 (file)
index 8b73edb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x8_t = vdupq_lane_p16 (arg0_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
deleted file mode 100644 (file)
index 8518168..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanep64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly64x2_t = vdupq_lane_p64 (arg0_poly64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
deleted file mode 100644 (file)
index 6c03564..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x16_t = vdupq_lane_p8 (arg0_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
deleted file mode 100644 (file)
index 54c278c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x8_t = vdupq_lane_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
deleted file mode 100644 (file)
index eb6b05b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x4_t = vdupq_lane_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
deleted file mode 100644 (file)
index 99551d4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x2_t = vdupq_lane_s64 (arg0_int64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
deleted file mode 100644 (file)
index 5840142..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x16_t = vdupq_lane_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
deleted file mode 100644 (file)
index 6bc5e3a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x8_t = vdupq_lane_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
deleted file mode 100644 (file)
index f8cdeb2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x4_t = vdupq_lane_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
deleted file mode 100644 (file)
index 2f39703..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x2_t = vdupq_lane_u64 (arg0_uint64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
deleted file mode 100644 (file)
index e581efa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x16_t = vdupq_lane_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
deleted file mode 100644 (file)
index c817c61..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32_t arg0_float32_t;
-
-  out_float32x4_t = vdupq_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
deleted file mode 100644 (file)
index 57f8c2e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x8_t = vdupq_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
deleted file mode 100644 (file)
index 1f8527c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_np64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64_t arg0_poly64_t;
-
-  out_poly64x2_t = vdupq_n_p64 (arg0_poly64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
deleted file mode 100644 (file)
index 4b67c62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x16_t = vdupq_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
deleted file mode 100644 (file)
index 2e30bc3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16_t arg0_int16_t;
-
-  out_int16x8_t = vdupq_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
deleted file mode 100644 (file)
index 9b6a004..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32_t arg0_int32_t;
-
-  out_int32x4_t = vdupq_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
deleted file mode 100644 (file)
index 221c85f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64_t arg0_int64_t;
-
-  out_int64x2_t = vdupq_n_s64 (arg0_int64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
deleted file mode 100644 (file)
index 931300c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8_t arg0_int8_t;
-
-  out_int8x16_t = vdupq_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
deleted file mode 100644 (file)
index f70a188..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x8_t = vdupq_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
deleted file mode 100644 (file)
index 312efd8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x4_t = vdupq_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
deleted file mode 100644 (file)
index 0bf62cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
deleted file mode 100644 (file)
index 3493dcb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x16_t = vdupq_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
deleted file mode 100644 (file)
index 3fd980a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vdup_lane_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
deleted file mode 100644 (file)
index 7f6d4aa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x4_t = vdup_lane_p16 (arg0_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
deleted file mode 100644 (file)
index f0d46d0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanep64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly64x1_t = vdup_lane_p64 (arg0_poly64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
deleted file mode 100644 (file)
index a1396d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vdup_lane_p8 (arg0_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
deleted file mode 100644 (file)
index deb0160..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vdup_lane_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
deleted file mode 100644 (file)
index e0b2d07..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vdup_lane_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
deleted file mode 100644 (file)
index 9bec51a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vdup_lane_s64 (arg0_int64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
deleted file mode 100644 (file)
index a442fd2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vdup_lane_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
deleted file mode 100644 (file)
index d9b5fd9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vdup_lane_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
deleted file mode 100644 (file)
index db14a1c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vdup_lane_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
deleted file mode 100644 (file)
index 6a65eb0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vdup_lane_u64 (arg0_uint64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
deleted file mode 100644 (file)
index 99fb193..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vdup_lane_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
deleted file mode 100644 (file)
index 448894b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32_t arg0_float32_t;
-
-  out_float32x2_t = vdup_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
deleted file mode 100644 (file)
index 9b56707..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x4_t = vdup_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
deleted file mode 100644 (file)
index 25552dc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdup_np64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64_t arg0_poly64_t;
-
-  out_poly64x1_t = vdup_n_p64 (arg0_poly64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
deleted file mode 100644 (file)
index ad8a0a6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x8_t = vdup_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
deleted file mode 100644 (file)
index c3cc4d0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16_t arg0_int16_t;
-
-  out_int16x4_t = vdup_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
deleted file mode 100644 (file)
index ddfeaec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32_t arg0_int32_t;
-
-  out_int32x2_t = vdup_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
deleted file mode 100644 (file)
index 3056088..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64_t arg0_int64_t;
-
-  out_int64x1_t = vdup_n_s64 (arg0_int64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
deleted file mode 100644 (file)
index 38017a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8_t arg0_int8_t;
-
-  out_int8x8_t = vdup_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
deleted file mode 100644 (file)
index 6150b61..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x4_t = vdup_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
deleted file mode 100644 (file)
index 404c8b0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x2_t = vdup_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
deleted file mode 100644 (file)
index c89072d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x1_t = vdup_n_u64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
deleted file mode 100644 (file)
index 09db0eb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x8_t = vdup_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c b/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c
deleted file mode 100644 (file)
index 816f68d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -mvectorize-with-neon-double" } */
-/* { dg-add-options arm_neon } */
-
-#define N 32
-
-int ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
-float fa[N];
-int ia[N];
-
-int convert()
-{
-  int i;
-
-  /* int -> float */
-  for (i = 0; i < N; i++)
-    fa[i] = (float) ib[i];
-
-  /* float -> int */
-  for (i = 0; i < N; i++)
-    ia[i] = (int) fa[i];
-
-  return 0;
-}
-
-/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c b/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c
deleted file mode 100644 (file)
index 47e278a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */
-/* { dg-add-options arm_neon } */
-
-#define N 32
-
-int ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
-float fa[N];
-int ia[N];
-
-int convert()
-{
-  int i;
-
-  /* int -> float */
-  for (i = 0; i < N; i++)
-    fa[i] = (float) ib[i];
-
-  /* float -> int */
-  for (i = 0; i < N; i++)
-    ia[i] = (int) fa[i];
-
-  return 0;
-}
-
-/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs16.c b/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
deleted file mode 100644 (file)
index b246900..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = veorq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs32.c b/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
deleted file mode 100644 (file)
index d9cd2f8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = veorq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs64.c b/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
deleted file mode 100644 (file)
index 926b1e4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = veorq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs8.c b/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
deleted file mode 100644 (file)
index 272c6ed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = veorq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu16.c b/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
deleted file mode 100644 (file)
index dcd3921..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = veorq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu32.c b/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
deleted file mode 100644 (file)
index 9b34d9a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = veorq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu64.c b/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
deleted file mode 100644 (file)
index b98db78..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = veorq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu8.c b/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
deleted file mode 100644 (file)
index c985acd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = veorq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veors16.c b/gcc/testsuite/gcc.target/arm/neon/veors16.c
deleted file mode 100644 (file)
index 2b83903..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veors16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = veor_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veors32.c b/gcc/testsuite/gcc.target/arm/neon/veors32.c
deleted file mode 100644 (file)
index 45403b8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veors32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = veor_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veors64.c b/gcc/testsuite/gcc.target/arm/neon/veors64.c
deleted file mode 100644 (file)
index b102c7b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `veors64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/veors8.c b/gcc/testsuite/gcc.target/arm/neon/veors8.c
deleted file mode 100644 (file)
index 0ae7a66..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veors8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = veor_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru16.c b/gcc/testsuite/gcc.target/arm/neon/veoru16.c
deleted file mode 100644 (file)
index f3b4192..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veoru16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = veor_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru32.c b/gcc/testsuite/gcc.target/arm/neon/veoru32.c
deleted file mode 100644 (file)
index 8b6be9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veoru32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = veor_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru64.c b/gcc/testsuite/gcc.target/arm/neon/veoru64.c
deleted file mode 100644 (file)
index 3b865fe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `veoru64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru8.c b/gcc/testsuite/gcc.target/arm/neon/veoru8.c
deleted file mode 100644 (file)
index 3511a77..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veoru8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = veor_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQf32.c b/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
deleted file mode 100644 (file)
index 0b5239d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vextq_f32 (arg0_float32x4_t, arg1_float32x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp16.c b/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
deleted file mode 100644 (file)
index f2e6879..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vextq_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c b/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
deleted file mode 100644 (file)
index 2ae223a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vextQp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vextq_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp8.c b/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
deleted file mode 100644 (file)
index fbfde39..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vextq_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs16.c b/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
deleted file mode 100644 (file)
index 2b0ae86..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vextq_s16 (arg0_int16x8_t, arg1_int16x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs32.c b/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
deleted file mode 100644 (file)
index cca2053..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vextq_s32 (arg0_int32x4_t, arg1_int32x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs64.c b/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
deleted file mode 100644 (file)
index a489638..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vextq_s64 (arg0_int64x2_t, arg1_int64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs8.c b/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
deleted file mode 100644 (file)
index 0e3b8a2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vextq_s8 (arg0_int8x16_t, arg1_int8x16_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu16.c b/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
deleted file mode 100644 (file)
index c21c482..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vextq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu32.c b/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
deleted file mode 100644 (file)
index a19950d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vextq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu64.c b/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
deleted file mode 100644 (file)
index d52e37f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vextq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu8.c b/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
deleted file mode 100644 (file)
index 49e4de6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vextq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextf32.c b/gcc/testsuite/gcc.target/arm/neon/vextf32.c
deleted file mode 100644 (file)
index 012dd48..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vext_f32 (arg0_float32x2_t, arg1_float32x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp16.c b/gcc/testsuite/gcc.target/arm/neon/vextp16.c
deleted file mode 100644 (file)
index 94f601a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vext_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp64.c b/gcc/testsuite/gcc.target/arm/neon/vextp64.c
deleted file mode 100644 (file)
index abf5c0c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextp64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vextp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vext_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp8.c b/gcc/testsuite/gcc.target/arm/neon/vextp8.c
deleted file mode 100644 (file)
index 58728cf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vext_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts16.c b/gcc/testsuite/gcc.target/arm/neon/vexts16.c
deleted file mode 100644 (file)
index 032055e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vext_s16 (arg0_int16x4_t, arg1_int16x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts32.c b/gcc/testsuite/gcc.target/arm/neon/vexts32.c
deleted file mode 100644 (file)
index a3c7dce..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vext_s32 (arg0_int32x2_t, arg1_int32x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts64.c b/gcc/testsuite/gcc.target/arm/neon/vexts64.c
deleted file mode 100644 (file)
index 534c8b8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vext_s64 (arg0_int64x1_t, arg1_int64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts8.c b/gcc/testsuite/gcc.target/arm/neon/vexts8.c
deleted file mode 100644 (file)
index 7c5dafd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vext_s8 (arg0_int8x8_t, arg1_int8x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu16.c b/gcc/testsuite/gcc.target/arm/neon/vextu16.c
deleted file mode 100644 (file)
index 2b8e44c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vext_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu32.c b/gcc/testsuite/gcc.target/arm/neon/vextu32.c
deleted file mode 100644 (file)
index fad2ee0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vext_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu64.c b/gcc/testsuite/gcc.target/arm/neon/vextu64.c
deleted file mode 100644 (file)
index 7313c26..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vext_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu8.c b/gcc/testsuite/gcc.target/arm/neon/vextu8.c
deleted file mode 100644 (file)
index caab02b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vext_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c
deleted file mode 100644 (file)
index 30b4c99..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmaQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmaQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vfmaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vfma\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c
deleted file mode 100644 (file)
index 8c55a0b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmaf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmaf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vfma_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vfma\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c
deleted file mode 100644 (file)
index 37a0c64..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vfmsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vfms\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c
deleted file mode 100644 (file)
index d66e51c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vfms_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vfms\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c b/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
deleted file mode 100644 (file)
index 51a7f9a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/* Check that NEON vector shifts support immediate values == size.  /*
-
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps" } */
-/* { dg-add-options arm_neon } */
-
-#include <arm_neon.h>
-
-uint16x8_t test_vshll_n_u8 (uint8x8_t a)
-{
-    return vshll_n_u8(a, 8);
-}
-
-uint32x4_t test_vshll_n_u16 (uint16x4_t a)
-{   
-    return vshll_n_u16(a, 16);
-}
-
-uint64x2_t test_vshll_n_u32 (uint32x2_t a)
-{
-    return vshll_n_u32(a, 32);
-}
-
-/* { dg-final { scan-assembler "vshll\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vshll\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vshll\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
deleted file mode 100644 (file)
index 2ff33ee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanef32 (void)
-{
-  float32_t out_float32_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32_t = vgetq_lane_f32 (arg0_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
deleted file mode 100644 (file)
index 1245a3e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanep16 (void)
-{
-  poly16_t out_poly16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16_t = vgetq_lane_p16 (arg0_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[    \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
deleted file mode 100644 (file)
index 900b3b9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanep8 (void)
-{
-  poly8_t out_poly8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8_t = vgetq_lane_p8 (arg0_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
deleted file mode 100644 (file)
index f2cbd8d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes16 (void)
-{
-  int16_t out_int16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16_t = vgetq_lane_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s16\[    \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
deleted file mode 100644 (file)
index 25c6a52..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes32 (void)
-{
-  int32_t out_int32_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32_t = vgetq_lane_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
deleted file mode 100644 (file)
index ef815cf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes64 (void)
-{
-  register int64_t out_int64_t asm ("r0");
-  int64x2_t arg0_int64x2_t;
-
-  out_int64_t = vgetq_lane_s64 (arg0_int64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[     \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
deleted file mode 100644 (file)
index c4a7659..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes8 (void)
-{
-  int8_t out_int8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8_t = vgetq_lane_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s8\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
deleted file mode 100644 (file)
index cb10ca1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu16 (void)
-{
-  uint16_t out_uint16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16_t = vgetq_lane_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[    \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
deleted file mode 100644 (file)
index a6c4ca6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu32 (void)
-{
-  uint32_t out_uint32_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32_t = vgetq_lane_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
deleted file mode 100644 (file)
index 0f02e51..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu64 (void)
-{
-  register uint64_t out_uint64_t asm ("r0");
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64_t = vgetq_lane_u64 (arg0_uint64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[     \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
deleted file mode 100644 (file)
index 0bc72e5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu8 (void)
-{
-  uint8_t out_uint8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8_t = vgetq_lane_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
deleted file mode 100644 (file)
index cc7382c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x2_t = vget_high_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
deleted file mode 100644 (file)
index 6bb2a6c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x4_t = vget_high_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
deleted file mode 100644 (file)
index c69abdc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vget_highp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly64x1_t = vget_high_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
deleted file mode 100644 (file)
index 75cfbd4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x8_t = vget_high_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
deleted file mode 100644 (file)
index e655eb6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x4_t = vget_high_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
deleted file mode 100644 (file)
index c8c2661..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x2_t = vget_high_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
deleted file mode 100644 (file)
index f2d11c3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x1_t = vget_high_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
deleted file mode 100644 (file)
index ecff213..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x8_t = vget_high_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
deleted file mode 100644 (file)
index 1a7f002..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x4_t = vget_high_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
deleted file mode 100644 (file)
index 4899be4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x2_t = vget_high_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
deleted file mode 100644 (file)
index 3ff2a2b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x1_t = vget_high_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
deleted file mode 100644 (file)
index 132ccca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x8_t = vget_high_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
deleted file mode 100644 (file)
index 300e85c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanef32 (void)
-{
-  float32_t out_float32_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32_t = vget_lane_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
deleted file mode 100644 (file)
index 5d9f80b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanep16 (void)
-{
-  poly16_t out_poly16_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16_t = vget_lane_p16 (arg0_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[    \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
deleted file mode 100644 (file)
index a172bd2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanep8 (void)
-{
-  poly8_t out_poly8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8_t = vget_lane_p8 (arg0_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
deleted file mode 100644 (file)
index f8a9b02..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes16 (void)
-{
-  int16_t out_int16_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16_t = vget_lane_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s16\[    \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
deleted file mode 100644 (file)
index 3cea0bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes32 (void)
-{
-  int32_t out_int32_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32_t = vget_lane_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
deleted file mode 100644 (file)
index f360fe3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes64 (void)
-{
-  int64_t out_int64_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
deleted file mode 100644 (file)
index 064c9cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes8 (void)
-{
-  int8_t out_int8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8_t = vget_lane_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s8\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
deleted file mode 100644 (file)
index 756b589..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu16 (void)
-{
-  uint16_t out_uint16_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16_t = vget_lane_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[    \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
deleted file mode 100644 (file)
index 3f59e6a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu32 (void)
-{
-  uint32_t out_uint32_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32_t = vget_lane_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
deleted file mode 100644 (file)
index 75cef5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu64 (void)
-{
-  uint64_t out_uint64_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
deleted file mode 100644 (file)
index bb461a6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu8 (void)
-{
-  uint8_t out_uint8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8_t = vget_lane_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[     \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
deleted file mode 100644 (file)
index 970ef76..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowf32 (void)
-{
-  register float32x2_t out_float32x2_t asm ("d18");
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x2_t = vget_low_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
deleted file mode 100644 (file)
index ab42125..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowp16 (void)
-{
-  register poly16x4_t out_poly16x4_t asm ("d18");
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x4_t = vget_low_p16 (arg0_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
deleted file mode 100644 (file)
index 378310f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lowp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vget_lowp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly64x1_t = vget_low_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
deleted file mode 100644 (file)
index 462ce05..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowp8 (void)
-{
-  register poly8x8_t out_poly8x8_t asm ("d18");
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x8_t = vget_low_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
deleted file mode 100644 (file)
index 3ee2cf7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lows16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows16 (void)
-{
-  register int16x4_t out_int16x4_t asm ("d18");
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x4_t = vget_low_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
deleted file mode 100644 (file)
index 27d8e72..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lows32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows32 (void)
-{
-  register int32x2_t out_int32x2_t asm ("d18");
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x2_t = vget_low_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
deleted file mode 100644 (file)
index 6b32548..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lows64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x1_t = vget_low_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
deleted file mode 100644 (file)
index 077ffd7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lows8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows8 (void)
-{
-  register int8x8_t out_int8x8_t asm ("d18");
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x8_t = vget_low_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
deleted file mode 100644 (file)
index df93c32..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu16 (void)
-{
-  register uint16x4_t out_uint16x4_t asm ("d18");
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x4_t = vget_low_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
deleted file mode 100644 (file)
index 3fdd5b4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu32 (void)
-{
-  register uint32x2_t out_uint32x2_t asm ("d18");
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x2_t = vget_low_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
deleted file mode 100644 (file)
index 0732d7c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lowu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x1_t = vget_low_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
deleted file mode 100644 (file)
index 0f59277..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu8 (void)
-{
-  register uint8x8_t out_uint8x8_t asm ("d18");
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x8_t = vget_low_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
deleted file mode 100644 (file)
index bcd6a22..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
deleted file mode 100644 (file)
index 1f8128a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
deleted file mode 100644 (file)
index e7dd131..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
deleted file mode 100644 (file)
index f01237f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
deleted file mode 100644 (file)
index 65d2b8e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
deleted file mode 100644 (file)
index 3fd5143..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds16.c b/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
deleted file mode 100644 (file)
index a36a6ba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vhadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds32.c b/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
deleted file mode 100644 (file)
index 20876ec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vhadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds8.c b/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
deleted file mode 100644 (file)
index 53fcd9c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vhadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
deleted file mode 100644 (file)
index 3d18e9a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
deleted file mode 100644 (file)
index e0b64d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
deleted file mode 100644 (file)
index 9212d5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
deleted file mode 100644 (file)
index 71e9afd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vhsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
deleted file mode 100644 (file)
index f26f7ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vhsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
deleted file mode 100644 (file)
index b2a5515..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vhsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
deleted file mode 100644 (file)
index 2d822cf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vhsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
deleted file mode 100644 (file)
index 0ff6d4c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vhsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
deleted file mode 100644 (file)
index 520d337..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vhsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
deleted file mode 100644 (file)
index 72c9816..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vhsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
deleted file mode 100644 (file)
index 0e6fdc0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vhsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
deleted file mode 100644 (file)
index 7b3220b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vhsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
deleted file mode 100644 (file)
index 15beda2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vhsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
deleted file mode 100644 (file)
index a4201ea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vhsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
deleted file mode 100644 (file)
index 92dbeab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vhsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
deleted file mode 100644 (file)
index 58c33d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupf32 (void)
-{
-  float32x4_t out_float32x4_t;
-
-  out_float32x4_t = vld1q_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
deleted file mode 100644 (file)
index 66c72ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-
-  out_poly16x8_t = vld1q_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
deleted file mode 100644 (file)
index 8c5b28e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-
-  out_poly64x2_t = vld1q_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
deleted file mode 100644 (file)
index 90a3388..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-
-  out_poly8x16_t = vld1q_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
deleted file mode 100644 (file)
index d4cfada..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups16 (void)
-{
-  int16x8_t out_int16x8_t;
-
-  out_int16x8_t = vld1q_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
deleted file mode 100644 (file)
index 2d16b12..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups32 (void)
-{
-  int32x4_t out_int32x4_t;
-
-  out_int32x4_t = vld1q_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
deleted file mode 100644 (file)
index 41974a6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups64 (void)
-{
-  int64x2_t out_int64x2_t;
-
-  out_int64x2_t = vld1q_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
deleted file mode 100644 (file)
index 99475fc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups8 (void)
-{
-  int8x16_t out_int8x16_t;
-
-  out_int8x16_t = vld1q_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
deleted file mode 100644 (file)
index 5840189..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-
-  out_uint16x8_t = vld1q_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
deleted file mode 100644 (file)
index 31981ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-
-  out_uint32x4_t = vld1q_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
deleted file mode 100644 (file)
index 5cfa03a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-
-  out_uint64x2_t = vld1q_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
deleted file mode 100644 (file)
index 240ad56..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-
-  out_uint8x16_t = vld1q_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
deleted file mode 100644 (file)
index da17545..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
deleted file mode 100644 (file)
index 546e5e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
deleted file mode 100644 (file)
index 18a28f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanep64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vld1q_lane_p64 (0, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
deleted file mode 100644 (file)
index 290a115..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
deleted file mode 100644 (file)
index 06c4b9d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
deleted file mode 100644 (file)
index 58433ea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
deleted file mode 100644 (file)
index bfe0dd9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
deleted file mode 100644 (file)
index ee7026d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
deleted file mode 100644 (file)
index 0361b4f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
deleted file mode 100644 (file)
index 6317455..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
deleted file mode 100644 (file)
index 918e0df..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
deleted file mode 100644 (file)
index e96ad29..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
deleted file mode 100644 (file)
index 2a5fec1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qf32 (void)
-{
-  float32x4_t out_float32x4_t;
-
-  out_float32x4_t = vld1q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
deleted file mode 100644 (file)
index 1b0deee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-
-  out_poly16x8_t = vld1q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
deleted file mode 100644 (file)
index cd43706..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1Qp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-
-  out_poly64x2_t = vld1q_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
deleted file mode 100644 (file)
index 24a186b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-
-  out_poly8x16_t = vld1q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
deleted file mode 100644 (file)
index b146b78..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs16 (void)
-{
-  int16x8_t out_int16x8_t;
-
-  out_int16x8_t = vld1q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
deleted file mode 100644 (file)
index d1d0386..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs32 (void)
-{
-  int32x4_t out_int32x4_t;
-
-  out_int32x4_t = vld1q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
deleted file mode 100644 (file)
index be53cf3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs64 (void)
-{
-  int64x2_t out_int64x2_t;
-
-  out_int64x2_t = vld1q_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
deleted file mode 100644 (file)
index 58b97a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-
-  out_int8x16_t = vld1q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
deleted file mode 100644 (file)
index 5c299f8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-
-  out_uint16x8_t = vld1q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
deleted file mode 100644 (file)
index 6b4d0b0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-
-  out_uint32x4_t = vld1q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
deleted file mode 100644 (file)
index 018bac7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-
-  out_uint64x2_t = vld1q_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
deleted file mode 100644 (file)
index 06726db..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-
-  out_uint8x16_t = vld1q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
deleted file mode 100644 (file)
index 699d77b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupf32 (void)
-{
-  float32x2_t out_float32x2_t;
-
-  out_float32x2_t = vld1_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
deleted file mode 100644 (file)
index baee8e0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-
-  out_poly16x4_t = vld1_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
deleted file mode 100644 (file)
index fa40f84..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-
-  out_poly64x1_t = vld1_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
deleted file mode 100644 (file)
index adde412..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-
-  out_poly8x8_t = vld1_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
deleted file mode 100644 (file)
index f7c3447..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups16 (void)
-{
-  int16x4_t out_int16x4_t;
-
-  out_int16x4_t = vld1_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
deleted file mode 100644 (file)
index 4039804..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups32 (void)
-{
-  int32x2_t out_int32x2_t;
-
-  out_int32x2_t = vld1_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
deleted file mode 100644 (file)
index 6784123..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups64 (void)
-{
-  int64x1_t out_int64x1_t;
-
-  out_int64x1_t = vld1_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
deleted file mode 100644 (file)
index d6a3a8b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups8 (void)
-{
-  int8x8_t out_int8x8_t;
-
-  out_int8x8_t = vld1_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
deleted file mode 100644 (file)
index 2cd76b7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-
-  out_uint16x4_t = vld1_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
deleted file mode 100644 (file)
index 85e5122..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-
-  out_uint32x2_t = vld1_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
deleted file mode 100644 (file)
index 7ccb05f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-
-  out_uint64x1_t = vld1_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
deleted file mode 100644 (file)
index 8f6734a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-
-  out_uint8x8_t = vld1_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
deleted file mode 100644 (file)
index 809866b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
deleted file mode 100644 (file)
index 5cc3b75..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
deleted file mode 100644 (file)
index 874b5d0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanep64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vld1_lane_p64 (0, arg1_poly64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
deleted file mode 100644 (file)
index 3349ed0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
deleted file mode 100644 (file)
index fbb4c91..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
deleted file mode 100644 (file)
index c623f3a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
deleted file mode 100644 (file)
index a26cc2e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
deleted file mode 100644 (file)
index f5b3ae2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
deleted file mode 100644 (file)
index cf97ef5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
deleted file mode 100644 (file)
index e5f19ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
deleted file mode 100644 (file)
index 64e353e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
deleted file mode 100644 (file)
index d938596..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
deleted file mode 100644 (file)
index acca854..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1f32 (void)
-{
-  float32x2_t out_float32x2_t;
-
-  out_float32x2_t = vld1_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
deleted file mode 100644 (file)
index 59b8dc5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1p16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-
-  out_poly16x4_t = vld1_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c b/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
deleted file mode 100644 (file)
index 8322dd0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1p64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-
-  out_poly64x1_t = vld1_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
deleted file mode 100644 (file)
index 96fda65..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-
-  out_poly8x8_t = vld1_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
deleted file mode 100644 (file)
index d95113e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s16 (void)
-{
-  int16x4_t out_int16x4_t;
-
-  out_int16x4_t = vld1_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
deleted file mode 100644 (file)
index 6ed2a96..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s32 (void)
-{
-  int32x2_t out_int32x2_t;
-
-  out_int32x2_t = vld1_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
deleted file mode 100644 (file)
index 03c6cf0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s64 (void)
-{
-  int64x1_t out_int64x1_t;
-
-  out_int64x1_t = vld1_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
deleted file mode 100644 (file)
index b3bdbba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s8 (void)
-{
-  int8x8_t out_int8x8_t;
-
-  out_int8x8_t = vld1_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
deleted file mode 100644 (file)
index 7ec9828..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-
-  out_uint16x4_t = vld1_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
deleted file mode 100644 (file)
index 8039822..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-
-  out_uint32x2_t = vld1_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
deleted file mode 100644 (file)
index f4e4cc9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-
-  out_uint64x1_t = vld1_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
deleted file mode 100644 (file)
index 3133ddb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-
-  out_uint8x8_t = vld1_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
deleted file mode 100644 (file)
index 0cccd0f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanef32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4x2_t arg1_float32x4x2_t;
-
-  out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
deleted file mode 100644 (file)
index 2187a7f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanep16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8x2_t arg1_poly16x8x2_t;
-
-  out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
deleted file mode 100644 (file)
index 1872088..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanes16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8x2_t arg1_int16x8x2_t;
-
-  out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
deleted file mode 100644 (file)
index 953b518..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanes32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4x2_t arg1_int32x4x2_t;
-
-  out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
deleted file mode 100644 (file)
index 6f0f45f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_laneu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8x2_t arg1_uint16x8x2_t;
-
-  out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
deleted file mode 100644 (file)
index 3f65654..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_laneu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4x2_t arg1_uint32x4x2_t;
-
-  out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
deleted file mode 100644 (file)
index a112ea2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-
-  out_float32x4x2_t = vld2q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
deleted file mode 100644 (file)
index bb75b7e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-
-  out_poly16x8x2_t = vld2q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
deleted file mode 100644 (file)
index 5f4307d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-
-  out_poly8x16x2_t = vld2q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
deleted file mode 100644 (file)
index 2b53903..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-
-  out_int16x8x2_t = vld2q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
deleted file mode 100644 (file)
index 53bc98b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-
-  out_int32x4x2_t = vld2q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
deleted file mode 100644 (file)
index d056fb0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-
-  out_int8x16x2_t = vld2q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
deleted file mode 100644 (file)
index 1a69ee5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-
-  out_uint16x8x2_t = vld2q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
deleted file mode 100644 (file)
index 45fe749..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-
-  out_uint32x4x2_t = vld2q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
deleted file mode 100644 (file)
index 99c935f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-
-  out_uint8x16x2_t = vld2q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
deleted file mode 100644 (file)
index e33dad9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-
-  out_float32x2x2_t = vld2_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
deleted file mode 100644 (file)
index 2b9cf43..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-
-  out_poly16x4x2_t = vld2_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
deleted file mode 100644 (file)
index acebb9b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupp64 (void)
-{
-  poly64x1x2_t out_poly64x1x2_t;
-
-  out_poly64x1x2_t = vld2_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
deleted file mode 100644 (file)
index 00cfd9f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-
-  out_poly8x8x2_t = vld2_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
deleted file mode 100644 (file)
index 9db5388..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-
-  out_int16x4x2_t = vld2_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
deleted file mode 100644 (file)
index 80f186d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-
-  out_int32x2x2_t = vld2_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
deleted file mode 100644 (file)
index d6b06ac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups64 (void)
-{
-  int64x1x2_t out_int64x1x2_t;
-
-  out_int64x1x2_t = vld2_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
deleted file mode 100644 (file)
index 5062928..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-
-  out_int8x8x2_t = vld2_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
deleted file mode 100644 (file)
index 9380195..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-
-  out_uint16x4x2_t = vld2_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
deleted file mode 100644 (file)
index d469691..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-
-  out_uint32x2x2_t = vld2_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
deleted file mode 100644 (file)
index bb92ec7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu64 (void)
-{
-  uint64x1x2_t out_uint64x1x2_t;
-
-  out_uint64x1x2_t = vld2_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
deleted file mode 100644 (file)
index 72dc31b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-
-  out_uint8x8x2_t = vld2_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
deleted file mode 100644 (file)
index 7379d3b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanef32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2x2_t arg1_float32x2x2_t;
-
-  out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
deleted file mode 100644 (file)
index 186a1c5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanep16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4x2_t arg1_poly16x4x2_t;
-
-  out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
deleted file mode 100644 (file)
index 3a8201d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanep8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-
-  out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
deleted file mode 100644 (file)
index 0881359..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanes16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4x2_t arg1_int16x4x2_t;
-
-  out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
deleted file mode 100644 (file)
index 8ad919c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanes32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2x2_t arg1_int32x2x2_t;
-
-  out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
deleted file mode 100644 (file)
index d4a6307..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanes8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8x2_t arg1_int8x8x2_t;
-
-  out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
deleted file mode 100644 (file)
index f0c7fa0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_laneu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4x2_t arg1_uint16x4x2_t;
-
-  out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
deleted file mode 100644 (file)
index f61fb51..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_laneu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2x2_t arg1_uint32x2x2_t;
-
-  out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
deleted file mode 100644 (file)
index 8def913..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_laneu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-
-  out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
deleted file mode 100644 (file)
index db3ff7a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2f32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-
-  out_float32x2x2_t = vld2_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
deleted file mode 100644 (file)
index 7181dbf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2p16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-
-  out_poly16x4x2_t = vld2_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c b/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
deleted file mode 100644 (file)
index e92c414..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld2p64 (void)
-{
-  poly64x1x2_t out_poly64x1x2_t;
-
-  out_poly64x1x2_t = vld2_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
deleted file mode 100644 (file)
index 9e97b59..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2p8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-
-  out_poly8x8x2_t = vld2_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
deleted file mode 100644 (file)
index 268b62b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-
-  out_int16x4x2_t = vld2_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
deleted file mode 100644 (file)
index c65d931..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-
-  out_int32x2x2_t = vld2_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
deleted file mode 100644 (file)
index 136df05..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s64 (void)
-{
-  int64x1x2_t out_int64x1x2_t;
-
-  out_int64x1x2_t = vld2_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
deleted file mode 100644 (file)
index c812b19..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-
-  out_int8x8x2_t = vld2_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
deleted file mode 100644 (file)
index a089a6c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-
-  out_uint16x4x2_t = vld2_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
deleted file mode 100644 (file)
index 5d5875e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-
-  out_uint32x2x2_t = vld2_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
deleted file mode 100644 (file)
index 6124db8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u64 (void)
-{
-  uint64x1x2_t out_uint64x1x2_t;
-
-  out_uint64x1x2_t = vld2_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
deleted file mode 100644 (file)
index fb62755..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-
-  out_uint8x8x2_t = vld2_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
deleted file mode 100644 (file)
index 0b36c4e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanef32 (void)
-{
-  float32x4x3_t out_float32x4x3_t;
-  float32x4x3_t arg1_float32x4x3_t;
-
-  out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
deleted file mode 100644 (file)
index 88123f5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanep16 (void)
-{
-  poly16x8x3_t out_poly16x8x3_t;
-  poly16x8x3_t arg1_poly16x8x3_t;
-
-  out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
deleted file mode 100644 (file)
index 3349522..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanes16 (void)
-{
-  int16x8x3_t out_int16x8x3_t;
-  int16x8x3_t arg1_int16x8x3_t;
-
-  out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
deleted file mode 100644 (file)
index a669441..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanes32 (void)
-{
-  int32x4x3_t out_int32x4x3_t;
-  int32x4x3_t arg1_int32x4x3_t;
-
-  out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
deleted file mode 100644 (file)
index 68cb436..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_laneu16 (void)
-{
-  uint16x8x3_t out_uint16x8x3_t;
-  uint16x8x3_t arg1_uint16x8x3_t;
-
-  out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
deleted file mode 100644 (file)
index 0392513..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_laneu32 (void)
-{
-  uint32x4x3_t out_uint32x4x3_t;
-  uint32x4x3_t arg1_uint32x4x3_t;
-
-  out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
deleted file mode 100644 (file)
index c45e1b2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qf32 (void)
-{
-  float32x4x3_t out_float32x4x3_t;
-
-  out_float32x4x3_t = vld3q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
deleted file mode 100644 (file)
index 9658954..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qp16 (void)
-{
-  poly16x8x3_t out_poly16x8x3_t;
-
-  out_poly16x8x3_t = vld3q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
deleted file mode 100644 (file)
index bb54693..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qp8 (void)
-{
-  poly8x16x3_t out_poly8x16x3_t;
-
-  out_poly8x16x3_t = vld3q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
deleted file mode 100644 (file)
index 8864f68..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qs16 (void)
-{
-  int16x8x3_t out_int16x8x3_t;
-
-  out_int16x8x3_t = vld3q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
deleted file mode 100644 (file)
index d33e882..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qs32 (void)
-{
-  int32x4x3_t out_int32x4x3_t;
-
-  out_int32x4x3_t = vld3q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
deleted file mode 100644 (file)
index 1df9c83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qs8 (void)
-{
-  int8x16x3_t out_int8x16x3_t;
-
-  out_int8x16x3_t = vld3q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
deleted file mode 100644 (file)
index c6422ed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qu16 (void)
-{
-  uint16x8x3_t out_uint16x8x3_t;
-
-  out_uint16x8x3_t = vld3q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
deleted file mode 100644 (file)
index 0632ef3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qu32 (void)
-{
-  uint32x4x3_t out_uint32x4x3_t;
-
-  out_uint32x4x3_t = vld3q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
deleted file mode 100644 (file)
index d41c469..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qu8 (void)
-{
-  uint8x16x3_t out_uint8x16x3_t;
-
-  out_uint8x16x3_t = vld3q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
deleted file mode 100644 (file)
index 0f0c420..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupf32 (void)
-{
-  float32x2x3_t out_float32x2x3_t;
-
-  out_float32x2x3_t = vld3_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
deleted file mode 100644 (file)
index 9d794da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupp16 (void)
-{
-  poly16x4x3_t out_poly16x4x3_t;
-
-  out_poly16x4x3_t = vld3_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
deleted file mode 100644 (file)
index ab34f1b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupp64 (void)
-{
-  poly64x1x3_t out_poly64x1x3_t;
-
-  out_poly64x1x3_t = vld3_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
deleted file mode 100644 (file)
index 0132d40..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupp8 (void)
-{
-  poly8x8x3_t out_poly8x8x3_t;
-
-  out_poly8x8x3_t = vld3_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
deleted file mode 100644 (file)
index c5ba768..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups16 (void)
-{
-  int16x4x3_t out_int16x4x3_t;
-
-  out_int16x4x3_t = vld3_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
deleted file mode 100644 (file)
index 6d069b5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups32 (void)
-{
-  int32x2x3_t out_int32x2x3_t;
-
-  out_int32x2x3_t = vld3_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
deleted file mode 100644 (file)
index 31267b6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups64 (void)
-{
-  int64x1x3_t out_int64x1x3_t;
-
-  out_int64x1x3_t = vld3_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
deleted file mode 100644 (file)
index c6c0935..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups8 (void)
-{
-  int8x8x3_t out_int8x8x3_t;
-
-  out_int8x8x3_t = vld3_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
deleted file mode 100644 (file)
index ed49e0a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu16 (void)
-{
-  uint16x4x3_t out_uint16x4x3_t;
-
-  out_uint16x4x3_t = vld3_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
deleted file mode 100644 (file)
index 04eb017..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu32 (void)
-{
-  uint32x2x3_t out_uint32x2x3_t;
-
-  out_uint32x2x3_t = vld3_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
deleted file mode 100644 (file)
index 7bb5b62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu64 (void)
-{
-  uint64x1x3_t out_uint64x1x3_t;
-
-  out_uint64x1x3_t = vld3_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
deleted file mode 100644 (file)
index f315786..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu8 (void)
-{
-  uint8x8x3_t out_uint8x8x3_t;
-
-  out_uint8x8x3_t = vld3_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
deleted file mode 100644 (file)
index 4d78353..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanef32 (void)
-{
-  float32x2x3_t out_float32x2x3_t;
-  float32x2x3_t arg1_float32x2x3_t;
-
-  out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
deleted file mode 100644 (file)
index 6a3b87a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanep16 (void)
-{
-  poly16x4x3_t out_poly16x4x3_t;
-  poly16x4x3_t arg1_poly16x4x3_t;
-
-  out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
deleted file mode 100644 (file)
index 41ac97d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanep8 (void)
-{
-  poly8x8x3_t out_poly8x8x3_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-
-  out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
deleted file mode 100644 (file)
index f74ffce..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanes16 (void)
-{
-  int16x4x3_t out_int16x4x3_t;
-  int16x4x3_t arg1_int16x4x3_t;
-
-  out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
deleted file mode 100644 (file)
index bc41477..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanes32 (void)
-{
-  int32x2x3_t out_int32x2x3_t;
-  int32x2x3_t arg1_int32x2x3_t;
-
-  out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
deleted file mode 100644 (file)
index 995db24..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanes8 (void)
-{
-  int8x8x3_t out_int8x8x3_t;
-  int8x8x3_t arg1_int8x8x3_t;
-
-  out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
deleted file mode 100644 (file)
index 63d22ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_laneu16 (void)
-{
-  uint16x4x3_t out_uint16x4x3_t;
-  uint16x4x3_t arg1_uint16x4x3_t;
-
-  out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
deleted file mode 100644 (file)
index 486db6d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_laneu32 (void)
-{
-  uint32x2x3_t out_uint32x2x3_t;
-  uint32x2x3_t arg1_uint32x2x3_t;
-
-  out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
deleted file mode 100644 (file)
index b5ea2fb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_laneu8 (void)
-{
-  uint8x8x3_t out_uint8x8x3_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-
-  out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
deleted file mode 100644 (file)
index 79e1a4a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3f32 (void)
-{
-  float32x2x3_t out_float32x2x3_t;
-
-  out_float32x2x3_t = vld3_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
deleted file mode 100644 (file)
index 5e053a2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3p16 (void)
-{
-  poly16x4x3_t out_poly16x4x3_t;
-
-  out_poly16x4x3_t = vld3_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c b/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
deleted file mode 100644 (file)
index 8fbc95e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld3p64 (void)
-{
-  poly64x1x3_t out_poly64x1x3_t;
-
-  out_poly64x1x3_t = vld3_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
deleted file mode 100644 (file)
index f15b968..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3p8 (void)
-{
-  poly8x8x3_t out_poly8x8x3_t;
-
-  out_poly8x8x3_t = vld3_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
deleted file mode 100644 (file)
index ed5e24d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s16 (void)
-{
-  int16x4x3_t out_int16x4x3_t;
-
-  out_int16x4x3_t = vld3_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
deleted file mode 100644 (file)
index 6ad2b9a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s32 (void)
-{
-  int32x2x3_t out_int32x2x3_t;
-
-  out_int32x2x3_t = vld3_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
deleted file mode 100644 (file)
index 14f8aa1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s64 (void)
-{
-  int64x1x3_t out_int64x1x3_t;
-
-  out_int64x1x3_t = vld3_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
deleted file mode 100644 (file)
index 2192499..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s8 (void)
-{
-  int8x8x3_t out_int8x8x3_t;
-
-  out_int8x8x3_t = vld3_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
deleted file mode 100644 (file)
index 5fd1a01..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u16 (void)
-{
-  uint16x4x3_t out_uint16x4x3_t;
-
-  out_uint16x4x3_t = vld3_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
deleted file mode 100644 (file)
index 4ae8217..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u32 (void)
-{
-  uint32x2x3_t out_uint32x2x3_t;
-
-  out_uint32x2x3_t = vld3_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
deleted file mode 100644 (file)
index c6d7626..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u64 (void)
-{
-  uint64x1x3_t out_uint64x1x3_t;
-
-  out_uint64x1x3_t = vld3_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
deleted file mode 100644 (file)
index e336339..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u8 (void)
-{
-  uint8x8x3_t out_uint8x8x3_t;
-
-  out_uint8x8x3_t = vld3_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
deleted file mode 100644 (file)
index dfac627..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanef32 (void)
-{
-  float32x4x4_t out_float32x4x4_t;
-  float32x4x4_t arg1_float32x4x4_t;
-
-  out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
deleted file mode 100644 (file)
index 6ed339d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanep16 (void)
-{
-  poly16x8x4_t out_poly16x8x4_t;
-  poly16x8x4_t arg1_poly16x8x4_t;
-
-  out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
deleted file mode 100644 (file)
index 3683e7e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanes16 (void)
-{
-  int16x8x4_t out_int16x8x4_t;
-  int16x8x4_t arg1_int16x8x4_t;
-
-  out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
deleted file mode 100644 (file)
index 1d25eb1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanes32 (void)
-{
-  int32x4x4_t out_int32x4x4_t;
-  int32x4x4_t arg1_int32x4x4_t;
-
-  out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
deleted file mode 100644 (file)
index 75848c3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_laneu16 (void)
-{
-  uint16x8x4_t out_uint16x8x4_t;
-  uint16x8x4_t arg1_uint16x8x4_t;
-
-  out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
deleted file mode 100644 (file)
index 9201bdc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_laneu32 (void)
-{
-  uint32x4x4_t out_uint32x4x4_t;
-  uint32x4x4_t arg1_uint32x4x4_t;
-
-  out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
deleted file mode 100644 (file)
index 199c4bb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qf32 (void)
-{
-  float32x4x4_t out_float32x4x4_t;
-
-  out_float32x4x4_t = vld4q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
deleted file mode 100644 (file)
index f6638a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qp16 (void)
-{
-  poly16x8x4_t out_poly16x8x4_t;
-
-  out_poly16x8x4_t = vld4q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
deleted file mode 100644 (file)
index a9a8c52..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qp8 (void)
-{
-  poly8x16x4_t out_poly8x16x4_t;
-
-  out_poly8x16x4_t = vld4q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
deleted file mode 100644 (file)
index 6f7e84d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qs16 (void)
-{
-  int16x8x4_t out_int16x8x4_t;
-
-  out_int16x8x4_t = vld4q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
deleted file mode 100644 (file)
index e71d6fe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qs32 (void)
-{
-  int32x4x4_t out_int32x4x4_t;
-
-  out_int32x4x4_t = vld4q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
deleted file mode 100644 (file)
index 30d4dea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qs8 (void)
-{
-  int8x16x4_t out_int8x16x4_t;
-
-  out_int8x16x4_t = vld4q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
deleted file mode 100644 (file)
index 9d737ba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qu16 (void)
-{
-  uint16x8x4_t out_uint16x8x4_t;
-
-  out_uint16x8x4_t = vld4q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
deleted file mode 100644 (file)
index 7d46e2f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qu32 (void)
-{
-  uint32x4x4_t out_uint32x4x4_t;
-
-  out_uint32x4x4_t = vld4q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
deleted file mode 100644 (file)
index 4484cda..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qu8 (void)
-{
-  uint8x16x4_t out_uint8x16x4_t;
-
-  out_uint8x16x4_t = vld4q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
deleted file mode 100644 (file)
index e59fb12..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupf32 (void)
-{
-  float32x2x4_t out_float32x2x4_t;
-
-  out_float32x2x4_t = vld4_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
deleted file mode 100644 (file)
index 4426298..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupp16 (void)
-{
-  poly16x4x4_t out_poly16x4x4_t;
-
-  out_poly16x4x4_t = vld4_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
deleted file mode 100644 (file)
index da06911..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupp64 (void)
-{
-  poly64x1x4_t out_poly64x1x4_t;
-
-  out_poly64x1x4_t = vld4_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
deleted file mode 100644 (file)
index 936c91e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupp8 (void)
-{
-  poly8x8x4_t out_poly8x8x4_t;
-
-  out_poly8x8x4_t = vld4_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
deleted file mode 100644 (file)
index f7a35e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups16 (void)
-{
-  int16x4x4_t out_int16x4x4_t;
-
-  out_int16x4x4_t = vld4_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
deleted file mode 100644 (file)
index 7ead80c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups32 (void)
-{
-  int32x2x4_t out_int32x2x4_t;
-
-  out_int32x2x4_t = vld4_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
deleted file mode 100644 (file)
index 4420628..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups64 (void)
-{
-  int64x1x4_t out_int64x1x4_t;
-
-  out_int64x1x4_t = vld4_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
deleted file mode 100644 (file)
index 03f3d88..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups8 (void)
-{
-  int8x8x4_t out_int8x8x4_t;
-
-  out_int8x8x4_t = vld4_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
deleted file mode 100644 (file)
index 3d08493..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu16 (void)
-{
-  uint16x4x4_t out_uint16x4x4_t;
-
-  out_uint16x4x4_t = vld4_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
deleted file mode 100644 (file)
index 0f61908..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu32 (void)
-{
-  uint32x2x4_t out_uint32x2x4_t;
-
-  out_uint32x2x4_t = vld4_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
deleted file mode 100644 (file)
index c2f00ff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu64 (void)
-{
-  uint64x1x4_t out_uint64x1x4_t;
-
-  out_uint64x1x4_t = vld4_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
deleted file mode 100644 (file)
index ee4c674..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu8 (void)
-{
-  uint8x8x4_t out_uint8x8x4_t;
-
-  out_uint8x8x4_t = vld4_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
deleted file mode 100644 (file)
index 3f293d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanef32 (void)
-{
-  float32x2x4_t out_float32x2x4_t;
-  float32x2x4_t arg1_float32x2x4_t;
-
-  out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
deleted file mode 100644 (file)
index 94d24af..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanep16 (void)
-{
-  poly16x4x4_t out_poly16x4x4_t;
-  poly16x4x4_t arg1_poly16x4x4_t;
-
-  out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
deleted file mode 100644 (file)
index 1bcb3e1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanep8 (void)
-{
-  poly8x8x4_t out_poly8x8x4_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-
-  out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
deleted file mode 100644 (file)
index fbaeadb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanes16 (void)
-{
-  int16x4x4_t out_int16x4x4_t;
-  int16x4x4_t arg1_int16x4x4_t;
-
-  out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
deleted file mode 100644 (file)
index 7f9cc0c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanes32 (void)
-{
-  int32x2x4_t out_int32x2x4_t;
-  int32x2x4_t arg1_int32x2x4_t;
-
-  out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
deleted file mode 100644 (file)
index 637361c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanes8 (void)
-{
-  int8x8x4_t out_int8x8x4_t;
-  int8x8x4_t arg1_int8x8x4_t;
-
-  out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
deleted file mode 100644 (file)
index a0d98a4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_laneu16 (void)
-{
-  uint16x4x4_t out_uint16x4x4_t;
-  uint16x4x4_t arg1_uint16x4x4_t;
-
-  out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
deleted file mode 100644 (file)
index a691398..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_laneu32 (void)
-{
-  uint32x2x4_t out_uint32x2x4_t;
-  uint32x2x4_t arg1_uint32x2x4_t;
-
-  out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
deleted file mode 100644 (file)
index 48a60b3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_laneu8 (void)
-{
-  uint8x8x4_t out_uint8x8x4_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-
-  out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
deleted file mode 100644 (file)
index c3de78f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4f32 (void)
-{
-  float32x2x4_t out_float32x2x4_t;
-
-  out_float32x2x4_t = vld4_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
deleted file mode 100644 (file)
index 8909bd4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4p16 (void)
-{
-  poly16x4x4_t out_poly16x4x4_t;
-
-  out_poly16x4x4_t = vld4_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c b/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
deleted file mode 100644 (file)
index eda3bc5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld4p64 (void)
-{
-  poly64x1x4_t out_poly64x1x4_t;
-
-  out_poly64x1x4_t = vld4_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
deleted file mode 100644 (file)
index c77b223..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4p8 (void)
-{
-  poly8x8x4_t out_poly8x8x4_t;
-
-  out_poly8x8x4_t = vld4_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
deleted file mode 100644 (file)
index 052a843..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s16 (void)
-{
-  int16x4x4_t out_int16x4x4_t;
-
-  out_int16x4x4_t = vld4_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
deleted file mode 100644 (file)
index ce9bbaa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s32 (void)
-{
-  int32x2x4_t out_int32x2x4_t;
-
-  out_int32x2x4_t = vld4_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
deleted file mode 100644 (file)
index 537ece0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s64 (void)
-{
-  int64x1x4_t out_int64x1x4_t;
-
-  out_int64x1x4_t = vld4_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
deleted file mode 100644 (file)
index c7c33e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s8 (void)
-{
-  int8x8x4_t out_int8x8x4_t;
-
-  out_int8x8x4_t = vld4_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
deleted file mode 100644 (file)
index bb602fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u16 (void)
-{
-  uint16x4x4_t out_uint16x4x4_t;
-
-  out_uint16x4x4_t = vld4_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
deleted file mode 100644 (file)
index 680d1f0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u32 (void)
-{
-  uint32x2x4_t out_uint32x2x4_t;
-
-  out_uint32x2x4_t = vld4_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
deleted file mode 100644 (file)
index 304aff0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u64 (void)
-{
-  uint64x1x4_t out_uint64x1x4_t;
-
-  out_uint64x1x4_t = vld4_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
deleted file mode 100644 (file)
index 8972de1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u8 (void)
-{
-  uint8x8x4_t out_uint8x8x4_t;
-
-  out_uint8x8x4_t = vld4_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
deleted file mode 100644 (file)
index c39fef3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vmaxq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
deleted file mode 100644 (file)
index 57359f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vmaxq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
deleted file mode 100644 (file)
index bf2853f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vmaxq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
deleted file mode 100644 (file)
index f25da01..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vmaxq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
deleted file mode 100644 (file)
index 58707fd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vmaxq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
deleted file mode 100644 (file)
index 3b9a02e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vmaxq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
deleted file mode 100644 (file)
index 1543c94..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vmaxq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
deleted file mode 100644 (file)
index c9edda1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmax_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
deleted file mode 100644 (file)
index cb262e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmax_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
deleted file mode 100644 (file)
index 0078e3e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmax_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
deleted file mode 100644 (file)
index b60efd2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vmax_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
deleted file mode 100644 (file)
index 0c31be4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
deleted file mode 100644 (file)
index 6ed09a8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
deleted file mode 100644 (file)
index 4041d87..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQf32.c b/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
deleted file mode 100644 (file)
index a813893..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vminq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs16.c b/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
deleted file mode 100644 (file)
index 56b3dfa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vminq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs32.c b/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
deleted file mode 100644 (file)
index 6a4b9ff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vminq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs8.c b/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
deleted file mode 100644 (file)
index aa4269c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vminq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu16.c b/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
deleted file mode 100644 (file)
index 81c4578..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vminq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu32.c b/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
deleted file mode 100644 (file)
index 7bd31af..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vminq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu8.c b/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
deleted file mode 100644 (file)
index aeb5d44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vminq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminf32.c b/gcc/testsuite/gcc.target/arm/neon/vminf32.c
deleted file mode 100644 (file)
index ded40aa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmin_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins16.c b/gcc/testsuite/gcc.target/arm/neon/vmins16.c
deleted file mode 100644 (file)
index 0cc8401..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmins16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmins16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmins16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmin_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins32.c b/gcc/testsuite/gcc.target/arm/neon/vmins32.c
deleted file mode 100644 (file)
index c8f86af..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmins32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmins32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmins32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmin_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins8.c b/gcc/testsuite/gcc.target/arm/neon/vmins8.c
deleted file mode 100644 (file)
index 6ed9d82..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmins8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmins8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmins8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vmin_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu16.c b/gcc/testsuite/gcc.target/arm/neon/vminu16.c
deleted file mode 100644 (file)
index f971658..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu32.c b/gcc/testsuite/gcc.target/arm/neon/vminu32.c
deleted file mode 100644 (file)
index a1c8455..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu8.c b/gcc/testsuite/gcc.target/arm/neon/vminu8.c
deleted file mode 100644 (file)
index b810e86..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
deleted file mode 100644 (file)
index ba2b0eb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x4_t = vmlaq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
deleted file mode 100644 (file)
index 81b14d2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x8_t = vmlaq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
deleted file mode 100644 (file)
index f1373c7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x4_t = vmlaq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
deleted file mode 100644 (file)
index b8ec20a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x8_t = vmlaq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
deleted file mode 100644 (file)
index 03f9465..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x4_t = vmlaq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
deleted file mode 100644 (file)
index 0fa53da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32_t arg2_float32_t;
-
-  out_float32x4_t = vmlaq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
deleted file mode 100644 (file)
index da3ae94..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16_t arg2_int16_t;
-
-  out_int16x8_t = vmlaq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
deleted file mode 100644 (file)
index 1f206f2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32_t arg2_int32_t;
-
-  out_int32x4_t = vmlaq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
deleted file mode 100644 (file)
index 4f8da83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x8_t = vmlaq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
deleted file mode 100644 (file)
index 0af4c20..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x4_t = vmlaq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
deleted file mode 100644 (file)
index 2c4a6e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vmlaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
deleted file mode 100644 (file)
index b28d1ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vmlaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
deleted file mode 100644 (file)
index 9c02573..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vmlaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
deleted file mode 100644 (file)
index 6a2deca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vmlaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
deleted file mode 100644 (file)
index 7f795f6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vmlaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
deleted file mode 100644 (file)
index e976526..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vmlaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
deleted file mode 100644 (file)
index ebfcd7f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vmlaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
deleted file mode 100644 (file)
index a58bb70..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmla_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
deleted file mode 100644 (file)
index 0a98e64..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmla_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
deleted file mode 100644 (file)
index 7ce690c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmla_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
deleted file mode 100644 (file)
index c44e70f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmla_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
deleted file mode 100644 (file)
index 20f637f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmla_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
deleted file mode 100644 (file)
index 7c88491..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32_t arg2_float32_t;
-
-  out_float32x2_t = vmla_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
deleted file mode 100644 (file)
index 1e6681e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int16x4_t = vmla_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
deleted file mode 100644 (file)
index fe44375..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int32x2_t = vmla_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
deleted file mode 100644 (file)
index c39c7b4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x4_t = vmla_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
deleted file mode 100644 (file)
index b87366f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x2_t = vmla_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
deleted file mode 100644 (file)
index 827d4db..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmla_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
deleted file mode 100644 (file)
index f4bbe55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
deleted file mode 100644 (file)
index 24b581c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
deleted file mode 100644 (file)
index ea828b0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_laneu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlal_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
deleted file mode 100644 (file)
index 4641f9b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_laneu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlal_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
deleted file mode 100644 (file)
index 96f1429..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
deleted file mode 100644 (file)
index 24f1016..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
deleted file mode 100644 (file)
index 54bbdea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint32x4_t = vmlal_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
deleted file mode 100644 (file)
index 02909bb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint64x2_t = vmlal_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals16.c b/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
deleted file mode 100644 (file)
index 777078d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlals16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals32.c b/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
deleted file mode 100644 (file)
index 65d964e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlals32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals8.c b/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
deleted file mode 100644 (file)
index 806a449..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlals8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlals8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int16x8_t = vmlal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
deleted file mode 100644 (file)
index a7cb797..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlalu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlalu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
deleted file mode 100644 (file)
index bb71b9f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlalu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlalu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
deleted file mode 100644 (file)
index 0a191d8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlalu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlalu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint16x8_t = vmlal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas16.c b/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
deleted file mode 100644 (file)
index e36c5be..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlas16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlas16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmla_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas32.c b/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
deleted file mode 100644 (file)
index c2d1fe6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlas32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlas32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmla_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas8.c b/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
deleted file mode 100644 (file)
index 9ec2001..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlas8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlas8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vmla_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau16.c b/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
deleted file mode 100644 (file)
index 7f4bd11..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlau16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlau16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmla_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau32.c b/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
deleted file mode 100644 (file)
index 12e524f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlau32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlau32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmla_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau8.c b/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
deleted file mode 100644 (file)
index f55e11b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlau8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlau8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vmla_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
deleted file mode 100644 (file)
index 24a20cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x4_t = vmlsq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
deleted file mode 100644 (file)
index feb4178..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x8_t = vmlsq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
deleted file mode 100644 (file)
index eb15872..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x4_t = vmlsq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
deleted file mode 100644 (file)
index 8a432ef..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x8_t = vmlsq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
deleted file mode 100644 (file)
index 2aa122f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x4_t = vmlsq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
deleted file mode 100644 (file)
index 4124463..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32_t arg2_float32_t;
-
-  out_float32x4_t = vmlsq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
deleted file mode 100644 (file)
index 0c76e04..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16_t arg2_int16_t;
-
-  out_int16x8_t = vmlsq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
deleted file mode 100644 (file)
index 62d13ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32_t arg2_int32_t;
-
-  out_int32x4_t = vmlsq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
deleted file mode 100644 (file)
index cf31a92..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x8_t = vmlsq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
deleted file mode 100644 (file)
index 9788edc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x4_t = vmlsq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
deleted file mode 100644 (file)
index db405ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vmlsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
deleted file mode 100644 (file)
index 5830224..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vmlsq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
deleted file mode 100644 (file)
index a331c39..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vmlsq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
deleted file mode 100644 (file)
index ab6844f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vmlsq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
deleted file mode 100644 (file)
index f7c160e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vmlsq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
deleted file mode 100644 (file)
index 37b0bc7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vmlsq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
deleted file mode 100644 (file)
index ea4b5fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vmlsq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
deleted file mode 100644 (file)
index 9b1d38a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmls_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
deleted file mode 100644 (file)
index 312d6ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmls_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
deleted file mode 100644 (file)
index 21645d3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmls_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
deleted file mode 100644 (file)
index 8f78c0d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmls_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
deleted file mode 100644 (file)
index c947edd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmls_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
deleted file mode 100644 (file)
index b99b497..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32_t arg2_float32_t;
-
-  out_float32x2_t = vmls_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
deleted file mode 100644 (file)
index 97dda12..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int16x4_t = vmls_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
deleted file mode 100644 (file)
index d0cd7f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int32x2_t = vmls_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
deleted file mode 100644 (file)
index bee00e3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x4_t = vmls_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
deleted file mode 100644 (file)
index 94d6c04..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x2_t = vmls_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
deleted file mode 100644 (file)
index 4965231..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmls_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
deleted file mode 100644 (file)
index fb065e8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
deleted file mode 100644 (file)
index e89cd11..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
deleted file mode 100644 (file)
index c22f00b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_laneu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlsl_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
deleted file mode 100644 (file)
index 1bb52ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_laneu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlsl_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
deleted file mode 100644 (file)
index 65644f2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
deleted file mode 100644 (file)
index 4268862..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
deleted file mode 100644 (file)
index 841ab44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint32x4_t = vmlsl_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
deleted file mode 100644 (file)
index 2595b71..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint64x2_t = vmlsl_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
deleted file mode 100644 (file)
index cec5695..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
deleted file mode 100644 (file)
index f5fe87a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
deleted file mode 100644 (file)
index 39754df..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int16x8_t = vmlsl_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
deleted file mode 100644 (file)
index e5bebde..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlslu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlslu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlsl_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
deleted file mode 100644 (file)
index 90f342d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlslu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlslu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlsl_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
deleted file mode 100644 (file)
index 08a8e17..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlslu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlslu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint16x8_t = vmlsl_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss16.c b/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
deleted file mode 100644 (file)
index f2e3c3e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmls_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss32.c b/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
deleted file mode 100644 (file)
index 49f0a4e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmls_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss8.c b/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
deleted file mode 100644 (file)
index 049d046..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vmls_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
deleted file mode 100644 (file)
index e8ff816..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmls_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
deleted file mode 100644 (file)
index 31b24b2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmls_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
deleted file mode 100644 (file)
index 2221aa2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vmls_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
deleted file mode 100644 (file)
index bc72ec4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32_t arg0_float32_t;
-
-  out_float32x4_t = vmovq_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
deleted file mode 100644 (file)
index 13566e5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x8_t = vmovq_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
deleted file mode 100644 (file)
index eacd0ae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x16_t = vmovq_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
deleted file mode 100644 (file)
index 2a21439..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16_t arg0_int16_t;
-
-  out_int16x8_t = vmovq_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
deleted file mode 100644 (file)
index ede6b15..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32_t arg0_int32_t;
-
-  out_int32x4_t = vmovq_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
deleted file mode 100644 (file)
index 8cfd2d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmovQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64_t arg0_int64_t;
-
-  out_int64x2_t = vmovq_n_s64 (arg0_int64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
deleted file mode 100644 (file)
index 1fb2af8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8_t arg0_int8_t;
-
-  out_int8x16_t = vmovq_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
deleted file mode 100644 (file)
index 0e33945..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x8_t = vmovq_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
deleted file mode 100644 (file)
index fe7bef1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x4_t = vmovq_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
deleted file mode 100644 (file)
index 6092b32..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmovQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
deleted file mode 100644 (file)
index ce2f299..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x16_t = vmovq_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
deleted file mode 100644 (file)
index 3b3368c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32_t arg0_float32_t;
-
-  out_float32x2_t = vmov_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
deleted file mode 100644 (file)
index 1a3ae25..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x4_t = vmov_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
deleted file mode 100644 (file)
index 8d4347b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x8_t = vmov_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
deleted file mode 100644 (file)
index b0e1b09..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16_t arg0_int16_t;
-
-  out_int16x4_t = vmov_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
deleted file mode 100644 (file)
index cb1ae87..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32_t arg0_int32_t;
-
-  out_int32x2_t = vmov_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
deleted file mode 100644 (file)
index 2a11d2d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmov_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64_t arg0_int64_t;
-
-  out_int64x1_t = vmov_n_s64 (arg0_int64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
deleted file mode 100644 (file)
index c825eb1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8_t arg0_int8_t;
-
-  out_int8x8_t = vmov_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
deleted file mode 100644 (file)
index f17f837..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x4_t = vmov_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
deleted file mode 100644 (file)
index 80f948f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x2_t = vmov_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[     \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
deleted file mode 100644 (file)
index d9b9e60..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmov_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x1_t = vmov_n_u64 (arg0_uint64_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
deleted file mode 100644 (file)
index d3e3780..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x8_t = vmov_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[      \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[        \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls16.c b/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
deleted file mode 100644 (file)
index a9de06b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x4_t = vmovl_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls32.c b/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
deleted file mode 100644 (file)
index cf9572e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x2_t = vmovl_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls8.c b/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
deleted file mode 100644 (file)
index 156a81d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x8_t = vmovl_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
deleted file mode 100644 (file)
index d19e416..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovlu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x4_t = vmovl_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
deleted file mode 100644 (file)
index decb3a2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovlu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x2_t = vmovl_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
deleted file mode 100644 (file)
index 7623ad6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovlu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x8_t = vmovl_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns16.c b/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
deleted file mode 100644 (file)
index 91a30d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vmovn_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i16\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns32.c b/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
deleted file mode 100644 (file)
index 66c5f87..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vmovn_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i32\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
deleted file mode 100644 (file)
index 03e10ec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vmovn_s64 (arg0_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i64\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
deleted file mode 100644 (file)
index c391e88..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vmovn_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i16\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
deleted file mode 100644 (file)
index f0105da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vmovn_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i32\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
deleted file mode 100644 (file)
index 9809fec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vmovn_u64 (arg0_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i64\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
deleted file mode 100644 (file)
index 1cc15bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x4_t = vmulq_lane_f32 (arg0_float32x4_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
deleted file mode 100644 (file)
index a78b272..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vmulq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
deleted file mode 100644 (file)
index 7b953cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vmulq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
deleted file mode 100644 (file)
index 4b9a050..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x8_t = vmulq_lane_u16 (arg0_uint16x8_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
deleted file mode 100644 (file)
index f1ff8d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x4_t = vmulq_lane_u32 (arg0_uint32x4_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
deleted file mode 100644 (file)
index f55bb7d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32_t arg1_float32_t;
-
-  out_float32x4_t = vmulq_n_f32 (arg0_float32x4_t, arg1_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
deleted file mode 100644 (file)
index e98e23c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16_t arg1_int16_t;
-
-  out_int16x8_t = vmulq_n_s16 (arg0_int16x8_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
deleted file mode 100644 (file)
index 0c5d582..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32_t arg1_int32_t;
-
-  out_int32x4_t = vmulq_n_s32 (arg0_int32x4_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
deleted file mode 100644 (file)
index 3ee2fee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16_t arg1_uint16_t;
-
-  out_uint16x8_t = vmulq_n_u16 (arg0_uint16x8_t, arg1_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
deleted file mode 100644 (file)
index fb60d59..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32_t arg1_uint32_t;
-
-  out_uint32x4_t = vmulq_n_u32 (arg0_uint32x4_t, arg1_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
deleted file mode 100644 (file)
index f23e081..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vmulq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
deleted file mode 100644 (file)
index 104f296..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vmulq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.p8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
deleted file mode 100644 (file)
index 9c8c42f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vmulq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
deleted file mode 100644 (file)
index c775f2f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vmulq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
deleted file mode 100644 (file)
index bc9ff89..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vmulq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
deleted file mode 100644 (file)
index 02df722..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vmulq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
deleted file mode 100644 (file)
index 003fcf0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vmulq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
deleted file mode 100644 (file)
index cf6f980..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vmulq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
deleted file mode 100644 (file)
index 8270c62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmul_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
deleted file mode 100644 (file)
index 676bd96..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmul_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
deleted file mode 100644 (file)
index dd16c21..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmul_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
deleted file mode 100644 (file)
index 79a1c75..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmul_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
deleted file mode 100644 (file)
index cd27886..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmul_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
deleted file mode 100644 (file)
index bd60e74..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32_t arg1_float32_t;
-
-  out_float32x2_t = vmul_n_f32 (arg0_float32x2_t, arg1_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
deleted file mode 100644 (file)
index eb0c768..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int16x4_t = vmul_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
deleted file mode 100644 (file)
index ba74d4e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int32x2_t = vmul_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
deleted file mode 100644 (file)
index 4048ff5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16_t arg1_uint16_t;
-
-  out_uint16x4_t = vmul_n_u16 (arg0_uint16x4_t, arg1_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
deleted file mode 100644 (file)
index 58f7e95..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32_t arg1_uint32_t;
-
-  out_uint32x2_t = vmul_n_u32 (arg0_uint32x2_t, arg1_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
deleted file mode 100644 (file)
index 14a7ad4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmul_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
deleted file mode 100644 (file)
index 8a58638..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
deleted file mode 100644 (file)
index 6f19bd9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
deleted file mode 100644 (file)
index 97a723b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_laneu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vmull_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
deleted file mode 100644 (file)
index c70fdd8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_laneu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vmull_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
deleted file mode 100644 (file)
index 7ee4335..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int32x4_t = vmull_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
deleted file mode 100644 (file)
index 7a7673c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int64x2_t = vmull_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
deleted file mode 100644 (file)
index 8e4f3f9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16_t arg1_uint16_t;
-
-  out_uint32x4_t = vmull_n_u16 (arg0_uint16x4_t, arg1_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
deleted file mode 100644 (file)
index 1af7c55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32_t arg1_uint32_t;
-
-  out_uint64x2_t = vmull_n_u32 (arg0_uint32x2_t, arg1_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullp8.c b/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
deleted file mode 100644 (file)
index 7d16061..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullp8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly16x8_t = vmull_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.p8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls16.c b/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
deleted file mode 100644 (file)
index dcbcf26..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vmull_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls32.c b/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
deleted file mode 100644 (file)
index 7b00149..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vmull_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls8.c b/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
deleted file mode 100644 (file)
index 926549c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vmull_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu16.c b/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
deleted file mode 100644 (file)
index 0867792..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vmull_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu32.c b/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
deleted file mode 100644 (file)
index e2ff112..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vmull_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu8.c b/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
deleted file mode 100644 (file)
index 1e893ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vmull_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulp8.c b/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
deleted file mode 100644 (file)
index 3b7505a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vmul_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.p8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls16.c b/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
deleted file mode 100644 (file)
index 9eea7a6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmuls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmuls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmul_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls32.c b/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
deleted file mode 100644 (file)
index fd53ac7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmuls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmuls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmul_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls8.c b/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
deleted file mode 100644 (file)
index 4359a20..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmuls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmuls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vmul_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
deleted file mode 100644 (file)
index be19227..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmul_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
deleted file mode 100644 (file)
index 476b9ee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmul_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu8.c b/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
deleted file mode 100644 (file)
index 0252b8f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vmul_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
deleted file mode 100644 (file)
index 1166597..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vmvnq_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
deleted file mode 100644 (file)
index d8f5e1e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vmvnq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
deleted file mode 100644 (file)
index f737af5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vmvnq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
deleted file mode 100644 (file)
index 126c74d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vmvnq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
deleted file mode 100644 (file)
index a0cc6be..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vmvnq_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
deleted file mode 100644 (file)
index 0c2881b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vmvnq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
deleted file mode 100644 (file)
index d973064..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vmvnq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
deleted file mode 100644 (file)
index a113996..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vmvn_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns16.c b/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
deleted file mode 100644 (file)
index c9399c9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vmvn_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns32.c b/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
deleted file mode 100644 (file)
index fe3e522..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vmvn_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns8.c b/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
deleted file mode 100644 (file)
index 3c394a3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vmvn_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
deleted file mode 100644 (file)
index 5b71863..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vmvn_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
deleted file mode 100644 (file)
index 58413f8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vmvn_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
deleted file mode 100644 (file)
index 44b2e8c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vmvn_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c b/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
deleted file mode 100644 (file)
index 66e6729..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vnegq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
deleted file mode 100644 (file)
index cddcab6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vnegq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
deleted file mode 100644 (file)
index 439bf1b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vnegq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
deleted file mode 100644 (file)
index 95db560..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vnegq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegf32.c b/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
deleted file mode 100644 (file)
index f2423dc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vneg_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs16.c b/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
deleted file mode 100644 (file)
index 4c9bec2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vneg_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs32.c b/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
deleted file mode 100644 (file)
index 91f311a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vneg_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs8.c b/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
deleted file mode 100644 (file)
index 45a7a9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vneg_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs16.c b/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
deleted file mode 100644 (file)
index aad2966..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x8_t out_int16x8_t;
-int16x8_t arg0_int16x8_t;
-int16x8_t arg1_int16x8_t;
-void test_vornQs16 (void)
-{
-
-  out_int16x8_t = vornq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs32.c b/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
deleted file mode 100644 (file)
index 61e22a9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x4_t out_int32x4_t;
-int32x4_t arg0_int32x4_t;
-int32x4_t arg1_int32x4_t;
-void test_vornQs32 (void)
-{
-
-  out_int32x4_t = vornq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs64.c b/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
deleted file mode 100644 (file)
index 0d5d62d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x2_t out_int64x2_t;
-int64x2_t arg0_int64x2_t;
-int64x2_t arg1_int64x2_t;
-void test_vornQs64 (void)
-{
-
-  out_int64x2_t = vornq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs8.c b/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
deleted file mode 100644 (file)
index e68f760..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x16_t out_int8x16_t;
-int8x16_t arg0_int8x16_t;
-int8x16_t arg1_int8x16_t;
-void test_vornQs8 (void)
-{
-
-  out_int8x16_t = vornq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu16.c b/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
deleted file mode 100644 (file)
index fe52b81..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x8_t out_uint16x8_t;
-uint16x8_t arg0_uint16x8_t;
-uint16x8_t arg1_uint16x8_t;
-void test_vornQu16 (void)
-{
-
-  out_uint16x8_t = vornq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu32.c b/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
deleted file mode 100644 (file)
index f311b77..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x4_t out_uint32x4_t;
-uint32x4_t arg0_uint32x4_t;
-uint32x4_t arg1_uint32x4_t;
-void test_vornQu32 (void)
-{
-
-  out_uint32x4_t = vornq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu64.c b/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
deleted file mode 100644 (file)
index f5bfdac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x2_t out_uint64x2_t;
-uint64x2_t arg0_uint64x2_t;
-uint64x2_t arg1_uint64x2_t;
-void test_vornQu64 (void)
-{
-
-  out_uint64x2_t = vornq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu8.c b/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
deleted file mode 100644 (file)
index cb318c5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x16_t out_uint8x16_t;
-uint8x16_t arg0_uint8x16_t;
-uint8x16_t arg1_uint8x16_t;
-void test_vornQu8 (void)
-{
-
-  out_uint8x16_t = vornq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns16.c b/gcc/testsuite/gcc.target/arm/neon/vorns16.c
deleted file mode 100644 (file)
index a47fcf4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x4_t out_int16x4_t;
-int16x4_t arg0_int16x4_t;
-int16x4_t arg1_int16x4_t;
-void test_vorns16 (void)
-{
-
-  out_int16x4_t = vorn_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns32.c b/gcc/testsuite/gcc.target/arm/neon/vorns32.c
deleted file mode 100644 (file)
index dd86cab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x2_t out_int32x2_t;
-int32x2_t arg0_int32x2_t;
-int32x2_t arg1_int32x2_t;
-void test_vorns32 (void)
-{
-
-  out_int32x2_t = vorn_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns64.c b/gcc/testsuite/gcc.target/arm/neon/vorns64.c
deleted file mode 100644 (file)
index 0419574..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vorns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x1_t out_int64x1_t;
-int64x1_t arg0_int64x1_t;
-int64x1_t arg1_int64x1_t;
-void test_vorns64 (void)
-{
-
-  out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns8.c b/gcc/testsuite/gcc.target/arm/neon/vorns8.c
deleted file mode 100644 (file)
index 76fd7e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x8_t out_int8x8_t;
-int8x8_t arg0_int8x8_t;
-int8x8_t arg1_int8x8_t;
-void test_vorns8 (void)
-{
-
-  out_int8x8_t = vorn_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu16.c b/gcc/testsuite/gcc.target/arm/neon/vornu16.c
deleted file mode 100644 (file)
index a3a33ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x4_t out_uint16x4_t;
-uint16x4_t arg0_uint16x4_t;
-uint16x4_t arg1_uint16x4_t;
-void test_vornu16 (void)
-{
-
-  out_uint16x4_t = vorn_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu32.c b/gcc/testsuite/gcc.target/arm/neon/vornu32.c
deleted file mode 100644 (file)
index 649b26c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x2_t out_uint32x2_t;
-uint32x2_t arg0_uint32x2_t;
-uint32x2_t arg1_uint32x2_t;
-void test_vornu32 (void)
-{
-
-  out_uint32x2_t = vorn_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu64.c b/gcc/testsuite/gcc.target/arm/neon/vornu64.c
deleted file mode 100644 (file)
index 9bf3936..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vornu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x1_t out_uint64x1_t;
-uint64x1_t arg0_uint64x1_t;
-uint64x1_t arg1_uint64x1_t;
-void test_vornu64 (void)
-{
-
-  out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu8.c b/gcc/testsuite/gcc.target/arm/neon/vornu8.c
deleted file mode 100644 (file)
index 6a04641..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x8_t out_uint8x8_t;
-uint8x8_t arg0_uint8x8_t;
-uint8x8_t arg1_uint8x8_t;
-void test_vornu8 (void)
-{
-
-  out_uint8x8_t = vorn_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
deleted file mode 100644 (file)
index b7318d5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vorrq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
deleted file mode 100644 (file)
index 3b0ffb7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vorrq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
deleted file mode 100644 (file)
index e0fde9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vorrq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
deleted file mode 100644 (file)
index bd1e411..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vorrq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
deleted file mode 100644 (file)
index 7df1c16..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vorrq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
deleted file mode 100644 (file)
index 1846888..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vorrq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
deleted file mode 100644 (file)
index a3b6897..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vorrq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
deleted file mode 100644 (file)
index 43850cc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vorrq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs16.c b/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
deleted file mode 100644 (file)
index 7b6ec0b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vorr_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs32.c b/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
deleted file mode 100644 (file)
index 4220159..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vorr_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
deleted file mode 100644 (file)
index 4823779..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vorrs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs8.c b/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
deleted file mode 100644 (file)
index fc0c7b9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vorr_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru16.c b/gcc/testsuite/gcc.target/arm/neon/vorru16.c
deleted file mode 100644 (file)
index c9e4cba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorru16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vorr_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru32.c b/gcc/testsuite/gcc.target/arm/neon/vorru32.c
deleted file mode 100644 (file)
index 8683e21..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorru32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vorr_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru64.c b/gcc/testsuite/gcc.target/arm/neon/vorru64.c
deleted file mode 100644 (file)
index d044713..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vorru64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru8.c b/gcc/testsuite/gcc.target/arm/neon/vorru8.c
deleted file mode 100644 (file)
index 7422b5f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorru8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vorr_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
deleted file mode 100644 (file)
index 2a69afc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQs16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int32x4_t = vpadalq_s16 (arg0_int32x4_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
deleted file mode 100644 (file)
index 76d0b6e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQs32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int64x2_t = vpadalq_s32 (arg0_int64x2_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
deleted file mode 100644 (file)
index 4d3bf1d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQs8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int16x8_t = vpadalq_s8 (arg0_int16x8_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
deleted file mode 100644 (file)
index f7ef536..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint32x4_t = vpadalq_u16 (arg0_uint32x4_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
deleted file mode 100644 (file)
index 2a0f821..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint64x2_t = vpadalq_u32 (arg0_uint64x2_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
deleted file mode 100644 (file)
index d4c233b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint16x8_t = vpadalq_u8 (arg0_uint16x8_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals16.c b/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
deleted file mode 100644 (file)
index d49c2ff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadals16 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x2_t = vpadal_s16 (arg0_int32x2_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals32.c b/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
deleted file mode 100644 (file)
index b79746e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadals32 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x1_t = vpadal_s32 (arg0_int64x1_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals8.c b/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
deleted file mode 100644 (file)
index cfde849..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadals8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadals8 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x4_t = vpadal_s8 (arg0_int16x4_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
deleted file mode 100644 (file)
index 4b1777d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalu16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x2_t = vpadal_u16 (arg0_uint32x2_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
deleted file mode 100644 (file)
index 772f0cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalu32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x1_t = vpadal_u32 (arg0_uint64x1_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
deleted file mode 100644 (file)
index 700bf26..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalu8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x4_t = vpadal_u8 (arg0_uint16x4_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
deleted file mode 100644 (file)
index d6f7846..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vpadd_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
deleted file mode 100644 (file)
index f08fa83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQs16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int32x4_t = vpaddlq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
deleted file mode 100644 (file)
index 06305eb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQs32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int64x2_t = vpaddlq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
deleted file mode 100644 (file)
index ef17b07..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQs8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int16x8_t = vpaddlq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
deleted file mode 100644 (file)
index b301c91..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint32x4_t = vpaddlq_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
deleted file mode 100644 (file)
index 77eaf83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint64x2_t = vpaddlq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
deleted file mode 100644 (file)
index 06a9902..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint16x8_t = vpaddlq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
deleted file mode 100644 (file)
index 28e0cfa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddls16 (void)
-{
-  int32x2_t out_int32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x2_t = vpaddl_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
deleted file mode 100644 (file)
index 32de704..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddls32 (void)
-{
-  int64x1_t out_int64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x1_t = vpaddl_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
deleted file mode 100644 (file)
index c31ce4d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddls8 (void)
-{
-  int16x4_t out_int16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x4_t = vpaddl_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
deleted file mode 100644 (file)
index 575b93e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlu16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x2_t = vpaddl_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
deleted file mode 100644 (file)
index 58f7b56..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlu32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x1_t = vpaddl_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
deleted file mode 100644 (file)
index 458a4ec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlu8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x4_t = vpaddl_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds16.c b/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
deleted file mode 100644 (file)
index 962f827..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vpadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds32.c b/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
deleted file mode 100644 (file)
index 983f67c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vpadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds8.c b/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
deleted file mode 100644 (file)
index 4985bd1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vpadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
deleted file mode 100644 (file)
index aa8942d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vpadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
deleted file mode 100644 (file)
index 84b8573..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vpadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
deleted file mode 100644 (file)
index c59f99e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vpadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
deleted file mode 100644 (file)
index 4f329f0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vpmax_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
deleted file mode 100644 (file)
index 42c06c1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vpmax_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
deleted file mode 100644 (file)
index 3f8b31e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vpmax_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
deleted file mode 100644 (file)
index 3162b49..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vpmax_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
deleted file mode 100644 (file)
index 195a0ba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vpmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
deleted file mode 100644 (file)
index 263b9be..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vpmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
deleted file mode 100644 (file)
index ba4202e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vpmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminf32.c b/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
deleted file mode 100644 (file)
index f754a16..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vpmin_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.f32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins16.c b/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
deleted file mode 100644 (file)
index 14da695..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmins16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmins16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vpmin_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins32.c b/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
deleted file mode 100644 (file)
index 324c524..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmins32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmins32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vpmin_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins8.c b/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
deleted file mode 100644 (file)
index f8fecaf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmins8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmins8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vpmin_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu16.c b/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
deleted file mode 100644 (file)
index 06e18d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vpmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu32.c b/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
deleted file mode 100644 (file)
index b256311..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vpmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu8.c b/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
deleted file mode 100644 (file)
index 04a3afa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vpmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
deleted file mode 100644 (file)
index e4b3b2b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vqrdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
deleted file mode 100644 (file)
index 9191d33..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vqrdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
deleted file mode 100644 (file)
index fb30e26..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16_t arg1_int16_t;
-
-  out_int16x8_t = vqrdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
deleted file mode 100644 (file)
index 827b323..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32_t arg1_int32_t;
-
-  out_int32x4_t = vqrdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
deleted file mode 100644 (file)
index 30f71f0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqrdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
deleted file mode 100644 (file)
index 467b0c9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqrdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[        \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
deleted file mode 100644 (file)
index 5b303ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqrdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
deleted file mode 100644 (file)
index 3e8149a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqrdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
deleted file mode 100644 (file)
index 1495e40..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int16x4_t = vqrdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
deleted file mode 100644 (file)
index 7ecd731..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int32x2_t = vqrdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
deleted file mode 100644 (file)
index be260b4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqrdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
deleted file mode 100644 (file)
index 5b24353..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqrdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[        \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
deleted file mode 100644 (file)
index 366269e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
deleted file mode 100644 (file)
index 084e760..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
deleted file mode 100644 (file)
index e74623f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s64\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
deleted file mode 100644 (file)
index b347ab9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
deleted file mode 100644 (file)
index 34c3c14..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vqrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
deleted file mode 100644 (file)
index 7006ce0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vqrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
deleted file mode 100644 (file)
index d335402..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vqrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u64\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
deleted file mode 100644 (file)
index 5252754..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vqrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
deleted file mode 100644 (file)
index 498c788..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqrshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
deleted file mode 100644 (file)
index b46fd76..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqrshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
deleted file mode 100644 (file)
index 844f2ed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqrshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s64\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
deleted file mode 100644 (file)
index c238d5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqrshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
deleted file mode 100644 (file)
index 24a2967..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vqrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
deleted file mode 100644 (file)
index 10df112..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vqrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
deleted file mode 100644 (file)
index a0ef539..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vqrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u64\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
deleted file mode 100644 (file)
index b9fefe7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vqrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
deleted file mode 100644 (file)
index a6b9f88..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vqrshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.s16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
deleted file mode 100644 (file)
index 30393e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vqrshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.s32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
deleted file mode 100644 (file)
index 1ce5f77..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vqrshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.s64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
deleted file mode 100644 (file)
index d869ff9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vqrshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.u16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
deleted file mode 100644 (file)
index 7281f7c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vqrshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.u32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
deleted file mode 100644 (file)
index f7e6913..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vqrshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.u64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
deleted file mode 100644 (file)
index f1355be..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrun_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrun_ns16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x8_t = vqrshrun_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrun\.s16\[        \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
deleted file mode 100644 (file)
index 55991a4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrun_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrun_ns32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x4_t = vqrshrun_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrun\.s32\[        \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
deleted file mode 100644 (file)
index 80830ef..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrun_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrun_ns64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x2_t = vqrshrun_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrun\.s64\[        \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
deleted file mode 100644 (file)
index dbf857b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vqabsq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
deleted file mode 100644 (file)
index ccad63a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vqabsq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
deleted file mode 100644 (file)
index 128d930..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vqabsq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss16.c b/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
deleted file mode 100644 (file)
index 9f503f3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vqabs_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss32.c b/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
deleted file mode 100644 (file)
index 4d80b1e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vqabs_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss8.c b/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
deleted file mode 100644 (file)
index 28e4583..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vqabs_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
deleted file mode 100644 (file)
index d47b572..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
deleted file mode 100644 (file)
index 5d86a1a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
deleted file mode 100644 (file)
index 39c11cf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqaddq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
deleted file mode 100644 (file)
index 494ba88..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
deleted file mode 100644 (file)
index 5c99991..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vqaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
deleted file mode 100644 (file)
index 9e006a3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vqaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
deleted file mode 100644 (file)
index e52000a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vqaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
deleted file mode 100644 (file)
index b587875..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vqaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds16.c b/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
deleted file mode 100644 (file)
index ddfbb2e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds32.c b/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
deleted file mode 100644 (file)
index 9155ca6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds64.c b/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
deleted file mode 100644 (file)
index 11121d8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds8.c b/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
deleted file mode 100644 (file)
index dff10c7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
deleted file mode 100644 (file)
index 5d140c0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vqadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
deleted file mode 100644 (file)
index bd1678c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vqadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
deleted file mode 100644 (file)
index 9d57f74..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vqadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
deleted file mode 100644 (file)
index abf7c9c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vqadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
deleted file mode 100644 (file)
index a8fa442..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
deleted file mode 100644 (file)
index d145a42..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
deleted file mode 100644 (file)
index ce94549..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vqdmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
deleted file mode 100644 (file)
index c950629..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vqdmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
deleted file mode 100644 (file)
index a55c391..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlals16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
deleted file mode 100644 (file)
index e91ef3b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlals32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
deleted file mode 100644 (file)
index 362e63a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
deleted file mode 100644 (file)
index 3d8700f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
deleted file mode 100644 (file)
index 39b54ee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vqdmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
deleted file mode 100644 (file)
index 440c9e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vqdmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
deleted file mode 100644 (file)
index d4a9d37..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
deleted file mode 100644 (file)
index fb20e98..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
deleted file mode 100644 (file)
index 8067154..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vqdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
deleted file mode 100644 (file)
index 41902bc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vqdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
deleted file mode 100644 (file)
index fe0c768..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16_t arg1_int16_t;
-
-  out_int16x8_t = vqdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
deleted file mode 100644 (file)
index 7070654..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32_t arg1_int32_t;
-
-  out_int32x4_t = vqdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
deleted file mode 100644 (file)
index ddc6b08..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
deleted file mode 100644 (file)
index 3ae8af1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
deleted file mode 100644 (file)
index 648515a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
deleted file mode 100644 (file)
index 075e85e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
deleted file mode 100644 (file)
index d33cc6e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int16x4_t = vqdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
deleted file mode 100644 (file)
index 4ff7e93..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int32x2_t = vqdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
deleted file mode 100644 (file)
index 57403bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
deleted file mode 100644 (file)
index 6ae9d34..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
deleted file mode 100644 (file)
index 4257793..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vqdmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
deleted file mode 100644 (file)
index 874f890..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vqdmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
deleted file mode 100644 (file)
index aa60ce3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int32x4_t = vqdmull_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
deleted file mode 100644 (file)
index 7734d76..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int64x2_t = vqdmull_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
deleted file mode 100644 (file)
index 876bc78..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vqdmull_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s16\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
deleted file mode 100644 (file)
index ebc2062..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vqdmull_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s32\[         \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
deleted file mode 100644 (file)
index 56d1764..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vqmovn_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.s16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
deleted file mode 100644 (file)
index 086290c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vqmovn_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.s32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
deleted file mode 100644 (file)
index 4f61c28..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vqmovn_s64 (arg0_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.s64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
deleted file mode 100644 (file)
index 294963c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vqmovn_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.u16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
deleted file mode 100644 (file)
index a580dd6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vqmovn_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.u32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
deleted file mode 100644 (file)
index e07cd88..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vqmovn_u64 (arg0_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.u64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
deleted file mode 100644 (file)
index 82fdc20..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovuns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovuns16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x8_t = vqmovun_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqmovun\.s16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
deleted file mode 100644 (file)
index e56d890..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovuns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovuns32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x4_t = vqmovun_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqmovun\.s32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
deleted file mode 100644 (file)
index 06ad7e1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovuns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovuns64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x2_t = vqmovun_s64 (arg0_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqmovun\.s64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
deleted file mode 100644 (file)
index 9a6c854..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vqnegq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
deleted file mode 100644 (file)
index a93366f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vqnegq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
deleted file mode 100644 (file)
index c566b49..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vqnegq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
deleted file mode 100644 (file)
index dbff5c0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vqneg_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
deleted file mode 100644 (file)
index 2000358..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vqneg_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
deleted file mode 100644 (file)
index beb3d55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vqneg_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
deleted file mode 100644 (file)
index 480ead6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vqshlq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
deleted file mode 100644 (file)
index 1a0c61a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vqshlq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
deleted file mode 100644 (file)
index a6723ce..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vqshlq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
deleted file mode 100644 (file)
index 6767817..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vqshlq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
deleted file mode 100644 (file)
index 565b965..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vqshlq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
deleted file mode 100644 (file)
index 5d31d8c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vqshlq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
deleted file mode 100644 (file)
index 4d5f88d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vqshlq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
deleted file mode 100644 (file)
index 2dacefe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vqshlq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
deleted file mode 100644 (file)
index 7868197..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
deleted file mode 100644 (file)
index 6de5599..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
deleted file mode 100644 (file)
index 395fd1a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
deleted file mode 100644 (file)
index 58e2a51..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
deleted file mode 100644 (file)
index 080ce27..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vqshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
deleted file mode 100644 (file)
index cc47ed5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vqshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
deleted file mode 100644 (file)
index 98cfb55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vqshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
deleted file mode 100644 (file)
index 1ff3dfa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vqshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
deleted file mode 100644 (file)
index 4aa5760..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vqshl_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
deleted file mode 100644 (file)
index f42085d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vqshl_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
deleted file mode 100644 (file)
index 45c9b61..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vqshl_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
deleted file mode 100644 (file)
index 2263fd6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vqshl_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
deleted file mode 100644 (file)
index 926c91d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vqshl_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
deleted file mode 100644 (file)
index 3a43427..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vqshl_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
deleted file mode 100644 (file)
index 992b15c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vqshl_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
deleted file mode 100644 (file)
index e0cfa5e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vqshl_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls16.c b/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
deleted file mode 100644 (file)
index bd41202..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls32.c b/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
deleted file mode 100644 (file)
index 487f603..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls64.c b/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
deleted file mode 100644 (file)
index 2d2ebae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls8.c b/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
deleted file mode 100644 (file)
index f9df74e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
deleted file mode 100644 (file)
index 75c98ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vqshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
deleted file mode 100644 (file)
index 3304981..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vqshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
deleted file mode 100644 (file)
index e4ff98f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vqshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
deleted file mode 100644 (file)
index 9b61f4e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vqshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
deleted file mode 100644 (file)
index 6fe5890..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint16x8_t = vqshluq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s16\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
deleted file mode 100644 (file)
index 78ae2f5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint32x4_t = vqshluq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
deleted file mode 100644 (file)
index 45f5ba0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint64x2_t = vqshluq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s64\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
deleted file mode 100644 (file)
index 47e1e85..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint8x16_t = vqshluq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s8\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
deleted file mode 100644 (file)
index a168eb0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint16x4_t = vqshlu_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s16\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
deleted file mode 100644 (file)
index f625652..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint32x2_t = vqshlu_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
deleted file mode 100644 (file)
index a7bd8e1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint64x1_t = vqshlu_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s64\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
deleted file mode 100644 (file)
index f8deec1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint8x8_t = vqshlu_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s8\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
deleted file mode 100644 (file)
index 887ed43..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vqshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.s16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
deleted file mode 100644 (file)
index 3256226..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vqshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.s32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
deleted file mode 100644 (file)
index 949ad14..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vqshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.s64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
deleted file mode 100644 (file)
index 944dcc6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vqshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.u16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
deleted file mode 100644 (file)
index ef9665e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vqshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.u32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
deleted file mode 100644 (file)
index 20da1cc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vqshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.u64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
deleted file mode 100644 (file)
index 686c4e5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrun_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrun_ns16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x8_t = vqshrun_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrun\.s16\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
deleted file mode 100644 (file)
index fcf370f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrun_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrun_ns32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x4_t = vqshrun_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrun\.s32\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
deleted file mode 100644 (file)
index e7f336e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrun_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrun_ns64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x2_t = vqshrun_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrun\.s64\[         \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
deleted file mode 100644 (file)
index 2e555f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
deleted file mode 100644 (file)
index f496cfa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
deleted file mode 100644 (file)
index d650235..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqsubq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
deleted file mode 100644 (file)
index 3dddbec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
deleted file mode 100644 (file)
index 32cae60..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vqsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
deleted file mode 100644 (file)
index c6e90e4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vqsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
deleted file mode 100644 (file)
index 59cf588..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vqsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u64\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
deleted file mode 100644 (file)
index 50478cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vqsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
deleted file mode 100644 (file)
index b5ce2f8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
deleted file mode 100644 (file)
index c9290a0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
deleted file mode 100644 (file)
index 2fee028..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
deleted file mode 100644 (file)
index 53b1add..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
deleted file mode 100644 (file)
index 68ecff8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vqsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
deleted file mode 100644 (file)
index bcb9db1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vqsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
deleted file mode 100644 (file)
index 1ca317b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vqsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u64\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
deleted file mode 100644 (file)
index 7946d1d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vqsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
deleted file mode 100644 (file)
index 0883d29..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpeQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpeQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrecpeq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
deleted file mode 100644 (file)
index 5520989..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpeQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpeQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrecpeq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.u32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
deleted file mode 100644 (file)
index d31cc86..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrecpe_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
deleted file mode 100644 (file)
index 21ab98d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpeu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpeu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrecpe_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.u32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
deleted file mode 100644 (file)
index aefe626..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrecpsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vrecpsq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrecps\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
deleted file mode 100644 (file)
index 8dac29c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrecpsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vrecps_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrecps\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
deleted file mode 100644 (file)
index 240c1d9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p128 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly128_t arg0_poly128_t;
-
-  out_float32x4_t = vreinterpretq_f32_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
deleted file mode 100644 (file)
index 6e76ba6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p16 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_float32x4_t = vreinterpretq_f32_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
deleted file mode 100644 (file)
index ba66ff8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p64 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_float32x4_t = vreinterpretq_f32_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
deleted file mode 100644 (file)
index d13e01f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p8 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_float32x4_t = vreinterpretq_f32_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
deleted file mode 100644 (file)
index 70c48e9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s16 (void)
-{
-  float32x4_t out_float32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_float32x4_t = vreinterpretq_f32_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
deleted file mode 100644 (file)
index 546139e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s32 (void)
-{
-  float32x4_t out_float32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_float32x4_t = vreinterpretq_f32_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
deleted file mode 100644 (file)
index a87ccff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s64 (void)
-{
-  float32x4_t out_float32x4_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_float32x4_t = vreinterpretq_f32_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
deleted file mode 100644 (file)
index 3d46bec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s8 (void)
-{
-  float32x4_t out_float32x4_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_float32x4_t = vreinterpretq_f32_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
deleted file mode 100644 (file)
index 3b0b189..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u16 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_float32x4_t = vreinterpretq_f32_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
deleted file mode 100644 (file)
index bc54aa6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_float32x4_t = vreinterpretq_f32_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
deleted file mode 100644 (file)
index d582c5e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u64 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_float32x4_t = vreinterpretq_f32_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
deleted file mode 100644 (file)
index 956db9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u8 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_float32x4_t = vreinterpretq_f32_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
deleted file mode 100644 (file)
index 72732da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_f32 (void)
-{
-  poly128_t out_poly128_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly128_t = vreinterpretq_p128_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
deleted file mode 100644 (file)
index 52c3365..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_p16 (void)
-{
-  poly128_t out_poly128_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly128_t = vreinterpretq_p128_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
deleted file mode 100644 (file)
index 2f86cfc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_p64 (void)
-{
-  poly128_t out_poly128_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly128_t = vreinterpretq_p128_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
deleted file mode 100644 (file)
index 6964e39..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_p8 (void)
-{
-  poly128_t out_poly128_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly128_t = vreinterpretq_p128_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
deleted file mode 100644 (file)
index a6f162b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s16 (void)
-{
-  poly128_t out_poly128_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly128_t = vreinterpretq_p128_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
deleted file mode 100644 (file)
index 66f4893..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s32 (void)
-{
-  poly128_t out_poly128_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly128_t = vreinterpretq_p128_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
deleted file mode 100644 (file)
index 5437f31..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s64 (void)
-{
-  poly128_t out_poly128_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly128_t = vreinterpretq_p128_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
deleted file mode 100644 (file)
index a4006ed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s8 (void)
-{
-  poly128_t out_poly128_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly128_t = vreinterpretq_p128_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
deleted file mode 100644 (file)
index 00aaf3e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u16 (void)
-{
-  poly128_t out_poly128_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly128_t = vreinterpretq_p128_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
deleted file mode 100644 (file)
index bf70c55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u32 (void)
-{
-  poly128_t out_poly128_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly128_t = vreinterpretq_p128_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
deleted file mode 100644 (file)
index 092d18a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u64 (void)
-{
-  poly128_t out_poly128_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly128_t = vreinterpretq_p128_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
deleted file mode 100644 (file)
index 39671d2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u8 (void)
-{
-  poly128_t out_poly128_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly128_t = vreinterpretq_p128_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
deleted file mode 100644 (file)
index 5862926..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_f32 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly16x8_t = vreinterpretq_p16_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
deleted file mode 100644 (file)
index 8bdd6aa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_p128 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly128_t arg0_poly128_t;
-
-  out_poly16x8_t = vreinterpretq_p16_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
deleted file mode 100644 (file)
index 8073d9d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_p64 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly16x8_t = vreinterpretq_p16_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
deleted file mode 100644 (file)
index 71ea56d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_p8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly16x8_t = vreinterpretq_p16_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
deleted file mode 100644 (file)
index 8073ad1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
deleted file mode 100644 (file)
index 08c3c44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s32 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
deleted file mode 100644 (file)
index 8c82181..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s64 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
deleted file mode 100644 (file)
index dd3bad0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
deleted file mode 100644 (file)
index bb3557c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
deleted file mode 100644 (file)
index ede90f2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u32 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
deleted file mode 100644 (file)
index 51692b9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u64 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
deleted file mode 100644 (file)
index 020f6cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
deleted file mode 100644 (file)
index 97a64f7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_f32 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly64x2_t = vreinterpretq_p64_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
deleted file mode 100644 (file)
index 50db979..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_p128 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly128_t arg0_poly128_t;
-
-  out_poly64x2_t = vreinterpretq_p64_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
deleted file mode 100644 (file)
index 4395794..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_p16 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly64x2_t = vreinterpretq_p64_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
deleted file mode 100644 (file)
index 0bf635c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_p8 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly64x2_t = vreinterpretq_p64_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
deleted file mode 100644 (file)
index 13320e1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s16 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
deleted file mode 100644 (file)
index 3377d50..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s32 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
deleted file mode 100644 (file)
index c5fd29e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
deleted file mode 100644 (file)
index b85ce4e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s8 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
deleted file mode 100644 (file)
index a46231c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u16 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
deleted file mode 100644 (file)
index be0f4d8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u32 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
deleted file mode 100644 (file)
index 1c141b6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
deleted file mode 100644 (file)
index 25cd2e0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u8 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
deleted file mode 100644 (file)
index 017fd16..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_f32 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly8x16_t = vreinterpretq_p8_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
deleted file mode 100644 (file)
index 3c12a5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_p128 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly128_t arg0_poly128_t;
-
-  out_poly8x16_t = vreinterpretq_p8_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
deleted file mode 100644 (file)
index 9fb4fa1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_p16 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly8x16_t = vreinterpretq_p8_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
deleted file mode 100644 (file)
index 2b5b815..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_p64 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly8x16_t = vreinterpretq_p8_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
deleted file mode 100644 (file)
index 91ad505..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s16 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
deleted file mode 100644 (file)
index 0ab4eff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s32 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
deleted file mode 100644 (file)
index 946b824..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s64 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
deleted file mode 100644 (file)
index f07c24a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
deleted file mode 100644 (file)
index b776ef0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u16 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
deleted file mode 100644 (file)
index b74c757..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u32 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
deleted file mode 100644 (file)
index fc89c81..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u64 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
deleted file mode 100644 (file)
index 82f02fc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
deleted file mode 100644 (file)
index e74ca76..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_f32 (void)
-{
-  int16x8_t out_int16x8_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int16x8_t = vreinterpretq_s16_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
deleted file mode 100644 (file)
index da932d9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p128 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly128_t arg0_poly128_t;
-
-  out_int16x8_t = vreinterpretq_s16_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
deleted file mode 100644 (file)
index e643ed9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p16 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int16x8_t = vreinterpretq_s16_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
deleted file mode 100644 (file)
index ce15357..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p64 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int16x8_t = vreinterpretq_s16_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
deleted file mode 100644 (file)
index e3b28f5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p8 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int16x8_t = vreinterpretq_s16_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
deleted file mode 100644 (file)
index 8ffa8a9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_s32 (void)
-{
-  int16x8_t out_int16x8_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x8_t = vreinterpretq_s16_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
deleted file mode 100644 (file)
index caa23fc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_s64 (void)
-{
-  int16x8_t out_int16x8_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int16x8_t = vreinterpretq_s16_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
deleted file mode 100644 (file)
index 57e03d4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_s8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int16x8_t = vreinterpretq_s16_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
deleted file mode 100644 (file)
index 03497b5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u16 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int16x8_t = vreinterpretq_s16_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
deleted file mode 100644 (file)
index 1d264b5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u32 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int16x8_t = vreinterpretq_s16_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
deleted file mode 100644 (file)
index 355a0aa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u64 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int16x8_t = vreinterpretq_s16_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
deleted file mode 100644 (file)
index 339ed27..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u8 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int16x8_t = vreinterpretq_s16_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
deleted file mode 100644 (file)
index 857db63..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_f32 (void)
-{
-  int32x4_t out_int32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int32x4_t = vreinterpretq_s32_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
deleted file mode 100644 (file)
index eb1d7ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p128 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly128_t arg0_poly128_t;
-
-  out_int32x4_t = vreinterpretq_s32_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
deleted file mode 100644 (file)
index 0dc4d48..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p16 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int32x4_t = vreinterpretq_s32_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
deleted file mode 100644 (file)
index 00e3a61..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p64 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int32x4_t = vreinterpretq_s32_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
deleted file mode 100644 (file)
index 07c7870..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p8 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int32x4_t = vreinterpretq_s32_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
deleted file mode 100644 (file)
index 5d72da9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_s16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int32x4_t = vreinterpretq_s32_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
deleted file mode 100644 (file)
index c1d8593..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_s64 (void)
-{
-  int32x4_t out_int32x4_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x4_t = vreinterpretq_s32_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
deleted file mode 100644 (file)
index 0ba13b3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_s8 (void)
-{
-  int32x4_t out_int32x4_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int32x4_t = vreinterpretq_s32_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
deleted file mode 100644 (file)
index 35ed106..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u16 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int32x4_t = vreinterpretq_s32_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
deleted file mode 100644 (file)
index dc6082f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u32 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int32x4_t = vreinterpretq_s32_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
deleted file mode 100644 (file)
index c0083bd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u64 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int32x4_t = vreinterpretq_s32_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
deleted file mode 100644 (file)
index 7cba3e2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u8 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int32x4_t = vreinterpretq_s32_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
deleted file mode 100644 (file)
index e4f1de3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_f32 (void)
-{
-  int64x2_t out_int64x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int64x2_t = vreinterpretq_s64_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
deleted file mode 100644 (file)
index e4cb353..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p128 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly128_t arg0_poly128_t;
-
-  out_int64x2_t = vreinterpretq_s64_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
deleted file mode 100644 (file)
index 35b36c1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p16 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int64x2_t = vreinterpretq_s64_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
deleted file mode 100644 (file)
index 384bde6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p64 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int64x2_t = vreinterpretq_s64_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
deleted file mode 100644 (file)
index 434ad4f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p8 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int64x2_t = vreinterpretq_s64_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
deleted file mode 100644 (file)
index b03138e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_s16 (void)
-{
-  int64x2_t out_int64x2_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int64x2_t = vreinterpretq_s64_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
deleted file mode 100644 (file)
index efe19b2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_s32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int64x2_t = vreinterpretq_s64_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
deleted file mode 100644 (file)
index 3d62931..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_s8 (void)
-{
-  int64x2_t out_int64x2_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int64x2_t = vreinterpretq_s64_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
deleted file mode 100644 (file)
index 2155784..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u16 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int64x2_t = vreinterpretq_s64_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
deleted file mode 100644 (file)
index aa9bf07..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u32 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int64x2_t = vreinterpretq_s64_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
deleted file mode 100644 (file)
index 20c9b78..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u64 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int64x2_t = vreinterpretq_s64_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
deleted file mode 100644 (file)
index 28baec0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u8 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int64x2_t = vreinterpretq_s64_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
deleted file mode 100644 (file)
index c3830d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_f32 (void)
-{
-  int8x16_t out_int8x16_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int8x16_t = vreinterpretq_s8_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
deleted file mode 100644 (file)
index ee60845..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p128 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly128_t arg0_poly128_t;
-
-  out_int8x16_t = vreinterpretq_s8_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
deleted file mode 100644 (file)
index 739f0ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p16 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int8x16_t = vreinterpretq_s8_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
deleted file mode 100644 (file)
index 3c8b458..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p64 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int8x16_t = vreinterpretq_s8_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
deleted file mode 100644 (file)
index 1702e8f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p8 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int8x16_t = vreinterpretq_s8_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
deleted file mode 100644 (file)
index 593209e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_s16 (void)
-{
-  int8x16_t out_int8x16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x16_t = vreinterpretq_s8_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
deleted file mode 100644 (file)
index ecd67ee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_s32 (void)
-{
-  int8x16_t out_int8x16_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int8x16_t = vreinterpretq_s8_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
deleted file mode 100644 (file)
index eea205c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_s64 (void)
-{
-  int8x16_t out_int8x16_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int8x16_t = vreinterpretq_s8_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
deleted file mode 100644 (file)
index ca8c856..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u16 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int8x16_t = vreinterpretq_s8_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
deleted file mode 100644 (file)
index 714567a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u32 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int8x16_t = vreinterpretq_s8_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
deleted file mode 100644 (file)
index 2471b81..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u64 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int8x16_t = vreinterpretq_s8_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
deleted file mode 100644 (file)
index 816c645..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u8 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int8x16_t = vreinterpretq_s8_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
deleted file mode 100644 (file)
index 0d9218e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_f32 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint16x8_t = vreinterpretq_u16_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
deleted file mode 100644 (file)
index 6f45c3e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p128 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
deleted file mode 100644 (file)
index cbc19e1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
deleted file mode 100644 (file)
index f11a751..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p64 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
deleted file mode 100644 (file)
index ff38614..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
deleted file mode 100644 (file)
index 8842c47..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
deleted file mode 100644 (file)
index dc23a4d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s32 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
deleted file mode 100644 (file)
index 92179de..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s64 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
deleted file mode 100644 (file)
index ceff877..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
deleted file mode 100644 (file)
index c0f49ec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_u32 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x8_t = vreinterpretq_u16_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
deleted file mode 100644 (file)
index a80bea2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_u64 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint16x8_t = vreinterpretq_u16_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
deleted file mode 100644 (file)
index bcf28c1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_u8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint16x8_t = vreinterpretq_u16_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
deleted file mode 100644 (file)
index 95608e0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_f32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint32x4_t = vreinterpretq_u32_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
deleted file mode 100644 (file)
index 83254ae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p128 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
deleted file mode 100644 (file)
index 6a55e7a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
deleted file mode 100644 (file)
index b0c446d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p64 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
deleted file mode 100644 (file)
index b8d4905..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p8 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
deleted file mode 100644 (file)
index 85a1ec8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
deleted file mode 100644 (file)
index 60c1750..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
deleted file mode 100644 (file)
index bf02d09..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s64 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
deleted file mode 100644 (file)
index 8bd7760..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s8 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
deleted file mode 100644 (file)
index 2326bc9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_u16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint32x4_t = vreinterpretq_u32_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
deleted file mode 100644 (file)
index 0386681..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_u64 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x4_t = vreinterpretq_u32_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
deleted file mode 100644 (file)
index 14f63d8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_u8 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint32x4_t = vreinterpretq_u32_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
deleted file mode 100644 (file)
index 6a8559d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_f32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint64x2_t = vreinterpretq_u64_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
deleted file mode 100644 (file)
index 1dc0309..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p128 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
deleted file mode 100644 (file)
index f4a31ac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p16 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
deleted file mode 100644 (file)
index 187da75..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
deleted file mode 100644 (file)
index 1980714..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p8 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
deleted file mode 100644 (file)
index 93673de..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s16 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
deleted file mode 100644 (file)
index 60c0042..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
deleted file mode 100644 (file)
index da88b54..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
deleted file mode 100644 (file)
index b5322aa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s8 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
deleted file mode 100644 (file)
index 06bf44e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_u16 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint64x2_t = vreinterpretq_u64_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
deleted file mode 100644 (file)
index 2d71f71..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_u32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint64x2_t = vreinterpretq_u64_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
deleted file mode 100644 (file)
index f870e92..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_u8 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint64x2_t = vreinterpretq_u64_u8 (arg0_uint8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
deleted file mode 100644 (file)
index 8aaffda..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_f32 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint8x16_t = vreinterpretq_u8_f32 (arg0_float32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
deleted file mode 100644 (file)
index eff6df5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p128 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p128 (arg0_poly128_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
deleted file mode 100644 (file)
index ac9b586..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p16 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p16 (arg0_poly16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
deleted file mode 100644 (file)
index e75b8a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p64 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p64 (arg0_poly64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
deleted file mode 100644 (file)
index 0d49f7d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p8 (arg0_poly8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
deleted file mode 100644 (file)
index 37f3fed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s16 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s16 (arg0_int16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
deleted file mode 100644 (file)
index 0ed46fd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s32 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s32 (arg0_int32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
deleted file mode 100644 (file)
index 73dc999..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s64 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s64 (arg0_int64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
deleted file mode 100644 (file)
index a243537..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s8 (arg0_int8x16_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
deleted file mode 100644 (file)
index 57e4053..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_u16 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x16_t = vreinterpretq_u8_u16 (arg0_uint16x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
deleted file mode 100644 (file)
index 98b998f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_u32 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint8x16_t = vreinterpretq_u8_u32 (arg0_uint32x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
deleted file mode 100644 (file)
index 0cebf4d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_u64 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint8x16_t = vreinterpretq_u8_u64 (arg0_uint64x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
deleted file mode 100644 (file)
index 6bec08e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_p16 (void)
-{
-  float32x2_t out_float32x2_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_float32x2_t = vreinterpret_f32_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
deleted file mode 100644 (file)
index bb7ea60..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_p64 (void)
-{
-  float32x2_t out_float32x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_float32x2_t = vreinterpret_f32_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
deleted file mode 100644 (file)
index 05a4eb6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_p8 (void)
-{
-  float32x2_t out_float32x2_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_float32x2_t = vreinterpret_f32_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
deleted file mode 100644 (file)
index dbf514b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s16 (void)
-{
-  float32x2_t out_float32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_float32x2_t = vreinterpret_f32_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
deleted file mode 100644 (file)
index 133bade..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s32 (void)
-{
-  float32x2_t out_float32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_float32x2_t = vreinterpret_f32_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
deleted file mode 100644 (file)
index 7a9045e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s64 (void)
-{
-  float32x2_t out_float32x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_float32x2_t = vreinterpret_f32_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
deleted file mode 100644 (file)
index 256f6a4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s8 (void)
-{
-  float32x2_t out_float32x2_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_float32x2_t = vreinterpret_f32_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
deleted file mode 100644 (file)
index 319c0f0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u16 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_float32x2_t = vreinterpret_f32_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
deleted file mode 100644 (file)
index 3e4b1d4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_float32x2_t = vreinterpret_f32_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
deleted file mode 100644 (file)
index 880ab42..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u64 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_float32x2_t = vreinterpret_f32_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
deleted file mode 100644 (file)
index 0f25f6a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u8 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_float32x2_t = vreinterpret_f32_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
deleted file mode 100644 (file)
index 276b8c3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_f32 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_poly16x4_t = vreinterpret_p16_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
deleted file mode 100644 (file)
index 67799cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_p64 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly16x4_t = vreinterpret_p16_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
deleted file mode 100644 (file)
index 837d731..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_p8 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly16x4_t = vreinterpret_p16_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
deleted file mode 100644 (file)
index 099ed52..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_poly16x4_t = vreinterpret_p16_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
deleted file mode 100644 (file)
index 027c156..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s32 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_poly16x4_t = vreinterpret_p16_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
deleted file mode 100644 (file)
index 2fdc5e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s64 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_poly16x4_t = vreinterpret_p16_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
deleted file mode 100644 (file)
index 1b6828f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s8 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_poly16x4_t = vreinterpret_p16_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
deleted file mode 100644 (file)
index f661317..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_poly16x4_t = vreinterpret_p16_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
deleted file mode 100644 (file)
index b59d492..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u32 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_poly16x4_t = vreinterpret_p16_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
deleted file mode 100644 (file)
index fcebd51..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u64 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_poly16x4_t = vreinterpret_p16_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
deleted file mode 100644 (file)
index c6a6f2d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u8 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_poly16x4_t = vreinterpret_p16_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
deleted file mode 100644 (file)
index 1905a99..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_f32 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_poly64x1_t = vreinterpret_p64_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
deleted file mode 100644 (file)
index 546d7ef..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_p16 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly64x1_t = vreinterpret_p64_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
deleted file mode 100644 (file)
index 0a36a8f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_p8 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly64x1_t = vreinterpret_p64_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
deleted file mode 100644 (file)
index 9487559..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s16 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_poly64x1_t = vreinterpret_p64_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
deleted file mode 100644 (file)
index ffca4cf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s32 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_poly64x1_t = vreinterpret_p64_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
deleted file mode 100644 (file)
index c3a0173..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_poly64x1_t = vreinterpret_p64_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
deleted file mode 100644 (file)
index ba12a05..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s8 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_poly64x1_t = vreinterpret_p64_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
deleted file mode 100644 (file)
index 9a60595..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u16 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_poly64x1_t = vreinterpret_p64_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
deleted file mode 100644 (file)
index cb61d53..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u32 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_poly64x1_t = vreinterpret_p64_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
deleted file mode 100644 (file)
index 1459a49..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_poly64x1_t = vreinterpret_p64_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
deleted file mode 100644 (file)
index 4e8fcf6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u8 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_poly64x1_t = vreinterpret_p64_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
deleted file mode 100644 (file)
index e128056..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_f32 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_poly8x8_t = vreinterpret_p8_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
deleted file mode 100644 (file)
index 736741c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_p16 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly8x8_t = vreinterpret_p8_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
deleted file mode 100644 (file)
index 3516626..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_p64 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly8x8_t = vreinterpret_p8_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
deleted file mode 100644 (file)
index 6a065c6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s16 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_poly8x8_t = vreinterpret_p8_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
deleted file mode 100644 (file)
index 90a8b77..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s32 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_poly8x8_t = vreinterpret_p8_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
deleted file mode 100644 (file)
index 3893ba2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s64 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_poly8x8_t = vreinterpret_p8_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
deleted file mode 100644 (file)
index 5fb4c7a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_poly8x8_t = vreinterpret_p8_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
deleted file mode 100644 (file)
index 398470f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u16 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_poly8x8_t = vreinterpret_p8_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
deleted file mode 100644 (file)
index f60d7cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u32 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_poly8x8_t = vreinterpret_p8_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
deleted file mode 100644 (file)
index c874eb7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u64 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_poly8x8_t = vreinterpret_p8_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
deleted file mode 100644 (file)
index cead64b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_poly8x8_t = vreinterpret_p8_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
deleted file mode 100644 (file)
index 904fcb6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_f32 (void)
-{
-  int16x4_t out_int16x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int16x4_t = vreinterpret_s16_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
deleted file mode 100644 (file)
index d03a724..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_p16 (void)
-{
-  int16x4_t out_int16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int16x4_t = vreinterpret_s16_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
deleted file mode 100644 (file)
index 87f02b8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_p64 (void)
-{
-  int16x4_t out_int16x4_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int16x4_t = vreinterpret_s16_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
deleted file mode 100644 (file)
index a54b2c8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_p8 (void)
-{
-  int16x4_t out_int16x4_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int16x4_t = vreinterpret_s16_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
deleted file mode 100644 (file)
index c395ad2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_s32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int16x4_t = vreinterpret_s16_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
deleted file mode 100644 (file)
index 41b75d4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_s64 (void)
-{
-  int16x4_t out_int16x4_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int16x4_t = vreinterpret_s16_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
deleted file mode 100644 (file)
index 9746bda..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_s8 (void)
-{
-  int16x4_t out_int16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x4_t = vreinterpret_s16_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
deleted file mode 100644 (file)
index f7bd522..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u16 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int16x4_t = vreinterpret_s16_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
deleted file mode 100644 (file)
index db7ef6b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u32 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int16x4_t = vreinterpret_s16_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
deleted file mode 100644 (file)
index b36ad0e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u64 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int16x4_t = vreinterpret_s16_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
deleted file mode 100644 (file)
index c5af74d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u8 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int16x4_t = vreinterpret_s16_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
deleted file mode 100644 (file)
index 10f41dc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_f32 (void)
-{
-  int32x2_t out_int32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int32x2_t = vreinterpret_s32_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
deleted file mode 100644 (file)
index 0f29b7e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_p16 (void)
-{
-  int32x2_t out_int32x2_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int32x2_t = vreinterpret_s32_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
deleted file mode 100644 (file)
index f670990..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_p64 (void)
-{
-  int32x2_t out_int32x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int32x2_t = vreinterpret_s32_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
deleted file mode 100644 (file)
index ba21615..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_p8 (void)
-{
-  int32x2_t out_int32x2_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int32x2_t = vreinterpret_s32_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
deleted file mode 100644 (file)
index c0142ac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_s16 (void)
-{
-  int32x2_t out_int32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x2_t = vreinterpret_s32_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
deleted file mode 100644 (file)
index e1499a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_s64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int32x2_t = vreinterpret_s32_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
deleted file mode 100644 (file)
index 311a708..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_s8 (void)
-{
-  int32x2_t out_int32x2_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int32x2_t = vreinterpret_s32_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
deleted file mode 100644 (file)
index eaf5eb6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u16 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int32x2_t = vreinterpret_s32_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
deleted file mode 100644 (file)
index 65ab858..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u32 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int32x2_t = vreinterpret_s32_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
deleted file mode 100644 (file)
index 4338d10..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u64 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int32x2_t = vreinterpret_s32_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
deleted file mode 100644 (file)
index 74f7899..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u8 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int32x2_t = vreinterpret_s32_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
deleted file mode 100644 (file)
index 3510bed..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_f32 (void)
-{
-  int64x1_t out_int64x1_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int64x1_t = vreinterpret_s64_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
deleted file mode 100644 (file)
index e239a96..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_p16 (void)
-{
-  int64x1_t out_int64x1_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int64x1_t = vreinterpret_s64_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
deleted file mode 100644 (file)
index d20075c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_p64 (void)
-{
-  int64x1_t out_int64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int64x1_t = vreinterpret_s64_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
deleted file mode 100644 (file)
index 5219607..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_p8 (void)
-{
-  int64x1_t out_int64x1_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int64x1_t = vreinterpret_s64_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
deleted file mode 100644 (file)
index cfcbc7d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_s16 (void)
-{
-  int64x1_t out_int64x1_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int64x1_t = vreinterpret_s64_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
deleted file mode 100644 (file)
index 7467413..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_s32 (void)
-{
-  int64x1_t out_int64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x1_t = vreinterpret_s64_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
deleted file mode 100644 (file)
index 5cb98ce..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_s8 (void)
-{
-  int64x1_t out_int64x1_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int64x1_t = vreinterpret_s64_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
deleted file mode 100644 (file)
index 5135100..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u16 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int64x1_t = vreinterpret_s64_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
deleted file mode 100644 (file)
index 1536b5b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u32 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int64x1_t = vreinterpret_s64_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
deleted file mode 100644 (file)
index ae8f710..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u64 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int64x1_t = vreinterpret_s64_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
deleted file mode 100644 (file)
index 86eb6fc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u8 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int64x1_t = vreinterpret_s64_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
deleted file mode 100644 (file)
index f582e5e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_f32 (void)
-{
-  int8x8_t out_int8x8_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int8x8_t = vreinterpret_s8_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
deleted file mode 100644 (file)
index 9959252..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_p16 (void)
-{
-  int8x8_t out_int8x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int8x8_t = vreinterpret_s8_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
deleted file mode 100644 (file)
index c61f6b1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_p64 (void)
-{
-  int8x8_t out_int8x8_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int8x8_t = vreinterpret_s8_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
deleted file mode 100644 (file)
index 4b1d366..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_p8 (void)
-{
-  int8x8_t out_int8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int8x8_t = vreinterpret_s8_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
deleted file mode 100644 (file)
index 3d797d7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_s16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int8x8_t = vreinterpret_s8_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
deleted file mode 100644 (file)
index ab9755b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_s32 (void)
-{
-  int8x8_t out_int8x8_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int8x8_t = vreinterpret_s8_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
deleted file mode 100644 (file)
index 3b56bc6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_s64 (void)
-{
-  int8x8_t out_int8x8_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int8x8_t = vreinterpret_s8_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
deleted file mode 100644 (file)
index 4daf409..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u16 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int8x8_t = vreinterpret_s8_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
deleted file mode 100644 (file)
index 2c10e40..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u32 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int8x8_t = vreinterpret_s8_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
deleted file mode 100644 (file)
index 3395f57..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u64 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int8x8_t = vreinterpret_s8_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
deleted file mode 100644 (file)
index d9b7c58..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u8 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int8x8_t = vreinterpret_s8_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
deleted file mode 100644 (file)
index 761d6cc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_f32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint16x4_t = vreinterpret_u16_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
deleted file mode 100644 (file)
index da0604d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_p16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint16x4_t = vreinterpret_u16_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
deleted file mode 100644 (file)
index d7d6665..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_p64 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint16x4_t = vreinterpret_u16_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
deleted file mode 100644 (file)
index 46c87d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_p8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint16x4_t = vreinterpret_u16_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
deleted file mode 100644 (file)
index 58d4611..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint16x4_t = vreinterpret_u16_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
deleted file mode 100644 (file)
index e833a2c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint16x4_t = vreinterpret_u16_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
deleted file mode 100644 (file)
index 78c964b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s64 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint16x4_t = vreinterpret_u16_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
deleted file mode 100644 (file)
index 862589d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint16x4_t = vreinterpret_u16_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
deleted file mode 100644 (file)
index df8fdbe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_u32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint16x4_t = vreinterpret_u16_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
deleted file mode 100644 (file)
index c9b64f6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_u64 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint16x4_t = vreinterpret_u16_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
deleted file mode 100644 (file)
index 41b9c25..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_u8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x4_t = vreinterpret_u16_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
deleted file mode 100644 (file)
index c8f91b8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_f32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint32x2_t = vreinterpret_u32_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
deleted file mode 100644 (file)
index 8cf8f78..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_p16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint32x2_t = vreinterpret_u32_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
deleted file mode 100644 (file)
index f1303d9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_p64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint32x2_t = vreinterpret_u32_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
deleted file mode 100644 (file)
index 5cf6cb0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_p8 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint32x2_t = vreinterpret_u32_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
deleted file mode 100644 (file)
index 9a968fe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint32x2_t = vreinterpret_u32_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
deleted file mode 100644 (file)
index f9f701f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint32x2_t = vreinterpret_u32_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
deleted file mode 100644 (file)
index 4eee1fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint32x2_t = vreinterpret_u32_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
deleted file mode 100644 (file)
index e6afe8b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s8 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint32x2_t = vreinterpret_u32_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
deleted file mode 100644 (file)
index a2813b0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_u16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x2_t = vreinterpret_u32_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
deleted file mode 100644 (file)
index 8de7e2f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_u64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint32x2_t = vreinterpret_u32_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
deleted file mode 100644 (file)
index df329a8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_u8 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint32x2_t = vreinterpret_u32_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
deleted file mode 100644 (file)
index 1da62f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_f32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint64x1_t = vreinterpret_u64_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
deleted file mode 100644 (file)
index 9de7986..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_p16 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint64x1_t = vreinterpret_u64_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
deleted file mode 100644 (file)
index 86304b1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_p64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint64x1_t = vreinterpret_u64_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
deleted file mode 100644 (file)
index 6a807f1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_p8 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint64x1_t = vreinterpret_u64_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
deleted file mode 100644 (file)
index d752efa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s16 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint64x1_t = vreinterpret_u64_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
deleted file mode 100644 (file)
index 362a83e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint64x1_t = vreinterpret_u64_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
deleted file mode 100644 (file)
index cb19d47..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint64x1_t = vreinterpret_u64_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
deleted file mode 100644 (file)
index d0ff42b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s8 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint64x1_t = vreinterpret_u64_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
deleted file mode 100644 (file)
index 8d00c39..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_u16 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint64x1_t = vreinterpret_u64_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
deleted file mode 100644 (file)
index e0fb4f2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_u32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x1_t = vreinterpret_u64_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
deleted file mode 100644 (file)
index 27cd543..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_u8 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint64x1_t = vreinterpret_u64_u8 (arg0_uint8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
deleted file mode 100644 (file)
index 8b3d207..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_f32 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint8x8_t = vreinterpret_u8_f32 (arg0_float32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
deleted file mode 100644 (file)
index c98b963..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_p16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint8x8_t = vreinterpret_u8_p16 (arg0_poly16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
deleted file mode 100644 (file)
index ecfa9f2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_p64 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint8x8_t = vreinterpret_u8_p64 (arg0_poly64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
deleted file mode 100644 (file)
index a666f3b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_p8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint8x8_t = vreinterpret_u8_p8 (arg0_poly8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
deleted file mode 100644 (file)
index e33579b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint8x8_t = vreinterpret_u8_s16 (arg0_int16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
deleted file mode 100644 (file)
index c572728..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s32 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint8x8_t = vreinterpret_u8_s32 (arg0_int32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
deleted file mode 100644 (file)
index 726b6ab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s64 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint8x8_t = vreinterpret_u8_s64 (arg0_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
deleted file mode 100644 (file)
index df58c0f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint8x8_t = vreinterpret_u8_s8 (arg0_int8x8_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
deleted file mode 100644 (file)
index 00bf9a5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_u16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint8x8_t = vreinterpret_u8_u16 (arg0_uint16x4_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
deleted file mode 100644 (file)
index 8670b08..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_u32 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint8x8_t = vreinterpret_u8_u32 (arg0_uint32x2_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
deleted file mode 100644 (file)
index 509ece7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_u64 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint8x8_t = vreinterpret_u8_u64 (arg0_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
deleted file mode 100644 (file)
index b31084f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vrev16q_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
deleted file mode 100644 (file)
index dfb3531..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrev16q_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
deleted file mode 100644 (file)
index f3b1861..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrev16q_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
deleted file mode 100644 (file)
index 6d76ab0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vrev16_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
deleted file mode 100644 (file)
index f2d79c9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrev16_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
deleted file mode 100644 (file)
index 9e70e66..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrev16_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
deleted file mode 100644 (file)
index 3d24c0a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x8_t = vrev32q_p16 (arg0_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
deleted file mode 100644 (file)
index 50bd272..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vrev32q_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
deleted file mode 100644 (file)
index c65ae15..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vrev32q_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
deleted file mode 100644 (file)
index 80bfddf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrev32q_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
deleted file mode 100644 (file)
index 2974371..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vrev32q_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
deleted file mode 100644 (file)
index 0d0beab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrev32q_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
deleted file mode 100644 (file)
index 65fb8c9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32p16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x4_t = vrev32_p16 (arg0_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
deleted file mode 100644 (file)
index f307819..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vrev32_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
deleted file mode 100644 (file)
index 8f8daa6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32s16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vrev32_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
deleted file mode 100644 (file)
index da69ab4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrev32_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
deleted file mode 100644 (file)
index 6798acf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32u16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vrev32_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
deleted file mode 100644 (file)
index 1dce99d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrev32_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
deleted file mode 100644 (file)
index 2db0016..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrev64q_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
deleted file mode 100644 (file)
index 1dffde9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x8_t = vrev64q_p16 (arg0_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
deleted file mode 100644 (file)
index 37b629b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vrev64q_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
deleted file mode 100644 (file)
index 1e37eb2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vrev64q_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
deleted file mode 100644 (file)
index c71a8b9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vrev64q_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
deleted file mode 100644 (file)
index f6a6b5a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrev64q_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
deleted file mode 100644 (file)
index 94ca3a3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vrev64q_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
deleted file mode 100644 (file)
index 0840b3c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrev64q_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
deleted file mode 100644 (file)
index 11177e3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrev64q_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
deleted file mode 100644 (file)
index d2766d4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64f32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrev64_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
deleted file mode 100644 (file)
index 359ba0c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64p16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x4_t = vrev64_p16 (arg0_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
deleted file mode 100644 (file)
index e4621d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vrev64_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
deleted file mode 100644 (file)
index b6d7545..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64s16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vrev64_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
deleted file mode 100644 (file)
index 8e85e84..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64s32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vrev64_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
deleted file mode 100644 (file)
index 63b9c19..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrev64_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
deleted file mode 100644 (file)
index 250ade5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64u16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vrev64_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
deleted file mode 100644 (file)
index 1028ec5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64u32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrev64_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[   \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
deleted file mode 100644 (file)
index 4145a59..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrev64_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c
deleted file mode 100644 (file)
index 6bec8fe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndaf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndaf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrnda_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrinta\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c
deleted file mode 100644 (file)
index a29a71d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndaq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndaqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndaq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrinta\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndf32.c
deleted file mode 100644 (file)
index fa97603..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrnd_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintz\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c
deleted file mode 100644 (file)
index 2155224..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndmf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndmf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrndm_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintm\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c
deleted file mode 100644 (file)
index 3dc0422..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndmq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndmqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndmq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintm\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c
deleted file mode 100644 (file)
index bd159eb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndnf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndnf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrndn_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintn\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c
deleted file mode 100644 (file)
index 628488f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndnq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndnqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndnq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintn\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c
deleted file mode 100644 (file)
index baa2ca9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndpf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndpf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrndp_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintp\.f32\[  \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c
deleted file mode 100644 (file)
index 5c26956..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndpq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndpqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndpq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintp\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c
deleted file mode 100644 (file)
index 13365c7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndqf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintz\.f32\[  \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
deleted file mode 100644 (file)
index 1ee3793..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrteQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrteQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrsqrteq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.f32\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
deleted file mode 100644 (file)
index db9ab28..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrteQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrteQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrsqrteq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.u32\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
deleted file mode 100644 (file)
index 0abcd7e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrtef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrtef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrsqrte_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.f32\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
deleted file mode 100644 (file)
index f133dc1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrteu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrteu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrsqrte_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.u32\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
deleted file mode 100644 (file)
index 8b141c2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrsqrtsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrtsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vrsqrtsq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrts\.f32\[         \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
deleted file mode 100644 (file)
index c400847..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrsqrtsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrtsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vrsqrts_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrts\.f32\[         \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
deleted file mode 100644 (file)
index b7a5512..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32_t arg0_float32_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vsetq_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
deleted file mode 100644 (file)
index 0469323..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16_t arg0_poly16_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vsetq_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
deleted file mode 100644 (file)
index 90c1c2c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8_t arg0_poly8_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vsetq_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[      \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
deleted file mode 100644 (file)
index 38cdf11..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16_t arg0_int16_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsetq_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
deleted file mode 100644 (file)
index d4edb56..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32_t arg0_int32_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsetq_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
deleted file mode 100644 (file)
index 37bf0b8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64_t arg0_int64_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsetq_lane_s64 (arg0_int64_t, arg1_int64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
deleted file mode 100644 (file)
index 5b46085..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8_t arg0_int8_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsetq_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[      \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
deleted file mode 100644 (file)
index 6ba9251..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16_t arg0_uint16_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsetq_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
deleted file mode 100644 (file)
index 4cb1e9e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32_t arg0_uint32_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsetq_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
deleted file mode 100644 (file)
index 9cf4dc0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64_t arg0_uint64_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsetq_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vmov\[         \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
deleted file mode 100644 (file)
index 0265d0e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8_t arg0_uint8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsetq_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[      \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
deleted file mode 100644 (file)
index 4ce2e44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32_t arg0_float32_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vset_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
deleted file mode 100644 (file)
index 788ddd7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16_t arg0_poly16_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vset_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
deleted file mode 100644 (file)
index 5ea5199..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8_t arg0_poly8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vset_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[      \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
deleted file mode 100644 (file)
index 95a6a90..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16_t arg0_int16_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vset_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
deleted file mode 100644 (file)
index 340412b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32_t arg0_int32_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vset_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
deleted file mode 100644 (file)
index e137338..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vset_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64_t arg0_int64_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
deleted file mode 100644 (file)
index b905d9f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8_t arg0_int8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vset_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[      \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
deleted file mode 100644 (file)
index 1ba3682..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16_t arg0_uint16_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vset_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
deleted file mode 100644 (file)
index 820dd95..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32_t arg0_uint32_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vset_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[     \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
deleted file mode 100644 (file)
index 40c2fad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vset_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
deleted file mode 100644 (file)
index f15725f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8_t arg0_uint8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vset_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[      \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
deleted file mode 100644 (file)
index d184325..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vshlq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
deleted file mode 100644 (file)
index f3f8080..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vshlq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
deleted file mode 100644 (file)
index 7f10e0c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vshlq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
deleted file mode 100644 (file)
index 18656a1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vshlq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
deleted file mode 100644 (file)
index d4f8f5d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vshlq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
deleted file mode 100644 (file)
index 304ece8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vshlq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
deleted file mode 100644 (file)
index 4f3bd4b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vshlq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
deleted file mode 100644 (file)
index 254eb20..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vshlq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
deleted file mode 100644 (file)
index a497786..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
deleted file mode 100644 (file)
index 2fee8ff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
deleted file mode 100644 (file)
index 5565b8d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
deleted file mode 100644 (file)
index f825f29..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
deleted file mode 100644 (file)
index 268d8e4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
deleted file mode 100644 (file)
index 489d6cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
deleted file mode 100644 (file)
index 936824c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
deleted file mode 100644 (file)
index b683eda..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
deleted file mode 100644 (file)
index 75fac2d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vshl_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
deleted file mode 100644 (file)
index 358f6d6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vshl_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
deleted file mode 100644 (file)
index a36aba0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vshl_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
deleted file mode 100644 (file)
index 27454e8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vshl_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
deleted file mode 100644 (file)
index 27745fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vshl_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
deleted file mode 100644 (file)
index feead55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vshl_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
deleted file mode 100644 (file)
index c76fab0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vshl_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
deleted file mode 100644 (file)
index cbf2409..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vshl_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
deleted file mode 100644 (file)
index 2173f83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x4_t = vshll_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
deleted file mode 100644 (file)
index c9e44d0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x2_t = vshll_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
deleted file mode 100644 (file)
index 2c7220a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_ns8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x8_t = vshll_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
deleted file mode 100644 (file)
index 03eea9a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x4_t = vshll_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
deleted file mode 100644 (file)
index 6c162b6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x2_t = vshll_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
deleted file mode 100644 (file)
index 5c1bfcf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_nu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x8_t = vshll_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls16.c b/gcc/testsuite/gcc.target/arm/neon/vshls16.c
deleted file mode 100644 (file)
index b7812ce..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls32.c b/gcc/testsuite/gcc.target/arm/neon/vshls32.c
deleted file mode 100644 (file)
index 1d2b849..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls64.c b/gcc/testsuite/gcc.target/arm/neon/vshls64.c
deleted file mode 100644 (file)
index 02b3c36..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls8.c b/gcc/testsuite/gcc.target/arm/neon/vshls8.c
deleted file mode 100644 (file)
index dfe9db4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
deleted file mode 100644 (file)
index 2ad9a50..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
deleted file mode 100644 (file)
index dfa5524..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
deleted file mode 100644 (file)
index 457ae42..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
deleted file mode 100644 (file)
index 6438ed3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
deleted file mode 100644 (file)
index 499ba2d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vshrq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
deleted file mode 100644 (file)
index 1c5341e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vshrq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
deleted file mode 100644 (file)
index ad72b6a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vshrq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
deleted file mode 100644 (file)
index ba6efab..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vshrq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
deleted file mode 100644 (file)
index 99c566a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vshrq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
deleted file mode 100644 (file)
index 7f51823..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vshrq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
deleted file mode 100644 (file)
index ff5a270..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vshrq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
deleted file mode 100644 (file)
index 5cde269..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vshrq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
deleted file mode 100644 (file)
index b49a0e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vshr_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
deleted file mode 100644 (file)
index a5809bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vshr_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
deleted file mode 100644 (file)
index 5c6f493..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vshr_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
deleted file mode 100644 (file)
index 1fa24b1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vshr_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
deleted file mode 100644 (file)
index 5b8e454..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vshr_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
deleted file mode 100644 (file)
index 28a7695..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vshr_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
deleted file mode 100644 (file)
index 435466b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vshr_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
deleted file mode 100644 (file)
index 8d67a42..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vshr_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
deleted file mode 100644 (file)
index 6dc485d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i16\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
deleted file mode 100644 (file)
index b7c9336..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i32\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
deleted file mode 100644 (file)
index 7d0156a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i64\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
deleted file mode 100644 (file)
index 1c8b720..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i16\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
deleted file mode 100644 (file)
index 6797a96..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i32\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
deleted file mode 100644 (file)
index ee66e03..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i64\[   \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
deleted file mode 100644 (file)
index 19cc7a9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vsliq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
deleted file mode 100644 (file)
index b7ca823..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_np64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vsliq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
deleted file mode 100644 (file)
index 52658e3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vsliq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
deleted file mode 100644 (file)
index 6bf2424..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsliq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
deleted file mode 100644 (file)
index 8b61de4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsliq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
deleted file mode 100644 (file)
index 00a3b1a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsliq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
deleted file mode 100644 (file)
index 7c8cd8d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsliq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
deleted file mode 100644 (file)
index e5df31e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsliq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
deleted file mode 100644 (file)
index 4e18c83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsliq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
deleted file mode 100644 (file)
index cf88f62..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsliq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
deleted file mode 100644 (file)
index 510a992..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsliq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
deleted file mode 100644 (file)
index 0b3015b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vsli_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
deleted file mode 100644 (file)
index c22a201..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsli_np64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vsli_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
deleted file mode 100644 (file)
index 4db6073..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vsli_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
deleted file mode 100644 (file)
index c2e7d7e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsli_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
deleted file mode 100644 (file)
index 11a10d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsli_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
deleted file mode 100644 (file)
index b062ea8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsli_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
deleted file mode 100644 (file)
index d9408ad..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsli_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
deleted file mode 100644 (file)
index 5bfb4b0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsli_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
deleted file mode 100644 (file)
index d91a2bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsli_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
deleted file mode 100644 (file)
index cc27d52..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsli_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
deleted file mode 100644 (file)
index 937dd91..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsli_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
deleted file mode 100644 (file)
index 97e1c4b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
deleted file mode 100644 (file)
index 7d45a3b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
deleted file mode 100644 (file)
index b4069ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
deleted file mode 100644 (file)
index a849cae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
deleted file mode 100644 (file)
index ed25820..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
deleted file mode 100644 (file)
index 1be7cff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
deleted file mode 100644 (file)
index 79c4fac..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
deleted file mode 100644 (file)
index e095fae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
deleted file mode 100644 (file)
index b112bbd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
deleted file mode 100644 (file)
index 9ebcf6b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
deleted file mode 100644 (file)
index 132da31..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
deleted file mode 100644 (file)
index 97f62ae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
deleted file mode 100644 (file)
index 3dcb487..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
deleted file mode 100644 (file)
index 63dea5e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
deleted file mode 100644 (file)
index 2751a68..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u64\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
deleted file mode 100644 (file)
index 49909b6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
deleted file mode 100644 (file)
index 8413d07..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vsriq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
deleted file mode 100644 (file)
index ca3a9f4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_np64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vsriq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
deleted file mode 100644 (file)
index 1683fe6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vsriq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
deleted file mode 100644 (file)
index 8e1bcbb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsriq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
deleted file mode 100644 (file)
index 41c611c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsriq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
deleted file mode 100644 (file)
index 3a8648a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsriq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
deleted file mode 100644 (file)
index 41457da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsriq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
deleted file mode 100644 (file)
index 33f9fa8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsriq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
deleted file mode 100644 (file)
index 951f28f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsriq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
deleted file mode 100644 (file)
index ff8e81c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsriq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
deleted file mode 100644 (file)
index 6cdf11d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsriq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
deleted file mode 100644 (file)
index 9e3fe6b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vsri_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
deleted file mode 100644 (file)
index 0734b12..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsri_np64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vsri_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
deleted file mode 100644 (file)
index fd3d55e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vsri_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
deleted file mode 100644 (file)
index 4631cbf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsri_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
deleted file mode 100644 (file)
index 163a3c3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsri_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
deleted file mode 100644 (file)
index de2b7cb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsri_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
deleted file mode 100644 (file)
index b9d74b2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsri_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
deleted file mode 100644 (file)
index f1a7c6b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsri_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
deleted file mode 100644 (file)
index 9d67c31..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsri_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
deleted file mode 100644 (file)
index 4a9da82..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsri_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
deleted file mode 100644 (file)
index 2536746..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsri_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
deleted file mode 100644 (file)
index a05612b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4_t arg1_float32x4_t;
-
-  vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
deleted file mode 100644 (file)
index 7b74781..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
deleted file mode 100644 (file)
index 08060d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanep64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  vst1q_lane_p64 (arg0_poly64_t, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
deleted file mode 100644 (file)
index 40181c6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
deleted file mode 100644 (file)
index a4d7d35..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8_t arg1_int16x8_t;
-
-  vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
deleted file mode 100644 (file)
index e0d8ec0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4_t arg1_int32x4_t;
-
-  vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
deleted file mode 100644 (file)
index 6b82ff4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x2_t arg1_int64x2_t;
-
-  vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
deleted file mode 100644 (file)
index 7266890..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16_t arg1_int8x16_t;
-
-  vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
deleted file mode 100644 (file)
index 1281976..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
deleted file mode 100644 (file)
index 79b7cbc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c
deleted file mode 100644 (file)
index 5f4c927..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/* Test the `vst1Q_laneu64' ARM Neon intrinsic.  */
-
-/* Detect ICE in the case of unaligned memory address.  */
-
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-unsigned char dummy_store[1000];
-
-void
-foo (char* addr)
-{
-  uint8x16_t vdata = vld1q_u8 (addr);
-  vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0);
-}
-
-uint64_t
-bar (uint64x2_t vdata)
-{
-  vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0);
-  return vgetq_lane_u64 (vdata, 0);
-}

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
deleted file mode 100644 (file)
index 84d6250..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
deleted file mode 100644 (file)
index 578a2f5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
deleted file mode 100644 (file)
index 1d13c92..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4_t arg1_float32x4_t;
-
-  vst1q_f32 (arg0_float32_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
deleted file mode 100644 (file)
index 281d8da..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
deleted file mode 100644 (file)
index 8a4de71..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1Qp64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  vst1q_p64 (arg0_poly64_t, arg1_poly64x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
deleted file mode 100644 (file)
index f1e39ec..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
deleted file mode 100644 (file)
index 73c1e29..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8_t arg1_int16x8_t;
-
-  vst1q_s16 (arg0_int16_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
deleted file mode 100644 (file)
index 8c7c345..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4_t arg1_int32x4_t;
-
-  vst1q_s32 (arg0_int32_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
deleted file mode 100644 (file)
index ec09003..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x2_t arg1_int64x2_t;
-
-  vst1q_s64 (arg0_int64_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
deleted file mode 100644 (file)
index 5a2d815..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16_t arg1_int8x16_t;
-
-  vst1q_s8 (arg0_int8_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
deleted file mode 100644 (file)
index a129e66..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
deleted file mode 100644 (file)
index e79ab86..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
deleted file mode 100644 (file)
index c7c088c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
deleted file mode 100644 (file)
index b9159a5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
deleted file mode 100644 (file)
index edbfe1b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2_t arg1_float32x2_t;
-
-  vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
deleted file mode 100644 (file)
index d02a234..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
deleted file mode 100644 (file)
index 74e4519..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanep64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  vst1_lane_p64 (arg0_poly64_t, arg1_poly64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
deleted file mode 100644 (file)
index e161933..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
deleted file mode 100644 (file)
index d12acba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4_t arg1_int16x4_t;
-
-  vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
deleted file mode 100644 (file)
index 5bec595..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2_t arg1_int32x2_t;
-
-  vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
deleted file mode 100644 (file)
index acefe71..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1_t arg1_int64x1_t;
-
-  vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
deleted file mode 100644 (file)
index d0557ea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8_t arg1_int8x8_t;
-
-  vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
deleted file mode 100644 (file)
index 39357ea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
deleted file mode 100644 (file)
index 8ae372b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
deleted file mode 100644 (file)
index 5620876..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
deleted file mode 100644 (file)
index 0a1f252..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
deleted file mode 100644 (file)
index 8b9f3f7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2_t arg1_float32x2_t;
-
-  vst1_f32 (arg0_float32_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
deleted file mode 100644 (file)
index 4d7b2fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  vst1_p16 (arg0_poly16_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c b/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
deleted file mode 100644 (file)
index 9fa82b1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  vst1_p64 (arg0_poly64_t, arg1_poly64x1_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
deleted file mode 100644 (file)
index b629bfc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  vst1_p8 (arg0_poly8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
deleted file mode 100644 (file)
index 554763b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4_t arg1_int16x4_t;
-
-  vst1_s16 (arg0_int16_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
deleted file mode 100644 (file)
index 3261420..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2_t arg1_int32x2_t;
-
-  vst1_s32 (arg0_int32_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
deleted file mode 100644 (file)
index 2dcaf33..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1_t arg1_int64x1_t;
-
-  vst1_s64 (arg0_int64_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
deleted file mode 100644 (file)
index f0820f7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8_t arg1_int8x8_t;
-
-  vst1_s8 (arg0_int8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
deleted file mode 100644 (file)
index e278f56..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  vst1_u16 (arg0_uint16_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
deleted file mode 100644 (file)
index 29d5ef2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  vst1_u32 (arg0_uint32_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
deleted file mode 100644 (file)
index cde780f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  vst1_u64 (arg0_uint64_t, arg1_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
deleted file mode 100644 (file)
index 897b257..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  vst1_u8 (arg0_uint8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
deleted file mode 100644 (file)
index b99545e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x2_t arg1_float32x4x2_t;
-
-  vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
deleted file mode 100644 (file)
index a252e91..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x2_t arg1_poly16x8x2_t;
-
-  vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
deleted file mode 100644 (file)
index 19ecbd1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x2_t arg1_int16x8x2_t;
-
-  vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
deleted file mode 100644 (file)
index 6a7d4f2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x2_t arg1_int32x4x2_t;
-
-  vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
deleted file mode 100644 (file)
index 8559b6a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x2_t arg1_uint16x8x2_t;
-
-  vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
deleted file mode 100644 (file)
index 016eaee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x2_t arg1_uint32x4x2_t;
-
-  vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
deleted file mode 100644 (file)
index 1717a3a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x2_t arg1_float32x4x2_t;
-
-  vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
deleted file mode 100644 (file)
index 2ab88bf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x2_t arg1_poly16x8x2_t;
-
-  vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
deleted file mode 100644 (file)
index feab950..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16x2_t arg1_poly8x16x2_t;
-
-  vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
deleted file mode 100644 (file)
index 294cb21..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x2_t arg1_int16x8x2_t;
-
-  vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
deleted file mode 100644 (file)
index 9c1bb52..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x2_t arg1_int32x4x2_t;
-
-  vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
deleted file mode 100644 (file)
index d473ed2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16x2_t arg1_int8x16x2_t;
-
-  vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
deleted file mode 100644 (file)
index d74e55d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x2_t arg1_uint16x8x2_t;
-
-  vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
deleted file mode 100644 (file)
index d669db2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x2_t arg1_uint32x4x2_t;
-
-  vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
deleted file mode 100644 (file)
index 82065a0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16x2_t arg1_uint8x16x2_t;
-
-  vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
deleted file mode 100644 (file)
index 69d381c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x2_t arg1_float32x2x2_t;
-
-  vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
deleted file mode 100644 (file)
index 83fc0fc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x2_t arg1_poly16x4x2_t;
-
-  vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
deleted file mode 100644 (file)
index ec22388..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-
-  vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
deleted file mode 100644 (file)
index 881fbdd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x2_t arg1_int16x4x2_t;
-
-  vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
deleted file mode 100644 (file)
index bc928e6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x2_t arg1_int32x2x2_t;
-
-  vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
deleted file mode 100644 (file)
index 0a05595..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x2_t arg1_int8x8x2_t;
-
-  vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
deleted file mode 100644 (file)
index b1af8ef..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x2_t arg1_uint16x4x2_t;
-
-  vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
deleted file mode 100644 (file)
index ed03bb4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x2_t arg1_uint32x2x2_t;
-
-  vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
deleted file mode 100644 (file)
index c6c9e14..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-
-  vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
deleted file mode 100644 (file)
index e96f78a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x2_t arg1_float32x2x2_t;
-
-  vst2_f32 (arg0_float32_t, arg1_float32x2x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
deleted file mode 100644 (file)
index b5af7c6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x2_t arg1_poly16x4x2_t;
-
-  vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c b/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
deleted file mode 100644 (file)
index adb0f70..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst2p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1x2_t arg1_poly64x1x2_t;
-
-  vst2_p64 (arg0_poly64_t, arg1_poly64x1x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
deleted file mode 100644 (file)
index 5dee019..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-
-  vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
deleted file mode 100644 (file)
index f640c13..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x2_t arg1_int16x4x2_t;
-
-  vst2_s16 (arg0_int16_t, arg1_int16x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
deleted file mode 100644 (file)
index b2f6ea1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x2_t arg1_int32x2x2_t;
-
-  vst2_s32 (arg0_int32_t, arg1_int32x2x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
deleted file mode 100644 (file)
index c88de13..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1x2_t arg1_int64x1x2_t;
-
-  vst2_s64 (arg0_int64_t, arg1_int64x1x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
deleted file mode 100644 (file)
index 8b7b28d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x2_t arg1_int8x8x2_t;
-
-  vst2_s8 (arg0_int8_t, arg1_int8x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
deleted file mode 100644 (file)
index 9a93b6d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x2_t arg1_uint16x4x2_t;
-
-  vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
deleted file mode 100644 (file)
index 1c8a79d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x2_t arg1_uint32x2x2_t;
-
-  vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
deleted file mode 100644 (file)
index 7f1539f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1x2_t arg1_uint64x1x2_t;
-
-  vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
deleted file mode 100644 (file)
index e076239..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-
-  vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
deleted file mode 100644 (file)
index 1bd77cc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x3_t arg1_float32x4x3_t;
-
-  vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
deleted file mode 100644 (file)
index 4626631..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x3_t arg1_poly16x8x3_t;
-
-  vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
deleted file mode 100644 (file)
index 92c46b1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x3_t arg1_int16x8x3_t;
-
-  vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
deleted file mode 100644 (file)
index 55190b3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x3_t arg1_int32x4x3_t;
-
-  vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
deleted file mode 100644 (file)
index f7a455b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x3_t arg1_uint16x8x3_t;
-
-  vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
deleted file mode 100644 (file)
index c91ca46..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x3_t arg1_uint32x4x3_t;
-
-  vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
deleted file mode 100644 (file)
index 2b70996..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x3_t arg1_float32x4x3_t;
-
-  vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
deleted file mode 100644 (file)
index 969120f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x3_t arg1_poly16x8x3_t;
-
-  vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
deleted file mode 100644 (file)
index 6f89617..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16x3_t arg1_poly8x16x3_t;
-
-  vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
deleted file mode 100644 (file)
index 872c203..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x3_t arg1_int16x8x3_t;
-
-  vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
deleted file mode 100644 (file)
index 4040809..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x3_t arg1_int32x4x3_t;
-
-  vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
deleted file mode 100644 (file)
index ff0d713..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16x3_t arg1_int8x16x3_t;
-
-  vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
deleted file mode 100644 (file)
index 4e45ec9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x3_t arg1_uint16x8x3_t;
-
-  vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
deleted file mode 100644 (file)
index b1bbdc1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x3_t arg1_uint32x4x3_t;
-
-  vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
deleted file mode 100644 (file)
index ccd3b05..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16x3_t arg1_uint8x16x3_t;
-
-  vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
deleted file mode 100644 (file)
index 820f196..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x3_t arg1_float32x2x3_t;
-
-  vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
deleted file mode 100644 (file)
index c7db5b6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x3_t arg1_poly16x4x3_t;
-
-  vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
deleted file mode 100644 (file)
index 5732440..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-
-  vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
deleted file mode 100644 (file)
index 364f1c4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x3_t arg1_int16x4x3_t;
-
-  vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
deleted file mode 100644 (file)
index d48c582..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x3_t arg1_int32x2x3_t;
-
-  vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
deleted file mode 100644 (file)
index 9bee542..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x3_t arg1_int8x8x3_t;
-
-  vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
deleted file mode 100644 (file)
index c5460d2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x3_t arg1_uint16x4x3_t;
-
-  vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
deleted file mode 100644 (file)
index 1180d1d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x3_t arg1_uint32x2x3_t;
-
-  vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
deleted file mode 100644 (file)
index 006877f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-
-  vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
deleted file mode 100644 (file)
index dcca538..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x3_t arg1_float32x2x3_t;
-
-  vst3_f32 (arg0_float32_t, arg1_float32x2x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
deleted file mode 100644 (file)
index 769bddb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x3_t arg1_poly16x4x3_t;
-
-  vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c b/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
deleted file mode 100644 (file)
index d0f249c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst3p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1x3_t arg1_poly64x1x3_t;
-
-  vst3_p64 (arg0_poly64_t, arg1_poly64x1x3_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
deleted file mode 100644 (file)
index cfdb74c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-
-  vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
deleted file mode 100644 (file)
index e4e0303..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x3_t arg1_int16x4x3_t;
-
-  vst3_s16 (arg0_int16_t, arg1_int16x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
deleted file mode 100644 (file)
index 11389c5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x3_t arg1_int32x2x3_t;
-
-  vst3_s32 (arg0_int32_t, arg1_int32x2x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
deleted file mode 100644 (file)
index 79b5fca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1x3_t arg1_int64x1x3_t;
-
-  vst3_s64 (arg0_int64_t, arg1_int64x1x3_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
deleted file mode 100644 (file)
index 7943f53..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x3_t arg1_int8x8x3_t;
-
-  vst3_s8 (arg0_int8_t, arg1_int8x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
deleted file mode 100644 (file)
index 73a0fa0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x3_t arg1_uint16x4x3_t;
-
-  vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
deleted file mode 100644 (file)
index 902099b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x3_t arg1_uint32x2x3_t;
-
-  vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
deleted file mode 100644 (file)
index 49cbd32..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1x3_t arg1_uint64x1x3_t;
-
-  vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
deleted file mode 100644 (file)
index 2903877..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-
-  vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
deleted file mode 100644 (file)
index 40ef724..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x4_t arg1_float32x4x4_t;
-
-  vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
deleted file mode 100644 (file)
index 374dcf1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x4_t arg1_poly16x8x4_t;
-
-  vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
deleted file mode 100644 (file)
index 2867706..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x4_t arg1_int16x8x4_t;
-
-  vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
deleted file mode 100644 (file)
index 375535d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x4_t arg1_int32x4x4_t;
-
-  vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
deleted file mode 100644 (file)
index 147a62a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x4_t arg1_uint16x8x4_t;
-
-  vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
deleted file mode 100644 (file)
index 7974114..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x4_t arg1_uint32x4x4_t;
-
-  vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
deleted file mode 100644 (file)
index 77f1a52..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x4_t arg1_float32x4x4_t;
-
-  vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
deleted file mode 100644 (file)
index 20c8a4c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x4_t arg1_poly16x8x4_t;
-
-  vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
deleted file mode 100644 (file)
index ac01896..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16x4_t arg1_poly8x16x4_t;
-
-  vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
deleted file mode 100644 (file)
index 43a3d64..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x4_t arg1_int16x8x4_t;
-
-  vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
deleted file mode 100644 (file)
index 1603e94..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x4_t arg1_int32x4x4_t;
-
-  vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
deleted file mode 100644 (file)
index b5fe672..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16x4_t arg1_int8x16x4_t;
-
-  vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
deleted file mode 100644 (file)
index d5edab6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x4_t arg1_uint16x8x4_t;
-
-  vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
deleted file mode 100644 (file)
index c47da4f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x4_t arg1_uint32x4x4_t;
-
-  vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
deleted file mode 100644 (file)
index 4ee3460..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16x4_t arg1_uint8x16x4_t;
-
-  vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
deleted file mode 100644 (file)
index 15fb232..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x4_t arg1_float32x2x4_t;
-
-  vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
deleted file mode 100644 (file)
index 2c6d372..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x4_t arg1_poly16x4x4_t;
-
-  vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
deleted file mode 100644 (file)
index 088dec9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-
-  vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
deleted file mode 100644 (file)
index c5d5868..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x4_t arg1_int16x4x4_t;
-
-  vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
deleted file mode 100644 (file)
index 7a2655d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x4_t arg1_int32x2x4_t;
-
-  vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
deleted file mode 100644 (file)
index 1094044..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x4_t arg1_int8x8x4_t;
-
-  vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
deleted file mode 100644 (file)
index 8597c41..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x4_t arg1_uint16x4x4_t;
-
-  vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
deleted file mode 100644 (file)
index e911fff..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x4_t arg1_uint32x2x4_t;
-
-  vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
deleted file mode 100644 (file)
index 0f8c131..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-
-  vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
deleted file mode 100644 (file)
index bf061b4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x4_t arg1_float32x2x4_t;
-
-  vst4_f32 (arg0_float32_t, arg1_float32x2x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
deleted file mode 100644 (file)
index 0877c3a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x4_t arg1_poly16x4x4_t;
-
-  vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c b/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
deleted file mode 100644 (file)
index 020bb42..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst4p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1x4_t arg1_poly64x1x4_t;
-
-  vst4_p64 (arg0_poly64_t, arg1_poly64x1x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
deleted file mode 100644 (file)
index 371705e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-
-  vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
deleted file mode 100644 (file)
index 112073c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x4_t arg1_int16x4x4_t;
-
-  vst4_s16 (arg0_int16_t, arg1_int16x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
deleted file mode 100644 (file)
index 4e2cbf2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x4_t arg1_int32x2x4_t;
-
-  vst4_s32 (arg0_int32_t, arg1_int32x2x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
deleted file mode 100644 (file)
index b1a839a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1x4_t arg1_int64x1x4_t;
-
-  vst4_s64 (arg0_int64_t, arg1_int64x1x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
deleted file mode 100644 (file)
index 9d02dba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x4_t arg1_int8x8x4_t;
-
-  vst4_s8 (arg0_int8_t, arg1_int8x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
deleted file mode 100644 (file)
index 434aacb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x4_t arg1_uint16x4x4_t;
-
-  vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
deleted file mode 100644 (file)
index 4e234d7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x4_t arg1_uint32x2x4_t;
-
-  vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
deleted file mode 100644 (file)
index 225fe7d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1x4_t arg1_uint64x1x4_t;
-
-  vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
deleted file mode 100644 (file)
index e19cb6d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-
-  vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
deleted file mode 100644 (file)
index 903b43c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vsubq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.f32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
deleted file mode 100644 (file)
index 553c9a9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
deleted file mode 100644 (file)
index c59d4a0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
deleted file mode 100644 (file)
index c2034c1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsubq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
deleted file mode 100644 (file)
index 2b08427..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
deleted file mode 100644 (file)
index e15ecae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
deleted file mode 100644 (file)
index 3836901..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
deleted file mode 100644 (file)
index e403652..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i64\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
deleted file mode 100644 (file)
index 4290f48..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubf32.c b/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
deleted file mode 100644 (file)
index 4f2f3be..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vsub_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.f32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
deleted file mode 100644 (file)
index 2721297..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
deleted file mode 100644 (file)
index 40d4ffd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
deleted file mode 100644 (file)
index de5b431..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
deleted file mode 100644 (file)
index 86ca09a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i16\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
deleted file mode 100644 (file)
index 7b99f51..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i32\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
deleted file mode 100644 (file)
index 0198b1e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i64\[  \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls16.c b/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
deleted file mode 100644 (file)
index 754d1d1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vsubl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.s16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls32.c b/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
deleted file mode 100644 (file)
index 183e61f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vsubl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.s32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls8.c b/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
deleted file mode 100644 (file)
index 1f9e939..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vsubl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.s8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu16.c b/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
deleted file mode 100644 (file)
index 51afdb4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsublu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsublu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vsubl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu32.c b/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
deleted file mode 100644 (file)
index 459f31a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsublu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsublu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vsubl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu8.c b/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
deleted file mode 100644 (file)
index 5db4319..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsublu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsublu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vsubl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
deleted file mode 100644 (file)
index 89618e8..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
deleted file mode 100644 (file)
index bbe713c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
deleted file mode 100644 (file)
index 46694c9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vsubs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
deleted file mode 100644 (file)
index 75d990f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
deleted file mode 100644 (file)
index 2262e39..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
deleted file mode 100644 (file)
index 4b651ba..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
deleted file mode 100644 (file)
index 55581f1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vsubu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
deleted file mode 100644 (file)
index e293de2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws16.c b/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
deleted file mode 100644 (file)
index 8eab8af..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubws16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubws16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vsubw_s16 (arg0_int32x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.s16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws32.c b/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
deleted file mode 100644 (file)
index 514ec75..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubws32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubws32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vsubw_s32 (arg0_int64x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.s32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws8.c b/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
deleted file mode 100644 (file)
index 86a0ecf..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubws8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubws8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vsubw_s8 (arg0_int16x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.s8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
deleted file mode 100644 (file)
index 7c48f40..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubwu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubwu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vsubw_u16 (arg0_uint32x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.u16\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
deleted file mode 100644 (file)
index 3137ec6..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubwu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubwu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vsubw_u32 (arg0_uint64x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.u32\[   \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
deleted file mode 100644 (file)
index 7e40d00..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubwu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubwu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vsubw_u8 (arg0_uint16x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.u8\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
deleted file mode 100644 (file)
index 52127ae..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl1p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl1_p8 (arg0_poly8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
deleted file mode 100644 (file)
index a155244..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl1s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl1_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
deleted file mode 100644 (file)
index 5a71ed7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl1u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl1_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
deleted file mode 100644 (file)
index e367dbe..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl2p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8x2_t arg0_poly8x8x2_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl2_p8 (arg0_poly8x8x2_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
deleted file mode 100644 (file)
index 5cf2224..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl2s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8x2_t arg0_int8x8x2_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl2_s8 (arg0_int8x8x2_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
deleted file mode 100644 (file)
index 680e930..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl2u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8x2_t arg0_uint8x8x2_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl2_u8 (arg0_uint8x8x2_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
deleted file mode 100644 (file)
index 2a534d0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl3p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8x3_t arg0_poly8x8x3_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl3_p8 (arg0_poly8x8x3_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
deleted file mode 100644 (file)
index aaa9136..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl3s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8x3_t arg0_int8x8x3_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl3_s8 (arg0_int8x8x3_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
deleted file mode 100644 (file)
index 7edd405..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl3u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8x3_t arg0_uint8x8x3_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl3_u8 (arg0_uint8x8x3_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
deleted file mode 100644 (file)
index e1469fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl4p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8x4_t arg0_poly8x8x4_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl4_p8 (arg0_poly8x8x4_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
deleted file mode 100644 (file)
index 5bb966b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl4s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8x4_t arg0_int8x8x4_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl4_s8 (arg0_int8x8x4_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
deleted file mode 100644 (file)
index 6b3d914..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl4u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8x4_t arg0_uint8x8x4_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl4_u8 (arg0_uint8x8x4_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
deleted file mode 100644 (file)
index abac252..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx1p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx1_p8 (arg0_poly8x8_t, arg1_poly8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
deleted file mode 100644 (file)
index 93ee371..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx1s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx1_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
deleted file mode 100644 (file)
index 91e52a2..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx1u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx1_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[    \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
deleted file mode 100644 (file)
index 65b0435..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx2p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx2_p8 (arg0_poly8x8_t, arg1_poly8x8x2_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
deleted file mode 100644 (file)
index 7209bea..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx2s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8x2_t arg1_int8x8x2_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx2_s8 (arg0_int8x8_t, arg1_int8x8x2_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
deleted file mode 100644 (file)
index 12f86b1..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx2u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx2_u8 (arg0_uint8x8_t, arg1_uint8x8x2_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
deleted file mode 100644 (file)
index 4acbb55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx3p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx3_p8 (arg0_poly8x8_t, arg1_poly8x8x3_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
deleted file mode 100644 (file)
index b7f7b7a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx3s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8x3_t arg1_int8x8x3_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx3_s8 (arg0_int8x8_t, arg1_int8x8x3_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
deleted file mode 100644 (file)
index 57f8d64..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx3u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx3_u8 (arg0_uint8x8_t, arg1_uint8x8x3_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
deleted file mode 100644 (file)
index 0880c17..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx4p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx4_p8 (arg0_poly8x8_t, arg1_poly8x8x4_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
deleted file mode 100644 (file)
index 9f24dee..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx4s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8x4_t arg1_int8x8x4_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx4_s8 (arg0_int8x8_t, arg1_int8x8x4_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
deleted file mode 100644 (file)
index 4c15ffa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx4u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx4_u8 (arg0_uint8x8_t, arg1_uint8x8x4_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[      \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
deleted file mode 100644 (file)
index 5098097..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4x2_t = vtrnq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
deleted file mode 100644 (file)
index 6ae7f5a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8x2_t = vtrnq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
deleted file mode 100644 (file)
index 2c0951a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16x2_t = vtrnq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
deleted file mode 100644 (file)
index e9359f3..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8x2_t = vtrnq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
deleted file mode 100644 (file)
index f19a386..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4x2_t = vtrnq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
deleted file mode 100644 (file)
index c5fba76..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16x2_t = vtrnq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
deleted file mode 100644 (file)
index 4efaef0..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8x2_t = vtrnq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
deleted file mode 100644 (file)
index 4df963d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4x2_t = vtrnq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
deleted file mode 100644 (file)
index db21e83..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16x2_t = vtrnq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
deleted file mode 100644 (file)
index 5f25d37..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2x2_t = vtrn_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
deleted file mode 100644 (file)
index a5d63f9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4x2_t = vtrn_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
deleted file mode 100644 (file)
index 3d5ec4b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8x2_t = vtrn_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns16.c b/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
deleted file mode 100644 (file)
index c37f4fa..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrns16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4x2_t = vtrn_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns32.c b/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
deleted file mode 100644 (file)
index 707459f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrns32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2x2_t = vtrn_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns8.c b/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
deleted file mode 100644 (file)
index cfad251..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrns8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8x2_t = vtrn_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
deleted file mode 100644 (file)
index 8add51b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4x2_t = vtrn_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
deleted file mode 100644 (file)
index de9fc55..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2x2_t = vtrn_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
deleted file mode 100644 (file)
index 5dc63e7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8x2_t = vtrn_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
deleted file mode 100644 (file)
index 97ef650..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQp8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_uint8x16_t = vtstq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
deleted file mode 100644 (file)
index d8d6881..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vtstq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
deleted file mode 100644 (file)
index c9c212e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vtstq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
deleted file mode 100644 (file)
index a0f791d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vtstq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
deleted file mode 100644 (file)
index e1f3adc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vtstq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
deleted file mode 100644 (file)
index 215be3a..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vtstq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
deleted file mode 100644 (file)
index 74a5e59..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vtstq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstp8.c b/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
deleted file mode 100644 (file)
index e23b719..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstp8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_uint8x8_t = vtst_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts16.c b/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
deleted file mode 100644 (file)
index 2cac731..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtsts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtsts16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vtst_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts32.c b/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
deleted file mode 100644 (file)
index c932fbd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtsts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtsts32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vtst_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts8.c b/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
deleted file mode 100644 (file)
index a5acd67..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtsts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtsts8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vtst_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu16.c b/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
deleted file mode 100644 (file)
index 7869c08..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vtst_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu32.c b/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
deleted file mode 100644 (file)
index ca4b5ca..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vtst_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu8.c b/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
deleted file mode 100644 (file)
index be18756..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtst_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
deleted file mode 100644 (file)
index 4ea4c37..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4x2_t = vuzpq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
deleted file mode 100644 (file)
index b93fc3e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8x2_t = vuzpq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
deleted file mode 100644 (file)
index 2ac259b..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16x2_t = vuzpq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
deleted file mode 100644 (file)
index 81a69b7..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8x2_t = vuzpq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
deleted file mode 100644 (file)
index 173c30d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4x2_t = vuzpq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
deleted file mode 100644 (file)
index 0195009..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16x2_t = vuzpq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
deleted file mode 100644 (file)
index e004a3f..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8x2_t = vuzpq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
deleted file mode 100644 (file)
index ed64aa9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4x2_t = vuzpq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
deleted file mode 100644 (file)
index b512247..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16x2_t = vuzpq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
deleted file mode 100644 (file)
index 067f43e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2x2_t = vuzp_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
deleted file mode 100644 (file)
index 01f3c17..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4x2_t = vuzp_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
deleted file mode 100644 (file)
index b90b421..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8x2_t = vuzp_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps16.c b/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
deleted file mode 100644 (file)
index 9f69fa9..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzps16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzps16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4x2_t = vuzp_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps32.c b/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
deleted file mode 100644 (file)
index 3cc32cd..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzps32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzps32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2x2_t = vuzp_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps8.c b/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
deleted file mode 100644 (file)
index 4a32e54..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzps8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzps8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8x2_t = vuzp_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
deleted file mode 100644 (file)
index c9e976d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4x2_t = vuzp_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
deleted file mode 100644 (file)
index 0998a8c..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2x2_t = vuzp_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
deleted file mode 100644 (file)
index 916c164..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8x2_t = vuzp_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
deleted file mode 100644 (file)
index 239e91d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4x2_t = vzipq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
deleted file mode 100644 (file)
index 0687a8e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8x2_t = vzipq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
deleted file mode 100644 (file)
index ff78c69..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16x2_t = vzipq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
deleted file mode 100644 (file)
index 079e23e..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8x2_t = vzipq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
deleted file mode 100644 (file)
index 842bf06..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4x2_t = vzipq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
deleted file mode 100644 (file)
index fa9bc90..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16x2_t = vzipq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
deleted file mode 100644 (file)
index 1295832..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8x2_t = vzipq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
deleted file mode 100644 (file)
index af18fb5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4x2_t = vzipq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.32\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
deleted file mode 100644 (file)
index fd72ce4..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16x2_t = vzipq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipf32.c b/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
deleted file mode 100644 (file)
index 72fc156..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2x2_t = vzip_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipp16.c b/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
deleted file mode 100644 (file)
index fda2705..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4x2_t = vzip_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipp8.c b/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
deleted file mode 100644 (file)
index 14a2af5..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8x2_t = vzip_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips16.c b/gcc/testsuite/gcc.target/arm/neon/vzips16.c
deleted file mode 100644 (file)
index b47c3bb..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzips16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzips16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzips16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4x2_t = vzip_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips32.c b/gcc/testsuite/gcc.target/arm/neon/vzips32.c
deleted file mode 100644 (file)
index 8bb064d..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzips32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzips32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzips32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2x2_t = vzip_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips8.c b/gcc/testsuite/gcc.target/arm/neon/vzips8.c
deleted file mode 100644 (file)
index 4e20646..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzips8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzips8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzips8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8x2_t = vzip_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu16.c b/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
deleted file mode 100644 (file)
index ce8fe44..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4x2_t = vzip_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu32.c b/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
deleted file mode 100644 (file)
index 7667efc..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2x2_t = vzip_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu8.c b/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
deleted file mode 100644 (file)
index 1229103..0000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8x2_t = vzip_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/polytypes.c b/gcc/testsuite/gcc.target/arm/polytypes.c
new file mode 100644 (file)
index 0000000..f91f800
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/polytypes.c
@@ -0,0 +1,48 @@
+/* Check that NEON polynomial vector types are suitably incompatible with
+   integer vector types of the same layout.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-add-options arm_neon } */
+
+#include <arm_neon.h>
+
+void s64_8 (int8x8_t a) {}
+void u64_8 (uint8x8_t a) {}
+void p64_8 (poly8x8_t a) {}
+void s64_16 (int16x4_t a) {}
+void u64_16 (uint16x4_t a) {}
+void p64_16 (poly16x4_t a) {}
+
+void s128_8 (int8x16_t a) {}
+void u128_8 (uint8x16_t a) {}
+void p128_8 (poly8x16_t a) {}
+void s128_16 (int16x8_t a) {}
+void u128_16 (uint16x8_t a) {}
+void p128_16 (poly16x8_t a) {}
+
+void foo ()
+{
+  poly8x8_t v64_8;
+  poly16x4_t v64_16;
+  poly8x16_t v128_8;
+  poly16x8_t v128_16;
+
+  s64_8 (v64_8); /* { dg-message "use -flax-vector-conversions" } */
+  /* { dg-error "incompatible type for argument 1 of 's64_8'" "" { target *-*-* } 31 } */
+  u64_8 (v64_8); /* { dg-error "incompatible type for argument 1 of 'u64_8'" } */
+  p64_8 (v64_8);
+
+  s64_16 (v64_16); /* { dg-error "incompatible type for argument 1 of 's64_16'" } */
+  u64_16 (v64_16); /* { dg-error "incompatible type for argument 1 of 'u64_16'" } */
+  p64_16 (v64_16);
+
+  s128_8 (v128_8); /* { dg-error "incompatible type for argument 1 of 's128_8'" } */
+  u128_8 (v128_8); /* { dg-error "incompatible type for argument 1 of 'u128_8'" } */
+  p128_8 (v128_8);
+
+  s128_16 (v128_16); /* { dg-error "incompatible type for argument 1 of 's128_16'" } */
+  u128_16 (v128_16); /* { dg-error "incompatible type for argument 1 of 'u128_16'" } */
+  p128_16 (v128_16);
+}
+/* { dg-message "note: expected '\[^'\n\]*' but argument is of type '\[^'\n\]*'" "note: expected" { target *-*-* } 0 } */

diff --git a/gcc/testsuite/gcc.target/arm/pr51534.c b/gcc/testsuite/gcc.target/arm/pr51534.c
new file mode 100644 (file)
index 0000000..f675a44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr51534.c
@@ -0,0 +1,83 @@
+/* Test the vector comparison intrinsics when comparing to immediate zero.
+   */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-save-temps -mfloat-abi=hard -O3" } */
+/* { dg-add-options arm_neon } */
+
+#include <arm_neon.h>
+
+#define GEN_TEST(T, D, C, R) \
+  R test_##C##_##T (T a) { return C (a, D (0)); }
+
+#define GEN_DOUBLE_TESTS(S, T, C) \
+  GEN_TEST (T, vdup_n_s##S, C##_s##S, u##T) \
+  GEN_TEST (u##T, vdup_n_u##S, C##_u##S, u##T) 
+
+#define GEN_QUAD_TESTS(S, T, C) \
+  GEN_TEST (T, vdupq_n_s##S, C##q_s##S, u##T) \
+  GEN_TEST (u##T, vdupq_n_u##S, C##q_u##S, u##T) 
+
+#define GEN_COND_TESTS(C) \
+  GEN_DOUBLE_TESTS (8, int8x8_t, C) \
+  GEN_DOUBLE_TESTS (16, int16x4_t, C) \
+  GEN_DOUBLE_TESTS (32, int32x2_t, C) \
+  GEN_QUAD_TESTS (8, int8x16_t, C) \
+  GEN_QUAD_TESTS (16, int16x8_t, C) \
+  GEN_QUAD_TESTS (32, int32x4_t, C)
+
+GEN_COND_TESTS(vcgt)
+GEN_COND_TESTS(vcge)
+GEN_COND_TESTS(vclt)
+GEN_COND_TESTS(vcle)
+GEN_COND_TESTS(vceq)
+
+/* Scan for expected outputs.  */
+/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcgt\.u8\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcgt\.u16\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcgt\.u32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcgt\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcgt\.u8\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcgt\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcgt\.u16\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcgt\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcgt\.u32\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcge\.u8\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcge\.u16\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcge\.u32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcge\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcge\.u8\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcge\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcge\.u16\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vcge\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vcge\.u32\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler "vclt\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vclt\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vclt\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vclt\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vclt\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vclt\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vcle\.s8\[     \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vcle\.s16\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vcle\.s32\[    \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vcle\.s8\[     \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vcle\.s16\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler "vcle\.s32\[    \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+/* { dg-final { scan-assembler-times "vceq\.i8\[       \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
+/* { dg-final { scan-assembler-times "vceq\.i16\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
+/* { dg-final { scan-assembler-times "vceq\.i32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
+/* { dg-final { scan-assembler-times "vceq\.i8\[       \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" 2 } } */
+/* { dg-final { scan-assembler-times "vceq\.i16\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" 2 } } */
+/* { dg-final { scan-assembler-times "vceq\.i32\[      \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" 2 } } */
+
+/* And ensure we don't have unexpected output too.  */
+/* { dg-final { scan-assembler-not "vc\[gl\]\[te\]\.u\[0-9\]+\[        \]+\[qQdD\]\[0-9\]+, \[qQdD\]\[0-9\]+, #0" } } */
+
+/* Tidy up.  */

diff --git a/gcc/testsuite/gcc.target/arm/vect-vcvt.c b/gcc/testsuite/gcc.target/arm/vect-vcvt.c
new file mode 100644 (file)
index 0000000..816f68d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vect-vcvt.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -mvectorize-with-neon-double" } */
+/* { dg-add-options arm_neon } */
+
+#define N 32
+
+int ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+float fa[N];
+int ia[N];
+
+int convert()
+{
+  int i;
+
+  /* int -> float */
+  for (i = 0; i < N; i++)
+    fa[i] = (float) ib[i];
+
+  /* float -> int */
+  for (i = 0; i < N; i++)
+    ia[i] = (int) fa[i];
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */

diff --git a/gcc/testsuite/gcc.target/arm/vect-vcvtq.c b/gcc/testsuite/gcc.target/arm/vect-vcvtq.c
new file mode 100644 (file)
index 0000000..47e278a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vect-vcvtq.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */
+/* { dg-add-options arm_neon } */
+
+#define N 32
+
+int ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+float fa[N];
+int ia[N];
+
+int convert()
+{
+  int i;
+
+  /* int -> float */
+  for (i = 0; i < N; i++)
+    fa[i] = (float) ib[i];
+
+  /* float -> int */
+  for (i = 0; i < N; i++)
+    ia[i] = (int) fa[i];
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */

diff --git a/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c b/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c
new file mode 100644 (file)
index 0000000..51a7f9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c
@@ -0,0 +1,27 @@
+/* Check that NEON vector shifts support immediate values == size.  /*
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-save-temps" } */
+/* { dg-add-options arm_neon } */
+
+#include <arm_neon.h>
+
+uint16x8_t test_vshll_n_u8 (uint8x8_t a)
+{
+    return vshll_n_u8(a, 8);
+}
+
+uint32x4_t test_vshll_n_u16 (uint16x4_t a)
+{   
+    return vshll_n_u16(a, 16);
+}
+
+uint64x2_t test_vshll_n_u32 (uint32x2_t a)
+{
+    return vshll_n_u32(a, 32);
+}
+
+/* { dg-final { scan-assembler "vshll\.u16\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vshll\.u32\[   \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vshll\.u8\[    \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */

diff --git a/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c b/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c
new file mode 100644 (file)
index 0000000..5f4c927
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c
@@ -0,0 +1,25 @@
+/* Test the `vst1Q_laneu64' ARM Neon intrinsic.  */
+
+/* Detect ICE in the case of unaligned memory address.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-add-options arm_neon } */
+
+#include "arm_neon.h"
+
+unsigned char dummy_store[1000];
+
+void
+foo (char* addr)
+{
+  uint8x16_t vdata = vld1q_u8 (addr);
+  vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0);
+}
+
+uint64_t
+bar (uint64x2_t vdata)
+{
+  vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0);
+  return vgetq_lane_u64 (vdata, 0);
+}