add example illustrative tables

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index 4505afa605632529b38641d13fe0d20cab3d9301..14c3e7c217dcea736de96fdb22521b1155918c6e 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -1606,7 +1606,9 @@ x8 through to half of x11.
 
 Note that whilst the memory addressing table is shown left-to-right byte order, 
 the registers are shown in right-to-left (MSB) order.  This does **not**
-imply that bit or byte-reversal is carried out: it's just easier to visualise.
+imply that bit or byte-reversal is carried out: it's just easier to visualise
+memory as being contiguous bytes, and emphasises that registers are not
+really actually "memory" as such.
 
 ## Why SV bitwidth specification is restricted to 4 entries