add MSR to gtkw file for simulation output

diff --git a/src/openpower/test/runner.py b/src/openpower/test/runner.py
index ff4ab26bfd25798b9e9afcf9419829343e00115e..dd59e9faf5774a5218c2d068ab3d7406b04f26b5 100644 (file)
--- a/src/openpower/test/runner.py
+++ b/src/openpower/test/runner.py
@@ -311,7 +311,7 @@ class TestRunnerBase(FHDLTestCase):
                 'is_last', 'dec2.no_out_vec']),
             {'comment': 'fetch and decode'},
             (None, 'dec', [
-                'cia[63:0]', 'nia[63:0]', 'pc[63:0]',
+                'cia[63:0]', 'nia[63:0]', 'pc[63:0]', 'msr[63:0]',
                 'cur_pc[63:0]', 'core_core_cia[63:0]']),
             'raw_insn_i[31:0]',
             'raw_opcode_in[31:0]', 'insn_type', 'dec2.dec2_exc_happened',