+2017-01-27 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ PR target/65484
+ * g++.dg/vect/pr36648.cc: Modify to reflect that the loop is not
+ vectorized on POWER unless hardware misaligned loads are
+ available.
+
2017-01-27 Bin Cheng <bin.cheng@arm.com>
PR rtl-optimization/78559
int main() { }
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! vect_no_align } } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { ! vect_no_align } } } } */
+/* On older powerpc hardware (POWER7 and earlier), the default flag
+ -mno-allow-movmisalign prevents vectorization. On POWER8 and later,
+ when vect_hw_misalign is true, vectorization occurs. For other
+ targets, ! vect_no_align is a sufficient test. */
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { { ! vect_no_align } && { ! powerpc*-*-* } } || { powerpc*-*-* && vect_hw_misalign } } } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { { { ! vect_no_align } && { ! powerpc*-*-* } } || { powerpc*-*-* && vect_hw_misalign } } } } } */