re PR target/15653 (Gcc 3.4 ICE on valid code)

2004-06-16  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/15653
	* config/ia64/ia64.c (ia64_dfa_new_cycle): Do not insert nops
	after shifts before asm.

From-SVN: r83243

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f74b850db642299de005615152c1872c708426d6..0f7fd1937d5a46d508b6d2b720f15699aeba3600 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-06-16  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR target/15653
+       * config/ia64/ia64.c (ia64_dfa_new_cycle): Do not insert nops
+       after shifts before asm.
+
 2004-06-16  Zdenek Dvorak  <rakdver@atrey.karlin.mff.cuni.cz>
 
        PR tree-optimization/15993

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index c29fee46d90dcf28275b8b5e2b2d02d4d5482677..48866aee99981af05b4ab51bece49b9692ce9e91 100644 (file)
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -6339,7 +6339,9 @@ ia64_dfa_new_cycle (FILE *dump, int verbose, rtx insn, int last_clock,
     }
   else if (reload_completed)
     setup_clocks_p = TRUE;
-  if (setup_clocks_p && ia64_tune == PROCESSOR_ITANIUM)
+  if (setup_clocks_p && ia64_tune == PROCESSOR_ITANIUM
+      && GET_CODE (PATTERN (insn)) != ASM_INPUT
+      && asm_noperands (PATTERN (insn)) == 0)
     {
       enum attr_itanium_class c = ia64_safe_itanium_class (insn);