# Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?
3mdeb is currently helping Libre-SOC with the (horribly slow,
-easy-to-read) Libre-SOC Power ISA Simulator which is 20,000 times
+easy-to-read, easy-to-use) Libre-SOC Power ISA Simulator which is 20,000 times
slower than cavatools. 3mdeb is also helping with ISA level unit tests in
Libre-SOC's code base that will be used to cross-validate a huge range of
Power ISA simulators and actual silicon implementations.
Although there are quite a few Power ISA simulators, none of them
are up-to-date or are suited to high performance, like cavatools.
cavatools is multi-process and extremely fast, using relatively little
-memory, where power-gem5, which has a different focus, uses vast amounts
-of memory and is much slower.
+memory, where power-gem5, which has a different focus and has huge flexibility
+and usefulness for research, uses vast amounts
+of memory and is much slower. cavatools also has hardware-level cycle-accurate emulation which is extremely useful and important for analysing experimental
+instructions, which is a feature that no other Power ISA Simulator has.
DolphinPC and pearpc are over 15 years old and were targetted at 32 bit
emulation of much older Power ISA processors. Libre-SOC's python-based
simulator only achieves aroubd 2,000 instructions per second on
The project will be developed entirely publicly and transparently,
using Libre-SOC Project Resources which are already set up for trustable
-auditability and transparency.
+auditability and transparency. The mailing lists therefore are always
+publicly available.
Online conferences and talks will be given as progress
-is made, as well as
+is made, as well as working with Libre-SOC to send out development
+reports and progress.
# Extra info to be submitted
projects / libreriscv.git / commitdiff