I do not see any perf impact on radeonsi, but it
seems iris needs this.
It seems something sensible to do.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Andre Heider <a.heider@gmail.com>
if (rs[D3DRS_ZENABLE]) {
dsa.depth.enabled = 1;
- dsa.depth.writemask = !!rs[D3DRS_ZWRITEENABLE];
dsa.depth.func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ZFUNC]);
+ /* Disable depth write if no change can occur */
+ dsa.depth.writemask = !!rs[D3DRS_ZWRITEENABLE] &&
+ dsa.depth.func != PIPE_FUNC_EQUAL &&
+ dsa.depth.func != PIPE_FUNC_NEVER;
}
if (rs[D3DRS_STENCILENABLE]) {