AVX-512. Add patterns for compress, expand.

gcc/
	* config/i386/sse.md
	(define_mode_iterator VI48F): New.
	(define_insn "<avx512>_compress<mode>_mask"): Rename from
	"avx512f_compress<mode>_mask" and update mode iterator.
	(define_insn "<avx512>_compressstore<mode>_mask"): Rename from
	"avx512f_compressstore<mode>_mask" and update mode iterator.
	(define_expand "<avx512>_expand<mode>_maskz"): Rename from
	"avx512f_expand<mode>_maskz" and update mode iterator.
	(define_insn "<avx512>_expand<mode>_mask"): Rename from
	"avx512f_expand<mode>_mask" and update mode iterator.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215108

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7668aab842045455f3baea433701261d551e170d..1e518056e79d25619b69090d248f0e1801f1752c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,23 @@
+2014-09-10  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/sse.md
+       (define_mode_iterator VI48F): New.
+       (define_insn "<avx512>_compress<mode>_mask"): Rename from
+       "avx512f_compress<mode>_mask" and update mode iterator.
+       (define_insn "<avx512>_compressstore<mode>_mask"): Rename from
+       "avx512f_compressstore<mode>_mask" and update mode iterator.
+       (define_expand "<avx512>_expand<mode>_maskz"): Rename from
+       "avx512f_expand<mode>_maskz" and update mode iterator.
+       (define_insn "<avx512>_expand<mode>_mask"): Rename from
+       "avx512f_expand<mode>_mask" and update mode iterator.
+
 2014-09-10  Alexander Ivchenko  <alexander.ivchenko@intel.com>
            Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
            Anna Tikhonova  <anna.tikhonova@intel.com>

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 78276b79670bfbcb7613160a47db0b56ce33fa4d..42f6f188ee2634517dc7a162551285a222654e01 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -517,6 +517,12 @@
   (V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
   (V8DI  "TARGET_AVX512F") (V8DF  "TARGET_AVX512F")])
 (define_mode_iterator VI48F_512 [V16SI V16SF V8DI V8DF])
+(define_mode_iterator VI48F
+  [V16SI V16SF V8DI V8DF
+   (V8SI "TARGET_AVX512VL") (V8SF "TARGET_AVX512VL")
+   (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
+   (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
+   (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
 
 ;; Mapping from float mode to required SSE level
 (define_mode_attr sse
@@ -16736,11 +16742,11 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_compress<mode>_mask"
-  [(set (match_operand:VI48F_512 0 "register_operand" "=v")
-       (unspec:VI48F_512
-         [(match_operand:VI48F_512 1 "register_operand" "v")
-          (match_operand:VI48F_512 2 "vector_move_operand" "0C")
+(define_insn "<avx512>_compress<mode>_mask"
+  [(set (match_operand:VI48F 0 "register_operand" "=v")
+       (unspec:VI48F
+         [(match_operand:VI48F 1 "register_operand" "v")
+          (match_operand:VI48F 2 "vector_move_operand" "0C")
           (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")]
          UNSPEC_COMPRESS))]
   "TARGET_AVX512F"
@@ -16749,10 +16755,10 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_compressstore<mode>_mask"
-  [(set (match_operand:VI48F_512 0 "memory_operand" "=m")
-       (unspec:VI48F_512
-         [(match_operand:VI48F_512 1 "register_operand" "x")
+(define_insn "<avx512>_compressstore<mode>_mask"
+  [(set (match_operand:VI48F 0 "memory_operand" "=m")
+       (unspec:VI48F
+         [(match_operand:VI48F 1 "register_operand" "x")
           (match_dup 0)
           (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
          UNSPEC_COMPRESS_STORE))]
@@ -16763,21 +16769,21 @@
    (set_attr "memory" "store")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_expand "avx512f_expand<mode>_maskz"
-  [(set (match_operand:VI48F_512 0 "register_operand")
-       (unspec:VI48F_512
-         [(match_operand:VI48F_512 1 "nonimmediate_operand")
-          (match_operand:VI48F_512 2 "vector_move_operand")
+(define_expand "<avx512>_expand<mode>_maskz"
+  [(set (match_operand:VI48F 0 "register_operand")
+       (unspec:VI48F
+         [(match_operand:VI48F 1 "nonimmediate_operand")
+          (match_operand:VI48F 2 "vector_move_operand")
           (match_operand:<avx512fmaskmode> 3 "register_operand")]
          UNSPEC_EXPAND))]
   "TARGET_AVX512F"
   "operands[2] = CONST0_RTX (<MODE>mode);")
 
-(define_insn "avx512f_expand<mode>_mask"
-  [(set (match_operand:VI48F_512 0 "register_operand" "=v,v")
-       (unspec:VI48F_512
-         [(match_operand:VI48F_512 1 "nonimmediate_operand" "v,m")
-          (match_operand:VI48F_512 2 "vector_move_operand" "0C,0C")
+(define_insn "<avx512>_expand<mode>_mask"
+  [(set (match_operand:VI48F 0 "register_operand" "=v,v")
+       (unspec:VI48F
+         [(match_operand:VI48F 1 "nonimmediate_operand" "v,m")
+          (match_operand:VI48F 2 "vector_move_operand" "0C,0C")
           (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")]
          UNSPEC_EXPAND))]
   "TARGET_AVX512F"