arm.c (arm_compute_save_reg_mask): Do not save lr in case of tail call.

2015-01-14  Joey Ye  <joey.ye@arm.com>

        * config/arm/arm.c (arm_compute_save_reg_mask):
        Do not save lr in case of tail call.
        * config/arm/thumb2.md (*thumb2_pop_single): New pattern.

From-SVN: r219578

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dd6ad6bd78e9e774cffcd245cf778cf869ea1b10..7a0a9a3b0963830f5e632c9e9146c9c9f2305bc8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-01-14  Joey Ye  <joey.ye@arm.com>
+
+       * config/arm/arm.c (arm_compute_save_reg_mask):
+       Do not save lr in case of tail call.
+       * config/arm/thumb2.md (*thumb2_pop_single): New pattern.
+
 2015-01-13  Martin Uecker <uecker@eecs.berkeley.edu>
 
        * tree-vrp.c (check_array_ref): Emit more warnings
@@ -26,7 +32,7 @@
        (gimple_init_edge_profiler): Likewise.
        (gimple_gen_ic_func_profiler): Likewise.
 
-2015-01-15  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
+2015-01-13  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
 
        * ipa-inline.c (inline_small_functions): Swap the operands in
        enum.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8ca2dd8de8a604ba0bbdd5135feeee9dc5c53bc3..1a92753d52fa97c37c6df0122fd43fd36f6957b4 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19191,6 +19191,7 @@ arm_compute_save_reg_mask (void)
       || (save_reg_mask
          && optimize_size
          && ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL
+         && !crtl->tail_call_emit
          && !crtl->calls_eh_return))
     save_reg_mask |= 1 << LR_REGNUM;
 

diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 94d3225dde54b4d604a09a9559eb7631656c807d..1f681479d5d8d57d0596b24986ad53667f8bf2dc 100644 (file)
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -267,6 +267,17 @@
    (set_attr "type" "multiple")]
 )
 
+;; Pop a single register as its size is preferred over a post-incremental load
+(define_insn "*thumb2_pop_single"
+  [(set (match_operand:SI 0 "low_register_operand" "=r")
+        (mem:SI (post_inc:SI (reg:SI SP_REGNUM))))]
+  "TARGET_THUMB2 && (reload_in_progress || reload_completed)"
+  "pop\t{%0}"
+  [(set_attr "type" "load1")
+   (set_attr "length" "2")
+   (set_attr "predicable" "yes")]
+)
+
 ;; We have two alternatives here for memory loads (and similarly for stores)
 ;; to reflect the fact that the permissible constant pool ranges differ
 ;; between ldr instructions taking low regs and ldr instructions taking high