struct r600_ring {
struct radeon_winsys_cs *cs;
- void (*flush)(void *ctx, unsigned flags,
- struct pipe_fence_handle **fence);
};
/* Saved CS data for debugging features. */
* not going to wait.
*/
threaded_context_unwrap_sync(ctx);
- sctx->b.gfx.flush(&sctx->b, timeout ? 0 : PIPE_FLUSH_ASYNC, NULL);
+ si_flush_gfx_cs(&sctx->b, timeout ? 0 : PIPE_FLUSH_ASYNC, NULL);
rfence->gfx_unflushed.ctx = NULL;
if (!timeout)
/* DMA IBs are preambles to gfx IBs, therefore must be flushed first. */
if (rctx->dma.cs)
- rctx->dma.flush(rctx, rflags, fence ? &sdma_fence : NULL);
+ si_flush_dma_cs(rctx, rflags, fence ? &sdma_fence : NULL);
if (!radeon_emitted(rctx->gfx.cs, rctx->initial_gfx_cs_size)) {
if (fence)
gfx_fence = rctx->ws->cs_get_next_fence(rctx->gfx.cs);
deferred_fence = true;
} else {
- rctx->gfx.flush(rctx, rflags, fence ? &gfx_fence : NULL);
+ si_flush_gfx_cs(rctx, rflags, fence ? &gfx_fence : NULL);
}
}
sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX,
si_flush_gfx_cs, sctx);
- sctx->b.gfx.flush = si_flush_gfx_cs;
/* Border colors. */
sctx->border_color_table = malloc(SI_MAX_BORDER_COLORS *