+2016-05-03 Bernd Schmidt <bschmidt@redhat.com>
+
+ PR rtl-optimization/44281
+ * hard-reg-set.h (struct target_hard_regs): New field
+ x_fixed_nonglobal_reg_set.
+ (fixed_nonglobal_reg_set): New macro.
+ * reginfo.c (init_reg_sets_1): Initialize it.
+ * ira.c (setup_alloc_regs): Use fixed_nonglobal_reg_set instead
+ of fixed_reg_set.
+ * df-scan.c (df_insn_refs_collect): Asms may reference global regs.
+
2016-05-03 bin cheng <bin.cheng@arm.com>
PR tree-optimization/56541
}
}
+ int flags = (is_cond_exec) ? DF_REF_CONDITIONAL : 0;
/* For CALL_INSNs, first record DF_REF_BASE register defs, as well as
uses from CALL_INSN_FUNCTION_USAGE. */
if (CALL_P (insn_info->insn))
- df_get_call_refs (collection_rec, bb, insn_info,
- (is_cond_exec) ? DF_REF_CONDITIONAL : 0);
+ df_get_call_refs (collection_rec, bb, insn_info, flags);
+
+ if (asm_noperands (PATTERN (insn_info->insn)) >= 0)
+ for (unsigned i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ if (global_regs[i])
+ {
+ /* As with calls, asm statements reference all global regs. */
+ df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i],
+ NULL, bb, insn_info, DF_REF_REG_USE, flags);
+ df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i],
+ NULL, bb, insn_info, DF_REF_REG_DEF, flags);
+ }
/* Record other defs. These should be mostly for DF_REF_REGULAR, so
that a qsort on the defs is unnecessary in most cases. */
across calls even if we are willing to save and restore them. */
HARD_REG_SET x_call_fixed_reg_set;
+ /* Contains registers that are fixed use -- i.e. in fixed_reg_set -- but
+ only if they are not merely part of that set because they are global
+ regs. Global regs that are not otherwise fixed can still take part
+ in register allocation. */
+ HARD_REG_SET x_fixed_nonglobal_reg_set;
+
/* Contains 1 for registers that are set or clobbered by calls. */
/* ??? Ideally, this would be just call_used_regs plus global_regs, but
for someone's bright idea to have call_used_regs strictly include
(this_target_hard_regs->x_fixed_regs)
#define fixed_reg_set \
(this_target_hard_regs->x_fixed_reg_set)
+#define fixed_nonglobal_reg_set \
+ (this_target_hard_regs->x_fixed_nonglobal_reg_set)
#define call_used_regs \
(this_target_hard_regs->x_call_used_regs)
#define call_really_used_regs \
#ifdef ADJUST_REG_ALLOC_ORDER
ADJUST_REG_ALLOC_ORDER;
#endif
- COPY_HARD_REG_SET (no_unit_alloc_regs, fixed_reg_set);
+ COPY_HARD_REG_SET (no_unit_alloc_regs, fixed_nonglobal_reg_set);
if (! use_hard_frame_p)
SET_HARD_REG_BIT (no_unit_alloc_regs, HARD_FRAME_POINTER_REGNUM);
setup_class_hard_regs ();
}
COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set);
+ COPY_HARD_REG_SET (fixed_nonglobal_reg_set, fixed_reg_set);
/* Preserve global registers if called more than once. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+2016-05-03 Bernd Schmidt <bschmidt@redhat.com>
+
+ PR rtl-optimization/44281
+ * gcc.target/i386/pr44281.c: New test.
+
2016-05-03 bin cheng <bin.cheng@arm.com>
PR tree-optimization/56541
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-std=gnu99 -O2" } */
+/* { dg-final { scan-assembler "salq\[ \\t\]+\\\$8, %rbx" } } */
+
+#include <stdint.h>
+
+register uint64_t global_flag_stack __asm__("rbx");
+
+void push_flag_into_global_reg_var(uint64_t a, uint64_t b) {
+ uint64_t flag = (a==b);
+ global_flag_stack <<= 8;
+ global_flag_stack |= flag;
+}