static const struct debug_named_value debug_options[] = {
{ "fp", DBG_FP, "Log fragment program compilation" },
{ "vp", DBG_VP, "Log vertex program compilation" },
+ { "pstat", DBG_P_STAT, "Log vertex/fragment program stats" },
{ "draw", DBG_DRAW, "Log draw calls" },
{ "swtcl", DBG_SWTCL, "Log SWTCL-specific info" },
{ "rsblock", DBG_RS_BLOCK, "Log rasterizer registers" },
/* Setup the compiler. */
memset(&compiler, 0, sizeof(compiler));
rc_init(&compiler.Base);
- compiler.Base.Debug = DBG_ON(r300, DBG_FP);
+ DBG_ON(r300, DBG_FP) ? compiler.Base.Debug |= RC_DBG_LOG : 0;
+ DBG_ON(r300, DBG_P_STAT) ? compiler.Base.Debug |= RC_DBG_STATS : 0;
compiler.code = &shader->code;
compiler.state = shader->compare_state;
find_output_registers(&compiler, shader);
- if (compiler.Base.Debug) {
+ if (compiler.Base.Debug & RC_DBG_LOG) {
DBG(r300, DBG_FP, "r300: Initial fragment program\n");
tgsi_dump(tokens, 0);
}
#define DBG_NO_CBZB (1 << 21)
/* Statistics. */
#define DBG_STATS (1 << 24)
+#define DBG_P_STAT (1 << 25)
/*@}*/
static INLINE boolean SCREEN_DBG_ON(struct r300_screen * screen, unsigned flags)
memset(&compiler, 0, sizeof(compiler));
rc_init(&compiler.Base);
- compiler.Base.Debug = DBG_ON(r300, DBG_VP);
+ DBG_ON(r300, DBG_VP) ? compiler.Base.Debug |= RC_DBG_LOG : 0;
+ DBG_ON(r300, DBG_P_STAT) ? compiler.Base.Debug |= RC_DBG_STATS : 0;
compiler.code = &vs->code;
compiler.UserData = vs;
compiler.Base.is_r500 = r300->screen->caps.is_r500;
compiler.Base.max_alu_insts = r300->screen->caps.is_r500 ? 1024 : 256;
compiler.Base.remove_unused_constants = TRUE;
- if (compiler.Base.Debug) {
+ if (compiler.Base.Debug & RC_DBG_LOG) {
DBG(r300, DBG_VP, "r300: Initial vertex program\n");
tgsi_dump(vs->state.tokens, 0);
}
{"final code validation", 0, 1, rc_validate_final_shader, NULL},
{"machine code generation", 0, is_r500, r500BuildFragmentProgramHwCode, NULL},
{"machine code generation", 0, !is_r500, r300BuildFragmentProgramHwCode, NULL},
- {"dump machine code", 0, is_r500 && c->Base.Debug, r500FragmentProgramDump, NULL},
- {"dump machine code", 0, !is_r500 && c->Base.Debug, r300FragmentProgramDump, NULL},
+ {"dump machine code", 0, is_r500 && (c->Base.Debug & RC_DBG_LOG), r500FragmentProgramDump, NULL},
+ {"dump machine code", 0, !is_r500 && (c->Base.Debug & RC_DBG_LOG), r300FragmentProgramDump, NULL},
{NULL, 0, 0, NULL, NULL}
};
{"dead constants", 1, kill_consts, rc_remove_unused_constants, &c->code->constants_remap_table},
{"final code validation", 0, 1, rc_validate_final_shader, NULL},
{"machine code generation", 0, 1, translate_vertex_program, NULL},
- {"dump machine code", 0,c->Base.Debug,r300_vertex_program_dump, NULL},
+ {"dump machine code", 0, c->Base.Debug & RC_DBG_LOG, r300_vertex_program_dump, NULL},
{NULL, 0, 0, NULL, NULL}
};
#include <stdio.h>
#include <stdlib.h>
+#include "radeon_dataflow.h"
#include "radeon_program.h"
+#include "radeon_program_pair.h"
void rc_init(struct radeon_compiler * c)
{
va_list ap;
- if (!c->Debug)
+ if (!(c->Debug & RC_DBG_LOG))
return;
va_start(ap, fmt);
}
}
- if (c->Debug) {
+ if (c->Debug & RC_DBG_LOG) {
fprintf(stderr, "r300compiler error: ");
va_start(ap, fmt);
}
}
+static void reg_count_callback(void * userdata, struct rc_instruction * inst,
+ rc_register_file file, unsigned int index, unsigned int mask)
+{
+ unsigned int * max_reg = userdata;
+ if (file == RC_FILE_TEMPORARY)
+ index > *max_reg ? *max_reg = index : 0;
+}
+
+static void print_stats(struct radeon_compiler * c)
+{
+ struct rc_instruction * tmp;
+ unsigned i, max_reg, insts, fc, tex, alpha, rgb, presub;
+ max_reg = insts = fc = tex = alpha = rgb = presub = 0;
+ for(tmp = c->Program.Instructions.Next; tmp != &c->Program.Instructions;
+ tmp = tmp->Next){
+ const struct rc_opcode_info * info;
+ rc_for_all_reads_mask(tmp, reg_count_callback, &max_reg);
+ if (tmp->Type == RC_INSTRUCTION_NORMAL) {
+ if (tmp->U.I.PreSub.Opcode != RC_PRESUB_NONE)
+ presub++;
+ info = rc_get_opcode_info(tmp->U.I.Opcode);
+ } else {
+ if (tmp->U.P.RGB.Src[RC_PAIR_PRESUB_SRC].Used)
+ presub++;
+ if (tmp->U.P.Alpha.Src[RC_PAIR_PRESUB_SRC].Used)
+ presub++;
+ /* Assuming alpha will never be a flow control or
+ * a tex instruction. */
+ if (tmp->U.P.Alpha.Opcode != RC_OPCODE_NOP)
+ alpha++;
+ if (tmp->U.P.RGB.Opcode != RC_OPCODE_NOP)
+ rgb++;
+ info = rc_get_opcode_info(tmp->U.P.RGB.Opcode);
+ }
+ if (info->IsFlowControl)
+ fc++;
+ if (info->HasTexture)
+ tex++;
+ insts++;
+ }
+ if (insts < 4)
+ return;
+ fprintf(stderr,"~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n"
+ "~%4u Instructions\n"
+ "~%4u Vector Instructions (RGB)\n"
+ "~%4u Scalar Instructions (Alpha)\n"
+ "~%4u Flow Control Instructions\n"
+ "~%4u Texture Instructions\n"
+ "~%4u Presub Operations\n"
+ "~%4u Temporary Registers\n"
+ "~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n",
+ insts, rgb, alpha, fc, tex, presub, max_reg + 1);
+}
+
/* Executes a list of compiler passes given in the parameter 'list'. */
void rc_run_compiler(struct radeon_compiler *c, struct radeon_compiler_pass *list,
const char *shader_name)
{
- if (c->Debug) {
+ if (c->Debug & RC_DBG_LOG) {
fprintf(stderr, "%s: before compilation\n", shader_name);
rc_print_program(&c->Program);
}
if (c->Error)
return;
- if (c->Debug && list[i].dump) {
+ if ((c->Debug & RC_DBG_LOG) && list[i].dump) {
fprintf(stderr, "%s: after '%s'\n", shader_name, list[i].name);
rc_print_program(&c->Program);
}
}
}
+ if (c->Debug & RC_DBG_STATS)
+ print_stats(c);
}
void rc_validate_final_shader(struct radeon_compiler *c, void *user)
#include "radeon_program.h"
#include "radeon_emulate_loops.h"
+#define RC_DBG_LOG (1 << 0)
+#define RC_DBG_STATS (1 << 1)
+
struct rc_swizzle_caps;
struct radeon_compiler {
struct memory_pool Pool;
struct rc_program Program;
- unsigned Debug:1;
+ unsigned Debug:2;
unsigned Error:1;
char * ErrorMsg;
free(const_used);
free(inv_remap_table);
- if (c->Debug)
+ if (c->Debug & RC_DBG_LOG)
rc_constants_print(&c->Program.Constants);
}