2020-02-07 Jakub Jelinek <jakub@redhat.com>
+ PR target/93594
+ * config/i386/predicates.md (avx_identity_operand): Remove.
+ * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
+ (avx_<castmode><avxsizesuffix>_<castmode>,
+ avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
+ a VEC_CONCAT of the operand and UNSPEC_CAST.
+ (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
+ a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
+ UNSPEC_CAST.
+
PR target/93611
* config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
recog_data.insn if distance_non_agu_define changed it.
return true;
})
-;; Return true if OP is a parallel for identity permute.
-(define_predicate "avx_identity_operand"
- (and (match_code "parallel")
- (match_code "const_int" "a"))
-{
- int i, nelt = XVECLEN (op, 0);
-
- for (i = 0; i < nelt; ++i)
- if (INTVAL (XVECEXP (op, 0, i)) != i)
- return false;
- return true;
-})
-
;; Return true if OP is a proper third operand to vpblendw256.
(define_predicate "avx2_pblendw_operand"
(match_code "const_int")
(define_insn_and_split "avx_<castmode><avxsizesuffix>_<castmode>"
[(set (match_operand:AVX256MODE2P 0 "nonimmediate_operand" "=x,m")
- (unspec:AVX256MODE2P
- [(match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "xm,x")]
- UNSPEC_CAST))]
+ (vec_concat:AVX256MODE2P
+ (match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "xm,x")
+ (unspec:<ssehalfvecmode> [(const_int 0)] UNSPEC_CAST)))]
"TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"#"
"&& reload_completed"
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "<sseinsnmode>")])
-(define_insn_and_split "*avx_vec_concat<mode>_1"
- [(set (match_operand:V_256_512 0 "register_operand")
- (vec_concat:V_256_512
- (vec_select:<ssehalfvecmode>
- (unspec:V_256_512
- [(match_operand:<ssehalfvecmode> 1 "nonimmediate_operand")]
- UNSPEC_CAST)
- (match_parallel 3 "avx_identity_operand"
- [(match_operand 4 "const_int_operand")]))
- (match_operand:<ssehalfvecmode> 2 "nonimm_or_0_operand")))]
- "TARGET_AVX
- && (operands[2] == CONST0_RTX (<ssehalfvecmode>mode)
- || !MEM_P (operands[1]))
- && ix86_pre_reload_split ()"
- "#"
- "&& 1"
- [(set (match_dup 0) (vec_concat:V_256_512 (match_dup 1) (match_dup 2)))])
-
(define_insn "vcvtph2ps<mask_name>"
[(set (match_operand:V4SF 0 "register_operand" "=v")
(vec_select:V4SF
(define_insn_and_split "avx512f_<castmode><avxsizesuffix>_<castmode>"
[(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m")
- (unspec:AVX512MODE2P
- [(match_operand:<ssequartermode> 1 "nonimmediate_operand" "xm,x")]
- UNSPEC_CAST))]
+ (vec_concat:AVX512MODE2P
+ (vec_concat:<ssehalfvecmode>
+ (match_operand:<ssequartermode> 1 "nonimmediate_operand" "xm,x")
+ (unspec:<ssequartermode> [(const_int 0)] UNSPEC_CAST))
+ (unspec:<ssehalfvecmode> [(const_int 0)] UNSPEC_CAST)))]
"TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"#"
"&& reload_completed"
(define_insn_and_split "avx512f_<castmode><avxsizesuffix>_256<castmode>"
[(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m")
- (unspec:AVX512MODE2P
- [(match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "xm,x")]
- UNSPEC_CAST))]
+ (vec_concat:AVX512MODE2P
+ (match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "xm,x")
+ (unspec:<ssehalfvecmode> [(const_int 0)] UNSPEC_CAST)))]
"TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"#"
"&& reload_completed"