H-mode no longer exists
authorAndrew Waterman <andrew@sifive.com>
Fri, 10 Nov 2017 02:46:27 +0000 (18:46 -0800)
committerAndrew Waterman <andrew@sifive.com>
Fri, 10 Nov 2017 02:46:27 +0000 (18:46 -0800)
It's supplanted by the hypervisor extension, which doesn't use the privilege
encoding of 2; it still looks like supervisor (i.e. 1).

riscv/processor.cc
riscv/processor.h

index ebae384ede8ac4061e810e9a1c88c855b8f653a7..f177090c649f5beb5d843749b2bd57c2b70ab39a 100644 (file)
@@ -242,7 +242,6 @@ void processor_t::take_trap(trap_t& t, reg_t epc)
 
   if (t.cause() == CAUSE_BREAKPOINT && (
               (state.prv == PRV_M && state.dcsr.ebreakm) ||
-              (state.prv == PRV_H && state.dcsr.ebreakh) ||
               (state.prv == PRV_S && state.dcsr.ebreaks) ||
               (state.prv == PRV_U && state.dcsr.ebreaku))) {
     enter_debug_mode(DCSR_CAUSE_SWBP);
index 16416a494373a629e9279b62435a645d6bb7d104..87cb6a400e28dff4c4322157ff3a692da5add6c6 100644 (file)
@@ -222,7 +222,6 @@ public:
           (operation == OPERATION_STORE && !state.mcontrol[i].store) ||
           (operation == OPERATION_LOAD && !state.mcontrol[i].load) ||
           (state.prv == PRV_M && !state.mcontrol[i].m) ||
-          (state.prv == PRV_H && !state.mcontrol[i].h) ||
           (state.prv == PRV_S && !state.mcontrol[i].s) ||
           (state.prv == PRV_U && !state.mcontrol[i].u)) {
         continue;