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Fixed iterator invalidation bug in "rename" command
author
Clifford Wolf
<clifford@clifford.at>
Sun, 8 Feb 2015 23:18:36 +0000
(
00:18
+0100)
committer
Clifford Wolf
<clifford@clifford.at>
Sun, 8 Feb 2015 23:18:36 +0000
(
00:18
+0100)
passes/cmds/rename.cc
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diff --git
a/passes/cmds/rename.cc
b/passes/cmds/rename.cc
index 8f24af27820f0adf5f482134b4ab5f9d9dcab6c1..17d803e96ca298615a5e3abb4d1ce30809287741 100644
(file)
--- a/
passes/cmds/rename.cc
+++ b/
passes/cmds/rename.cc
@@
-34,9
+34,10
@@
static void rename_in_module(RTLIL::Module *module, std::string from_name, std::
for (auto &it : module->wires_)
if (it.first == from_name) {
- log("Renaming wire %s to %s in module %s.\n", log_id(it.second), log_id(to_name), log_id(module));
- module->rename(it.second, to_name);
- if (it.second->port_id)
+ Wire *w = it.second;
+ log("Renaming wire %s to %s in module %s.\n", log_id(w), log_id(to_name), log_id(module));
+ module->rename(w, to_name);
+ if (w->port_id)
module->fixup_ports();
return;
}