Originally MessageReq was intended to mark a packet as a holding a
message destined for a particular recipient and which would not
interact with other packets.
This is similar to the way a WriteReq would behave if writing to a
device register which needs to be updated atomically. Also, while the
memory system *could* recognize a MessageReq and know that it didn't
need to interact with other packets, that was never implemented.
Change-Id: Ie54301d1d8820e206d6bae96e200ae8c71d2d784
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20823
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
X86ISA::Interrupts::recvMessage(PacketPtr pkt)
{
Addr offset = pkt->getAddr() - x86InterruptAddress(initialApicId, 0);
- assert(pkt->cmd == MemCmd::MessageReq);
+ assert(pkt->cmd == MemCmd::WriteReq);
switch(offset)
{
case 0:
X86ISA::Interrupts::recvResponse(PacketPtr pkt)
{
assert(!pkt->isError());
- assert(pkt->cmd == MemCmd::MessageResp);
+ assert(pkt->cmd == MemCmd::WriteResp);
if (--pendingIPIs == 0) {
InterruptCommandRegLow low = regs[APIC_INTERRUPT_COMMAND_LOW];
// Record that the ICR is now idle.
size, Request::UNCACHEABLE,
Request::intMasterId);
- PacketPtr pkt = new Packet(req, MemCmd::MessageReq);
+ PacketPtr pkt = new Packet(req, MemCmd::WriteReq);
pkt->allocate();
return pkt;
}
Tick
recvAtomic(PacketPtr pkt)
{
- panic_if(pkt->cmd != MemCmd::MessageReq,
+ panic_if(pkt->cmd != MemCmd::WriteReq,
"%s received unexpected command %s from %s.\n",
name(), pkt->cmd.toString(), getPeer());
pkt->headerDelay = pkt->payloadDelay = 0;