if (surf->surf.ts_size) { /* TS: use precompiled clear command */
ctx->framebuffer.TS_COLOR_CLEAR_VALUE = new_clear_value;
- if (!DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE) &&
- VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
+ if (VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
/* Set number of color tiles to be filled */
etna_set_state(ctx->stream, VIVS_TS_COLOR_AUTO_DISABLE_COUNT,
surf->surf.padded_width * surf->surf.padded_height / 16);
if (surf->surf.ts_size) { /* TS: use precompiled clear command */
/* Set new clear depth value */
ctx->framebuffer.TS_DEPTH_CLEAR_VALUE = new_clear_value;
- if (!DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE) &&
- VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
+ if (VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
/* Set number of depth tiles to be filled */
etna_set_state(ctx->stream, VIVS_TS_DEPTH_AUTO_DISABLE_COUNT,
surf->surf.padded_width * surf->surf.padded_height / 16);
layout = ETNA_LAYOUT_LINEAR;
} else if (templat->target != PIPE_BUFFER) {
bool want_multitiled = false;
- bool want_supertiled = screen->specs.can_supertile && !DBG_ENABLED(ETNA_DBG_NO_SUPERTILE);
+ bool want_supertiled = screen->specs.can_supertile;
/* When this GPU supports single-buffer rendering, don't ever enable
* multi-tiling. This replicates the blob behavior on GC3000.
if (!etna_get_specs(screen))
goto fail;
+ /* apply debug options that disable individual features */
+ if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z))
+ screen->features[viv_chipFeatures] |= chipFeatures_NO_EARLY_Z;
+ if (DBG_ENABLED(ETNA_DBG_NO_TS))
+ screen->features[viv_chipFeatures] &= ~chipFeatures_FAST_CLEAR;
+ if (DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE))
+ screen->features[viv_chipMinorFeatures1] &= ~chipMinorFeatures1_AUTO_DISABLE;
+ if (DBG_ENABLED(ETNA_DBG_NO_SUPERTILE))
+ screen->specs.can_supertile = 0;
+
pscreen->destroy = etna_screen_destroy;
pscreen->get_param = etna_screen_get_param;
pscreen->get_paramf = etna_screen_get_paramf;
if (VIV_FEATURE(ctx->screen, chipFeatures, FAST_CLEAR) &&
VIV_FEATURE(ctx->screen, chipMinorFeatures0, MC20) &&
- !DBG_ENABLED(ETNA_DBG_NO_TS) && !rsc->ts_bo &&
+ !rsc->ts_bo &&
(rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
(rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0) {
etna_screen_resource_alloc_ts(pctx->screen, rsc);
#include "etnaviv_zsa.h"
#include "etnaviv_context.h"
+#include "etnaviv_screen.h"
#include "etnaviv_translate.h"
#include "util/u_memory.h"
+#include "hw/common.xml.h"
+
void *
etna_zsa_state_create(struct pipe_context *pctx,
const struct pipe_depth_stencil_alpha_state *so)
{
+ struct etna_context *ctx = etna_context(pctx);
struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state);
if (!cs)
cs->base = *so;
/* XXX does stencil[0] / stencil[1] order depend on rs->front_ccw? */
- bool early_z = true;
+ bool early_z = !VIV_FEATURE(ctx->screen, chipFeatures, NO_EARLY_Z);
bool disable_zs =
(!so->depth.enabled || so->depth.func == PIPE_FUNC_ALWAYS) &&
!so->depth.writemask;
if (so->depth.enabled == false || so->depth.func == PIPE_FUNC_ALWAYS)
early_z = false;
- if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z))
- early_z = false;
-
/* compare funcs have 1 to 1 mapping */
cs->PE_DEPTH_CONFIG =
VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(so->depth.enabled ? so->depth.func