struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
bool render_cond_bit = rctx->b.render_cond && !rctx->b.render_cond_force_off;
uint64_t mask;
- unsigned num_patches, dirty_fb_counter;
+ unsigned num_patches, dirty_tex_counter;
if (!info.indirect && !info.count && (info.indexed || !info.count_from_stream_output)) {
return;
}
/* Re-emit the framebuffer state if needed. */
- dirty_fb_counter = p_atomic_read(&rctx->b.screen->dirty_fb_counter);
- if (dirty_fb_counter != rctx->b.last_dirty_fb_counter) {
- rctx->b.last_dirty_fb_counter = dirty_fb_counter;
+ dirty_tex_counter = p_atomic_read(&rctx->b.screen->dirty_tex_counter);
+ if (dirty_tex_counter != rctx->b.last_dirty_tex_counter) {
+ rctx->b.last_dirty_tex_counter = dirty_tex_counter;
r600_mark_atom_dirty(rctx, &rctx->framebuffer.atom);
}
/* Performance counters. */
struct r600_perfcounters *perfcounters;
- /* If pipe_screen wants to re-emit the framebuffer state of all
- * contexts, it should atomically increment this. Each context will
- * compare this with its own last known value of the counter before
- * drawing and re-emit the framebuffer state accordingly.
+ /* If pipe_screen wants to recompute and re-emit the framebuffer,
+ * sampler, and image states of all contexts, it should atomically
+ * increment this.
+ *
+ * Each context will compare this with its own last known value of
+ * the counter before drawing and re-emit the states accordingly.
*/
- unsigned dirty_fb_counter;
+ unsigned dirty_tex_counter;
/* Atomically increment this counter when an existing texture's
* metadata is enabled or disabled in a way that requires changing
*/
unsigned compressed_colortex_counter;
- /* Atomically increment this counter when an existing texture's
- * backing buffer or tile mode parameters have changed that requires
- * recomputation of shader descriptors.
- */
- unsigned dirty_tex_descriptor_counter;
-
struct {
/* Context flags to set so that all writes from earlier jobs
* in the CP are seen by L2 clients.
unsigned num_gfx_cs_flushes;
unsigned initial_gfx_cs_size;
unsigned gpu_reset_counter;
- unsigned last_dirty_fb_counter;
+ unsigned last_dirty_tex_counter;
unsigned last_compressed_colortex_counter;
- unsigned last_dirty_tex_descriptor_counter;
struct u_upload_mgr *uploader;
struct u_suballocator *allocator_zeroed_memory;
metadata->scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0;
}
-static void r600_dirty_all_framebuffer_states(struct r600_common_screen *rscreen)
-{
- p_atomic_inc(&rscreen->dirty_fb_counter);
-}
-
static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx,
struct r600_texture *rtex)
{
r600_resource_reference(&rtex->cmask_buffer, NULL);
/* Notify all contexts about the change. */
- r600_dirty_all_framebuffer_states(rscreen);
+ p_atomic_inc(&rscreen->dirty_tex_counter);
p_atomic_inc(&rscreen->compressed_colortex_counter);
}
rtex->dcc_offset = 0;
/* Notify all contexts about the change. */
- r600_dirty_all_framebuffer_states(rscreen);
+ p_atomic_inc(&rscreen->dirty_tex_counter);
return true;
}
r600_texture_reference(&new_tex, NULL);
- r600_dirty_all_framebuffer_states(rctx->screen);
- p_atomic_inc(&rctx->screen->dirty_tex_descriptor_counter);
+ p_atomic_inc(&rctx->screen->dirty_tex_counter);
}
static boolean r600_texture_get_handle(struct pipe_screen* screen,
rtex->cmask.base_address_reg =
(rtex->resource.gpu_address + rtex->cmask.offset) >> 8;
- r600_dirty_all_framebuffer_states(rscreen);
- p_atomic_inc(&rscreen->dirty_tex_descriptor_counter);
+ p_atomic_inc(&rscreen->dirty_tex_counter);
rctx->num_alloc_tex_transfer_bytes += rtex->size;
}
rtex->surface.micro_tile_mode = rtex->last_msaa_resolve_target_micro_mode;
- p_atomic_inc(&rscreen->dirty_fb_counter);
- p_atomic_inc(&rscreen->dirty_tex_descriptor_counter);
+ p_atomic_inc(&rscreen->dirty_tex_counter);
}
void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
struct si_context *sctx = (struct si_context *)ctx;
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
struct pipe_index_buffer ib = {};
- unsigned mask, dirty_fb_counter, dirty_tex_counter, rast_prim;
+ unsigned mask, dirty_tex_counter, rast_prim;
if (likely(!info->indirect)) {
/* SI-CI treat instance_count==0 as instance_count==1. There is
return;
}
- /* Re-emit the framebuffer state if needed. */
- dirty_fb_counter = p_atomic_read(&sctx->b.screen->dirty_fb_counter);
- if (unlikely(dirty_fb_counter != sctx->b.last_dirty_fb_counter)) {
- sctx->b.last_dirty_fb_counter = dirty_fb_counter;
+ /* Recompute and re-emit the texture resource states if needed. */
+ dirty_tex_counter = p_atomic_read(&sctx->b.screen->dirty_tex_counter);
+ if (unlikely(dirty_tex_counter != sctx->b.last_dirty_tex_counter)) {
+ sctx->b.last_dirty_tex_counter = dirty_tex_counter;
sctx->framebuffer.dirty_cbufs |=
((1 << sctx->framebuffer.state.nr_cbufs) - 1);
sctx->framebuffer.dirty_zsbuf = true;
sctx->framebuffer.do_update_surf_dirtiness = true;
si_mark_atom_dirty(sctx, &sctx->framebuffer.atom);
- }
-
- /* Invalidate & recompute texture descriptors if needed. */
- dirty_tex_counter = p_atomic_read(&sctx->b.screen->dirty_tex_descriptor_counter);
- if (unlikely(dirty_tex_counter != sctx->b.last_dirty_tex_descriptor_counter)) {
- sctx->b.last_dirty_tex_descriptor_counter = dirty_tex_counter;
si_update_all_texture_descriptors(sctx);
}